git.oblomov.eu Git - linux-2.6/blob - arch/x86/kernel/genx2apic_cluster.c

   1 #include <linux/threads.h>
   2 #include <linux/cpumask.h>
   3 #include <linux/string.h>
   4 #include <linux/kernel.h>
   5 #include <linux/ctype.h>
   6 #include <linux/init.h>
   7 #include <linux/dmar.h>
   8
   9 #include <asm/smp.h>
  10 #include <asm/ipi.h>
  11 #include <asm/genapic.h>
  12
  13 DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
  14
  15 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  16 {
  17         if (cpu_has_x2apic)
  18                 return 1;
  19
  20         return 0;
  21 }
  22
  23 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
  24
  25 static cpumask_t x2apic_target_cpus(void)
  26 {
  27         return cpumask_of_cpu(0);
  28 }
  29
  30 /*
  31  * for now each logical cpu is in its own vector allocation domain.
  32  */
  33 static cpumask_t x2apic_vector_allocation_domain(int cpu)
  34 {
  35         cpumask_t domain = CPU_MASK_NONE;
  36         cpu_set(cpu, domain);
  37         return domain;
  38 }
  39
  40 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  41                                    unsigned int dest)
  42 {
  43         unsigned long cfg;
  44
  45         cfg = __prepare_ICR(0, vector, dest);
  46
  47         /*
  48          * send the IPI.
  49          */
  50         x2apic_icr_write(cfg, apicid);
  51 }
  52
  53 /*
  54  * for now, we send the IPI's one by one in the cpumask.
  55  * TBD: Based on the cpu mask, we can send the IPI's to the cluster group
  56  * at once. We have 16 cpu's in a cluster. This will minimize IPI register
  57  * writes.
  58  */
  59 static void x2apic_send_IPI_mask(cpumask_t mask, int vector)
  60 {
  61         unsigned long flags;
  62         unsigned long query_cpu;
  63
  64         local_irq_save(flags);
  65         for_each_cpu_mask(query_cpu, mask) {
  66                 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_logical_apicid, query_cpu),
  67                                        vector, APIC_DEST_LOGICAL);
  68         }
  69         local_irq_restore(flags);
  70 }
  71
  72 static void x2apic_send_IPI_allbutself(int vector)
  73 {
  74         cpumask_t mask = cpu_online_map;
  75
  76         cpu_clear(smp_processor_id(), mask);
  77
  78         if (!cpus_empty(mask))
  79                 x2apic_send_IPI_mask(mask, vector);
  80 }
  81
  82 static void x2apic_send_IPI_all(int vector)
  83 {
  84         x2apic_send_IPI_mask(cpu_online_map, vector);
  85 }
  86
  87 static int x2apic_apic_id_registered(void)
  88 {
  89         return 1;
  90 }
  91
  92 static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask)
  93 {
  94         int cpu;
  95
  96         /*
  97          * We're using fixed IRQ delivery, can only return one phys APIC ID.
  98          * May as well be the first.
  99          */
 100         cpu = first_cpu(cpumask);
 101         if ((unsigned)cpu < NR_CPUS)
 102                 return per_cpu(x86_cpu_to_logical_apicid, cpu);
 103         else
 104                 return BAD_APICID;
 105 }
 106
 107 static unsigned int get_apic_id(unsigned long x)
 108 {
 109         unsigned int id;
 110
 111         id = x;
 112         return id;
 113 }
 114
 115 static unsigned long set_apic_id(unsigned int id)
 116 {
 117         unsigned long x;
 118
 119         x = id;
 120         return x;
 121 }
 122
 123 static unsigned int phys_pkg_id(int index_msb)
 124 {
 125         return current_cpu_data.initial_apicid >> index_msb;
 126 }
 127
 128 static void x2apic_send_IPI_self(int vector)
 129 {
 130         apic_write(APIC_SELF_IPI, vector);
 131 }
 132
 133 static void init_x2apic_ldr(void)
 134 {
 135         int cpu = smp_processor_id();
 136
 137         per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
 138         return;
 139 }
 140
 141 struct genapic apic_x2apic_cluster = {
 142         .name = "cluster x2apic",
 143         .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
 144         .int_delivery_mode = dest_LowestPrio,
 145         .int_dest_mode = (APIC_DEST_LOGICAL != 0),
 146         .target_cpus = x2apic_target_cpus,
 147         .vector_allocation_domain = x2apic_vector_allocation_domain,
 148         .apic_id_registered = x2apic_apic_id_registered,
 149         .init_apic_ldr = init_x2apic_ldr,
 150         .send_IPI_all = x2apic_send_IPI_all,
 151         .send_IPI_allbutself = x2apic_send_IPI_allbutself,
 152         .send_IPI_mask = x2apic_send_IPI_mask,
 153         .send_IPI_self = x2apic_send_IPI_self,
 154         .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
 155         .phys_pkg_id = phys_pkg_id,
 156         .get_apic_id = get_apic_id,
 157         .set_apic_id = set_apic_id,
 158         .apic_id_mask = (0xFFFFFFFFu),
 159 };