2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/pci.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/vmalloc.h>
36 #include <sound/core.h>
37 #include <sound/control.h>
38 #include <sound/info.h>
39 #include <sound/ymfpci.h>
40 #include <sound/asoundef.h>
41 #include <sound/mpu401.h>
53 static void snd_ymfpci_irq_wait(ymfpci_t *chip);
55 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset)
57 return readb(chip->reg_area_virt + offset);
60 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val)
62 writeb(val, chip->reg_area_virt + offset);
65 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset)
67 return readw(chip->reg_area_virt + offset);
70 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val)
72 writew(val, chip->reg_area_virt + offset);
75 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset)
77 return readl(chip->reg_area_virt + offset);
80 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val)
82 writel(val, chip->reg_area_virt + offset);
85 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary)
87 unsigned long end_time;
88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
90 end_time = jiffies + msecs_to_jiffies(750);
92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
94 set_current_state(TASK_UNINTERRUPTIBLE);
95 schedule_timeout_uninterruptible(1);
96 } while (time_before(jiffies, end_time));
97 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
101 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val)
103 ymfpci_t *chip = ac97->private_data;
106 snd_ymfpci_codec_ready(chip, 0);
107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
111 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg)
113 ymfpci_t *chip = ac97->private_data;
115 if (snd_ymfpci_codec_ready(chip, 0))
117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
118 if (snd_ymfpci_codec_ready(chip, 0))
120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
122 for (i = 0; i < 600; i++)
123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
132 static u32 snd_ymfpci_calc_delta(u32 rate)
135 case 8000: return 0x02aaab00;
136 case 11025: return 0x03accd00;
137 case 16000: return 0x05555500;
138 case 22050: return 0x07599a00;
139 case 32000: return 0x0aaaab00;
140 case 44100: return 0x0eb33300;
141 default: return ((rate << 16) / 375) << 5;
145 static u32 def_rate[8] = {
146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
149 static u32 snd_ymfpci_calc_lpfK(u32 rate)
152 static u32 val[8] = {
153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
158 return 0x40000000; /* FIXME: What's the right value? */
159 for (i = 0; i < 8; i++)
160 if (rate <= def_rate[i])
165 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
168 static u32 val[8] = {
169 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
175 for (i = 0; i < 8; i++)
176 if (rate <= def_rate[i])
182 * Hardware start management
185 static void snd_ymfpci_hw_start(ymfpci_t *chip)
189 spin_lock_irqsave(&chip->reg_lock, flags);
190 if (chip->start_count++ > 0)
192 snd_ymfpci_writel(chip, YDSXGR_MODE,
193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
196 spin_unlock_irqrestore(&chip->reg_lock, flags);
199 static void snd_ymfpci_hw_stop(ymfpci_t *chip)
204 spin_lock_irqsave(&chip->reg_lock, flags);
205 if (--chip->start_count > 0)
207 snd_ymfpci_writel(chip, YDSXGR_MODE,
208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
209 while (timeout-- > 0) {
210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
213 if (atomic_read(&chip->interrupt_sleep_count)) {
214 atomic_set(&chip->interrupt_sleep_count, 0);
215 wake_up(&chip->interrupt_sleep);
218 spin_unlock_irqrestore(&chip->reg_lock, flags);
222 * Playback voice management
225 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
227 ymfpci_voice_t *voice, *voice2;
231 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
232 voice = &chip->voices[idx];
233 voice2 = pair ? &chip->voices[idx+1] : NULL;
234 if (voice->use || (voice2 && voice2->use))
252 snd_ymfpci_hw_start(chip);
254 snd_ymfpci_hw_start(chip);
261 static int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
266 snd_assert(rvoice != NULL, return -EINVAL);
267 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
269 spin_lock_irqsave(&chip->voice_lock, flags);
271 result = voice_alloc(chip, type, pair, rvoice);
272 if (result == 0 || type != YMFPCI_PCM)
274 /* TODO: synth/midi voice deallocation */
277 spin_unlock_irqrestore(&chip->voice_lock, flags);
281 static int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice)
285 snd_assert(pvoice != NULL, return -EINVAL);
286 snd_ymfpci_hw_stop(chip);
287 spin_lock_irqsave(&chip->voice_lock, flags);
288 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
290 pvoice->interrupt = NULL;
291 spin_unlock_irqrestore(&chip->voice_lock, flags);
299 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice)
304 if ((ypcm = voice->ypcm) == NULL)
306 if (ypcm->substream == NULL)
308 spin_lock(&chip->reg_lock);
310 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
311 if (pos < ypcm->last_pos)
312 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
314 delta = pos - ypcm->last_pos;
315 ypcm->period_pos += delta;
316 ypcm->last_pos = pos;
317 if (ypcm->period_pos >= ypcm->period_size) {
318 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
319 ypcm->period_pos %= ypcm->period_size;
320 spin_unlock(&chip->reg_lock);
321 snd_pcm_period_elapsed(ypcm->substream);
322 spin_lock(&chip->reg_lock);
325 if (unlikely(ypcm->update_pcm_vol)) {
326 unsigned int subs = ypcm->substream->number;
327 unsigned int next_bank = 1 - chip->active_bank;
328 snd_ymfpci_playback_bank_t *bank;
331 bank = &voice->bank[next_bank];
332 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
333 bank->left_gain_end = volume;
334 if (ypcm->output_rear)
335 bank->eff2_gain_end = volume;
337 bank = &ypcm->voices[1]->bank[next_bank];
338 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
339 bank->right_gain_end = volume;
340 if (ypcm->output_rear)
341 bank->eff3_gain_end = volume;
342 ypcm->update_pcm_vol--;
345 spin_unlock(&chip->reg_lock);
348 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream)
350 snd_pcm_runtime_t *runtime = substream->runtime;
351 ymfpci_pcm_t *ypcm = runtime->private_data;
352 ymfpci_t *chip = ypcm->chip;
355 spin_lock(&chip->reg_lock);
357 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
358 if (pos < ypcm->last_pos)
359 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
361 delta = pos - ypcm->last_pos;
362 ypcm->period_pos += delta;
363 ypcm->last_pos = pos;
364 if (ypcm->period_pos >= ypcm->period_size) {
365 ypcm->period_pos %= ypcm->period_size;
366 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
367 spin_unlock(&chip->reg_lock);
368 snd_pcm_period_elapsed(substream);
369 spin_lock(&chip->reg_lock);
372 spin_unlock(&chip->reg_lock);
375 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream,
378 ymfpci_t *chip = snd_pcm_substream_chip(substream);
379 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
382 spin_lock(&chip->reg_lock);
383 if (ypcm->voices[0] == NULL) {
388 case SNDRV_PCM_TRIGGER_START:
389 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
390 case SNDRV_PCM_TRIGGER_RESUME:
391 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
392 if (ypcm->voices[1] != NULL)
393 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
396 case SNDRV_PCM_TRIGGER_STOP:
397 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
398 case SNDRV_PCM_TRIGGER_SUSPEND:
399 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
400 if (ypcm->voices[1] != NULL)
401 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
409 spin_unlock(&chip->reg_lock);
412 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream,
415 ymfpci_t *chip = snd_pcm_substream_chip(substream);
416 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
420 spin_lock(&chip->reg_lock);
422 case SNDRV_PCM_TRIGGER_START:
423 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
424 case SNDRV_PCM_TRIGGER_RESUME:
425 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
426 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
429 case SNDRV_PCM_TRIGGER_STOP:
430 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
431 case SNDRV_PCM_TRIGGER_SUSPEND:
432 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
433 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
440 spin_unlock(&chip->reg_lock);
444 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices)
448 if (ypcm->voices[1] != NULL && voices < 2) {
449 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
450 ypcm->voices[1] = NULL;
452 if (voices == 1 && ypcm->voices[0] != NULL)
453 return 0; /* already allocated */
454 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
455 return 0; /* already allocated */
457 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
458 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
459 ypcm->voices[0] = NULL;
462 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
465 ypcm->voices[0]->ypcm = ypcm;
466 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
468 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
469 ypcm->voices[1]->ypcm = ypcm;
474 static void snd_ymfpci_pcm_init_voice(ymfpci_pcm_t *ypcm, unsigned int voiceidx,
475 snd_pcm_runtime_t *runtime,
478 ymfpci_voice_t *voice = ypcm->voices[voiceidx];
480 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
481 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
482 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
483 snd_ymfpci_playback_bank_t *bank;
485 u32 vol_left, vol_right;
486 u8 use_left, use_right;
488 snd_assert(voice != NULL, return);
489 if (runtime->channels == 1) {
493 use_left = (voiceidx & 1) == 0;
494 use_right = !use_left;
496 if (has_pcm_volume) {
497 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
498 [ypcm->substream->number].left << 15);
499 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
500 [ypcm->substream->number].right << 15);
502 vol_left = cpu_to_le32(0x40000000);
503 vol_right = cpu_to_le32(0x40000000);
505 format = runtime->channels == 2 ? 0x00010000 : 0;
506 if (snd_pcm_format_width(runtime->format) == 8)
507 format |= 0x80000000;
508 if (runtime->channels == 2 && (voiceidx & 1) != 0)
510 for (nbank = 0; nbank < 2; nbank++) {
511 bank = &voice->bank[nbank];
512 memset(bank, 0, sizeof(*bank));
513 bank->format = cpu_to_le32(format);
514 bank->base = cpu_to_le32(runtime->dma_addr);
515 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
516 bank->lpfQ = cpu_to_le32(lpfQ);
518 bank->delta_end = cpu_to_le32(delta);
520 bank->lpfK_end = cpu_to_le32(lpfK);
522 bank->eg_gain_end = cpu_to_le32(0x40000000);
524 if (ypcm->output_front) {
527 bank->left_gain_end = vol_left;
531 bank->right_gain_end = vol_right;
534 if (ypcm->output_rear) {
537 bank->eff2_gain_end = vol_left;
541 bank->eff3_gain_end = vol_right;
547 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip)
549 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
550 4096, &chip->ac3_tmp_base) < 0)
553 chip->bank_effect[3][0]->base =
554 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
555 chip->bank_effect[3][0]->loop_end =
556 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
557 chip->bank_effect[4][0]->base =
558 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
559 chip->bank_effect[4][0]->loop_end =
560 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
562 spin_lock_irq(&chip->reg_lock);
563 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
564 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
565 spin_unlock_irq(&chip->reg_lock);
569 static int snd_ymfpci_ac3_done(ymfpci_t *chip)
571 spin_lock_irq(&chip->reg_lock);
572 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
573 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
574 spin_unlock_irq(&chip->reg_lock);
575 // snd_ymfpci_irq_wait(chip);
576 if (chip->ac3_tmp_base.area) {
577 snd_dma_free_pages(&chip->ac3_tmp_base);
578 chip->ac3_tmp_base.area = NULL;
583 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream,
584 snd_pcm_hw_params_t * hw_params)
586 snd_pcm_runtime_t *runtime = substream->runtime;
587 ymfpci_pcm_t *ypcm = runtime->private_data;
590 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
592 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
597 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream)
599 ymfpci_t *chip = snd_pcm_substream_chip(substream);
600 snd_pcm_runtime_t *runtime = substream->runtime;
603 if (runtime->private_data == NULL)
605 ypcm = runtime->private_data;
607 /* wait, until the PCI operations are not finished */
608 snd_ymfpci_irq_wait(chip);
609 snd_pcm_lib_free_pages(substream);
610 if (ypcm->voices[1]) {
611 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
612 ypcm->voices[1] = NULL;
614 if (ypcm->voices[0]) {
615 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
616 ypcm->voices[0] = NULL;
621 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream)
623 ymfpci_t *chip = snd_pcm_substream_chip(substream);
624 snd_pcm_runtime_t *runtime = substream->runtime;
625 ymfpci_pcm_t *ypcm = runtime->private_data;
628 ypcm->period_size = runtime->period_size;
629 ypcm->buffer_size = runtime->buffer_size;
630 ypcm->period_pos = 0;
632 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
633 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
634 substream->pcm == chip->pcm);
638 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream,
639 snd_pcm_hw_params_t * hw_params)
641 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
644 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream)
646 ymfpci_t *chip = snd_pcm_substream_chip(substream);
648 /* wait, until the PCI operations are not finished */
649 snd_ymfpci_irq_wait(chip);
650 return snd_pcm_lib_free_pages(substream);
653 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream)
655 ymfpci_t *chip = snd_pcm_substream_chip(substream);
656 snd_pcm_runtime_t *runtime = substream->runtime;
657 ymfpci_pcm_t *ypcm = runtime->private_data;
658 snd_ymfpci_capture_bank_t * bank;
662 ypcm->period_size = runtime->period_size;
663 ypcm->buffer_size = runtime->buffer_size;
664 ypcm->period_pos = 0;
667 rate = ((48000 * 4096) / runtime->rate) - 1;
669 if (runtime->channels == 2) {
673 if (snd_pcm_format_width(runtime->format) == 8)
677 switch (ypcm->capture_bank_number) {
679 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
680 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
683 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
684 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
687 for (nbank = 0; nbank < 2; nbank++) {
688 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
689 bank->base = cpu_to_le32(runtime->dma_addr);
690 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
692 bank->num_of_loops = 0;
697 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream)
699 ymfpci_t *chip = snd_pcm_substream_chip(substream);
700 snd_pcm_runtime_t *runtime = substream->runtime;
701 ymfpci_pcm_t *ypcm = runtime->private_data;
702 ymfpci_voice_t *voice = ypcm->voices[0];
704 if (!(ypcm->running && voice))
706 return le32_to_cpu(voice->bank[chip->active_bank].start);
709 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream)
711 ymfpci_t *chip = snd_pcm_substream_chip(substream);
712 snd_pcm_runtime_t *runtime = substream->runtime;
713 ymfpci_pcm_t *ypcm = runtime->private_data;
717 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
720 static void snd_ymfpci_irq_wait(ymfpci_t *chip)
725 while (loops-- > 0) {
726 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
728 init_waitqueue_entry(&wait, current);
729 add_wait_queue(&chip->interrupt_sleep, &wait);
730 atomic_inc(&chip->interrupt_sleep_count);
731 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
732 remove_wait_queue(&chip->interrupt_sleep, &wait);
736 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
738 ymfpci_t *chip = dev_id;
739 u32 status, nvoice, mode;
740 ymfpci_voice_t *voice;
742 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
743 if (status & 0x80000000) {
744 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
745 spin_lock(&chip->voice_lock);
746 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
747 voice = &chip->voices[nvoice];
748 if (voice->interrupt)
749 voice->interrupt(chip, voice);
751 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
752 if (chip->capture_substream[nvoice])
753 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
756 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
757 if (chip->effect_substream[nvoice])
758 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
761 spin_unlock(&chip->voice_lock);
762 spin_lock(&chip->reg_lock);
763 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
764 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
765 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
766 spin_unlock(&chip->reg_lock);
768 if (atomic_read(&chip->interrupt_sleep_count)) {
769 atomic_set(&chip->interrupt_sleep_count, 0);
770 wake_up(&chip->interrupt_sleep);
774 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
777 snd_timer_interrupt(chip->timer, chip->timer->sticks);
779 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
782 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
786 static snd_pcm_hardware_t snd_ymfpci_playback =
788 .info = (SNDRV_PCM_INFO_MMAP |
789 SNDRV_PCM_INFO_MMAP_VALID |
790 SNDRV_PCM_INFO_INTERLEAVED |
791 SNDRV_PCM_INFO_BLOCK_TRANSFER |
792 SNDRV_PCM_INFO_PAUSE |
793 SNDRV_PCM_INFO_RESUME),
794 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
795 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
800 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
801 .period_bytes_min = 64,
802 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
808 static snd_pcm_hardware_t snd_ymfpci_capture =
810 .info = (SNDRV_PCM_INFO_MMAP |
811 SNDRV_PCM_INFO_MMAP_VALID |
812 SNDRV_PCM_INFO_INTERLEAVED |
813 SNDRV_PCM_INFO_BLOCK_TRANSFER |
814 SNDRV_PCM_INFO_PAUSE |
815 SNDRV_PCM_INFO_RESUME),
816 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
817 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
822 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
823 .period_bytes_min = 64,
824 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
830 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime)
832 kfree(runtime->private_data);
835 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream)
837 ymfpci_t *chip = snd_pcm_substream_chip(substream);
838 snd_pcm_runtime_t *runtime = substream->runtime;
841 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
845 ypcm->type = PLAYBACK_VOICE;
846 ypcm->substream = substream;
847 runtime->hw = snd_ymfpci_playback;
848 runtime->private_data = ypcm;
849 runtime->private_free = snd_ymfpci_pcm_free_substream;
850 /* FIXME? True value is 256/48 = 5.33333 ms */
851 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
855 /* call with spinlock held */
856 static void ymfpci_open_extension(ymfpci_t *chip)
858 if (! chip->rear_opened) {
859 if (! chip->spdif_opened) /* set AC3 */
860 snd_ymfpci_writel(chip, YDSXGR_MODE,
861 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
862 /* enable second codec (4CHEN) */
863 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
864 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
868 /* call with spinlock held */
869 static void ymfpci_close_extension(ymfpci_t *chip)
871 if (! chip->rear_opened) {
872 if (! chip->spdif_opened)
873 snd_ymfpci_writel(chip, YDSXGR_MODE,
874 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
875 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
876 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
880 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream)
882 ymfpci_t *chip = snd_pcm_substream_chip(substream);
883 snd_pcm_runtime_t *runtime = substream->runtime;
885 snd_kcontrol_t *kctl;
888 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
890 ypcm = runtime->private_data;
891 ypcm->output_front = 1;
892 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
893 spin_lock_irq(&chip->reg_lock);
894 if (ypcm->output_rear) {
895 ymfpci_open_extension(chip);
898 spin_unlock_irq(&chip->reg_lock);
900 kctl = chip->pcm_mixer[substream->number].ctl;
901 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
902 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
906 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream)
908 ymfpci_t *chip = snd_pcm_substream_chip(substream);
909 snd_pcm_runtime_t *runtime = substream->runtime;
913 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
915 ypcm = runtime->private_data;
916 ypcm->output_front = 0;
917 ypcm->output_rear = 1;
918 spin_lock_irq(&chip->reg_lock);
919 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
920 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
921 ymfpci_open_extension(chip);
922 chip->spdif_pcm_bits = chip->spdif_bits;
923 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
924 chip->spdif_opened++;
925 spin_unlock_irq(&chip->reg_lock);
927 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
928 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
929 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
933 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream)
935 ymfpci_t *chip = snd_pcm_substream_chip(substream);
936 snd_pcm_runtime_t *runtime = substream->runtime;
940 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
942 ypcm = runtime->private_data;
943 ypcm->output_front = 0;
944 ypcm->output_rear = 1;
945 spin_lock_irq(&chip->reg_lock);
946 ymfpci_open_extension(chip);
948 spin_unlock_irq(&chip->reg_lock);
952 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream,
953 u32 capture_bank_number)
955 ymfpci_t *chip = snd_pcm_substream_chip(substream);
956 snd_pcm_runtime_t *runtime = substream->runtime;
959 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
963 ypcm->type = capture_bank_number + CAPTURE_REC;
964 ypcm->substream = substream;
965 ypcm->capture_bank_number = capture_bank_number;
966 chip->capture_substream[capture_bank_number] = substream;
967 runtime->hw = snd_ymfpci_capture;
968 /* FIXME? True value is 256/48 = 5.33333 ms */
969 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
970 runtime->private_data = ypcm;
971 runtime->private_free = snd_ymfpci_pcm_free_substream;
972 snd_ymfpci_hw_start(chip);
976 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream)
978 return snd_ymfpci_capture_open(substream, 0);
981 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream)
983 return snd_ymfpci_capture_open(substream, 1);
986 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream)
991 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream)
993 ymfpci_t *chip = snd_pcm_substream_chip(substream);
994 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
995 snd_kcontrol_t *kctl;
997 spin_lock_irq(&chip->reg_lock);
998 if (ypcm->output_rear && chip->rear_opened > 0) {
1000 ymfpci_close_extension(chip);
1002 spin_unlock_irq(&chip->reg_lock);
1003 kctl = chip->pcm_mixer[substream->number].ctl;
1004 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1005 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1006 return snd_ymfpci_playback_close_1(substream);
1009 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream)
1011 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1013 spin_lock_irq(&chip->reg_lock);
1014 chip->spdif_opened = 0;
1015 ymfpci_close_extension(chip);
1016 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1017 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1018 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1019 spin_unlock_irq(&chip->reg_lock);
1020 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1021 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1022 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1023 return snd_ymfpci_playback_close_1(substream);
1026 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream)
1028 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1030 spin_lock_irq(&chip->reg_lock);
1031 if (chip->rear_opened > 0) {
1032 chip->rear_opened--;
1033 ymfpci_close_extension(chip);
1035 spin_unlock_irq(&chip->reg_lock);
1036 return snd_ymfpci_playback_close_1(substream);
1039 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream)
1041 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1042 snd_pcm_runtime_t *runtime = substream->runtime;
1043 ymfpci_pcm_t *ypcm = runtime->private_data;
1046 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1047 snd_ymfpci_hw_stop(chip);
1052 static snd_pcm_ops_t snd_ymfpci_playback_ops = {
1053 .open = snd_ymfpci_playback_open,
1054 .close = snd_ymfpci_playback_close,
1055 .ioctl = snd_pcm_lib_ioctl,
1056 .hw_params = snd_ymfpci_playback_hw_params,
1057 .hw_free = snd_ymfpci_playback_hw_free,
1058 .prepare = snd_ymfpci_playback_prepare,
1059 .trigger = snd_ymfpci_playback_trigger,
1060 .pointer = snd_ymfpci_playback_pointer,
1063 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = {
1064 .open = snd_ymfpci_capture_rec_open,
1065 .close = snd_ymfpci_capture_close,
1066 .ioctl = snd_pcm_lib_ioctl,
1067 .hw_params = snd_ymfpci_capture_hw_params,
1068 .hw_free = snd_ymfpci_capture_hw_free,
1069 .prepare = snd_ymfpci_capture_prepare,
1070 .trigger = snd_ymfpci_capture_trigger,
1071 .pointer = snd_ymfpci_capture_pointer,
1074 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1081 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1083 pcm->private_data = chip;
1085 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1086 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1089 pcm->info_flags = 0;
1090 strcpy(pcm->name, "YMFPCI");
1093 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1094 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1101 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = {
1102 .open = snd_ymfpci_capture_ac97_open,
1103 .close = snd_ymfpci_capture_close,
1104 .ioctl = snd_pcm_lib_ioctl,
1105 .hw_params = snd_ymfpci_capture_hw_params,
1106 .hw_free = snd_ymfpci_capture_hw_free,
1107 .prepare = snd_ymfpci_capture_prepare,
1108 .trigger = snd_ymfpci_capture_trigger,
1109 .pointer = snd_ymfpci_capture_pointer,
1112 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1119 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1121 pcm->private_data = chip;
1123 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1126 pcm->info_flags = 0;
1127 sprintf(pcm->name, "YMFPCI - %s",
1128 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1131 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1132 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1139 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = {
1140 .open = snd_ymfpci_playback_spdif_open,
1141 .close = snd_ymfpci_playback_spdif_close,
1142 .ioctl = snd_pcm_lib_ioctl,
1143 .hw_params = snd_ymfpci_playback_hw_params,
1144 .hw_free = snd_ymfpci_playback_hw_free,
1145 .prepare = snd_ymfpci_playback_prepare,
1146 .trigger = snd_ymfpci_playback_trigger,
1147 .pointer = snd_ymfpci_playback_pointer,
1150 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1157 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1159 pcm->private_data = chip;
1161 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1164 pcm->info_flags = 0;
1165 strcpy(pcm->name, "YMFPCI - IEC958");
1166 chip->pcm_spdif = pcm;
1168 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1169 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1176 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = {
1177 .open = snd_ymfpci_playback_4ch_open,
1178 .close = snd_ymfpci_playback_4ch_close,
1179 .ioctl = snd_pcm_lib_ioctl,
1180 .hw_params = snd_ymfpci_playback_hw_params,
1181 .hw_free = snd_ymfpci_playback_hw_free,
1182 .prepare = snd_ymfpci_playback_prepare,
1183 .trigger = snd_ymfpci_playback_trigger,
1184 .pointer = snd_ymfpci_playback_pointer,
1187 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1194 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1196 pcm->private_data = chip;
1198 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1201 pcm->info_flags = 0;
1202 strcpy(pcm->name, "YMFPCI - Rear PCM");
1203 chip->pcm_4ch = pcm;
1205 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1206 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1213 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1215 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1220 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol,
1221 snd_ctl_elem_value_t * ucontrol)
1223 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1225 spin_lock_irq(&chip->reg_lock);
1226 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1227 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1228 spin_unlock_irq(&chip->reg_lock);
1232 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol,
1233 snd_ctl_elem_value_t * ucontrol)
1235 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1239 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1240 (ucontrol->value.iec958.status[1] << 8);
1241 spin_lock_irq(&chip->reg_lock);
1242 change = chip->spdif_bits != val;
1243 chip->spdif_bits = val;
1244 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1245 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1246 spin_unlock_irq(&chip->reg_lock);
1250 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata =
1252 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1253 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1254 .info = snd_ymfpci_spdif_default_info,
1255 .get = snd_ymfpci_spdif_default_get,
1256 .put = snd_ymfpci_spdif_default_put
1259 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1261 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1266 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol,
1267 snd_ctl_elem_value_t * ucontrol)
1269 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1271 spin_lock_irq(&chip->reg_lock);
1272 ucontrol->value.iec958.status[0] = 0x3e;
1273 ucontrol->value.iec958.status[1] = 0xff;
1274 spin_unlock_irq(&chip->reg_lock);
1278 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata =
1280 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1281 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1282 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1283 .info = snd_ymfpci_spdif_mask_info,
1284 .get = snd_ymfpci_spdif_mask_get,
1287 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1289 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1294 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol,
1295 snd_ctl_elem_value_t * ucontrol)
1297 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1299 spin_lock_irq(&chip->reg_lock);
1300 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1301 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1302 spin_unlock_irq(&chip->reg_lock);
1306 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol,
1307 snd_ctl_elem_value_t * ucontrol)
1309 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1313 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1314 (ucontrol->value.iec958.status[1] << 8);
1315 spin_lock_irq(&chip->reg_lock);
1316 change = chip->spdif_pcm_bits != val;
1317 chip->spdif_pcm_bits = val;
1318 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1319 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1320 spin_unlock_irq(&chip->reg_lock);
1324 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata =
1326 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1327 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1328 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1329 .info = snd_ymfpci_spdif_stream_info,
1330 .get = snd_ymfpci_spdif_stream_get,
1331 .put = snd_ymfpci_spdif_stream_put
1334 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
1336 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1338 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1340 info->value.enumerated.items = 3;
1341 if (info->value.enumerated.item > 2)
1342 info->value.enumerated.item = 2;
1343 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1347 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1349 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1352 spin_lock_irq(&chip->reg_lock);
1353 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1354 spin_unlock_irq(&chip->reg_lock);
1356 value->value.enumerated.item[0] = 0;
1358 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1362 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1364 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1367 spin_lock_irq(&chip->reg_lock);
1368 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1369 if (value->value.enumerated.item[0] == 0)
1370 reg = old_reg & ~0x100;
1372 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1373 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1374 spin_unlock_irq(&chip->reg_lock);
1375 return reg != old_reg;
1378 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = {
1379 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1380 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1381 .name = "Direct Recording Source",
1382 .info = snd_ymfpci_drec_source_info,
1383 .get = snd_ymfpci_drec_source_get,
1384 .put = snd_ymfpci_drec_source_put
1391 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1392 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1393 .info = snd_ymfpci_info_single, \
1394 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1395 .private_value = ((reg) | ((shift) << 16)) }
1397 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol,
1398 snd_ctl_elem_info_t *uinfo)
1400 int reg = kcontrol->private_value & 0xffff;
1403 case YDSXGR_SPDIFOUTCTRL: break;
1404 case YDSXGR_SPDIFINCTRL: break;
1405 default: return -EINVAL;
1407 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1409 uinfo->value.integer.min = 0;
1410 uinfo->value.integer.max = 1;
1414 static int snd_ymfpci_get_single(snd_kcontrol_t *kcontrol,
1415 snd_ctl_elem_value_t *ucontrol)
1417 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1418 int reg = kcontrol->private_value & 0xffff;
1419 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1420 unsigned int mask = 1;
1423 case YDSXGR_SPDIFOUTCTRL: break;
1424 case YDSXGR_SPDIFINCTRL: break;
1425 default: return -EINVAL;
1427 ucontrol->value.integer.value[0] =
1428 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1432 static int snd_ymfpci_put_single(snd_kcontrol_t *kcontrol,
1433 snd_ctl_elem_value_t *ucontrol)
1435 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1436 int reg = kcontrol->private_value & 0xffff;
1437 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1438 unsigned int mask = 1;
1440 unsigned int val, oval;
1443 case YDSXGR_SPDIFOUTCTRL: break;
1444 case YDSXGR_SPDIFINCTRL: break;
1445 default: return -EINVAL;
1447 val = (ucontrol->value.integer.value[0] & mask);
1449 spin_lock_irq(&chip->reg_lock);
1450 oval = snd_ymfpci_readl(chip, reg);
1451 val = (oval & ~(mask << shift)) | val;
1452 change = val != oval;
1453 snd_ymfpci_writel(chip, reg, val);
1454 spin_unlock_irq(&chip->reg_lock);
1458 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1459 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1460 .info = snd_ymfpci_info_double, \
1461 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1462 .private_value = reg }
1464 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1466 unsigned int reg = kcontrol->private_value;
1468 if (reg < 0x80 || reg >= 0xc0)
1470 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1472 uinfo->value.integer.min = 0;
1473 uinfo->value.integer.max = 16383;
1477 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1479 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1480 unsigned int reg = kcontrol->private_value;
1481 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1484 if (reg < 0x80 || reg >= 0xc0)
1486 spin_lock_irq(&chip->reg_lock);
1487 val = snd_ymfpci_readl(chip, reg);
1488 spin_unlock_irq(&chip->reg_lock);
1489 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1490 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1494 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1496 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1497 unsigned int reg = kcontrol->private_value;
1498 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1500 unsigned int val1, val2, oval;
1502 if (reg < 0x80 || reg >= 0xc0)
1504 val1 = ucontrol->value.integer.value[0] & mask;
1505 val2 = ucontrol->value.integer.value[1] & mask;
1506 val1 <<= shift_left;
1507 val2 <<= shift_right;
1508 spin_lock_irq(&chip->reg_lock);
1509 oval = snd_ymfpci_readl(chip, reg);
1510 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1511 change = val1 != oval;
1512 snd_ymfpci_writel(chip, reg, val1);
1513 spin_unlock_irq(&chip->reg_lock);
1520 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1522 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1524 uinfo->value.integer.min = 0;
1525 uinfo->value.integer.max = 1;
1529 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1531 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1532 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1536 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1538 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1540 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1542 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1547 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = {
1548 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1549 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1550 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1551 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1552 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1553 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1554 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1555 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1556 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1557 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1558 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1559 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1560 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1561 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1562 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1563 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1565 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1566 .name = "4ch Duplication",
1567 .info = snd_ymfpci_info_dup4ch,
1568 .get = snd_ymfpci_get_dup4ch,
1569 .put = snd_ymfpci_put_dup4ch,
1578 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin)
1581 unsigned long flags;
1583 spin_lock_irqsave(&chip->reg_lock, flags);
1584 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1585 reg &= ~(1 << (pin + 8));
1587 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1588 /* set the level mode for input line */
1589 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1590 mode &= ~(3 << (pin * 2));
1591 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1592 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1593 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1594 spin_unlock_irqrestore(&chip->reg_lock, flags);
1595 return (mode >> pin) & 1;
1598 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable)
1601 unsigned long flags;
1603 spin_lock_irqsave(&chip->reg_lock, flags);
1604 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1606 reg &= ~(1 << (pin + 8));
1607 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1608 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1609 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1610 spin_unlock_irqrestore(&chip->reg_lock, flags);
1615 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1617 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1619 uinfo->value.integer.min = 0;
1620 uinfo->value.integer.max = 1;
1624 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1626 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1627 int pin = (int)kcontrol->private_value;
1628 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1632 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1634 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1635 int pin = (int)kcontrol->private_value;
1637 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1638 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1639 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1645 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = {
1646 .name = "Shared Rear/Line-In Switch",
1647 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1648 .info = snd_ymfpci_gpio_sw_info,
1649 .get = snd_ymfpci_gpio_sw_get,
1650 .put = snd_ymfpci_gpio_sw_put,
1658 static int snd_ymfpci_pcm_vol_info(snd_kcontrol_t *kcontrol,
1659 snd_ctl_elem_info_t *uinfo)
1661 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1663 uinfo->value.integer.min = 0;
1664 uinfo->value.integer.max = 0x8000;
1668 static int snd_ymfpci_pcm_vol_get(snd_kcontrol_t *kcontrol,
1669 snd_ctl_elem_value_t *ucontrol)
1671 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1672 unsigned int subs = kcontrol->id.subdevice;
1674 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1675 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1679 static int snd_ymfpci_pcm_vol_put(snd_kcontrol_t *kcontrol,
1680 snd_ctl_elem_value_t *ucontrol)
1682 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1683 unsigned int subs = kcontrol->id.subdevice;
1684 snd_pcm_substream_t *substream;
1685 unsigned long flags;
1687 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1688 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1689 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1690 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1692 substream = (snd_pcm_substream_t *)kcontrol->private_value;
1693 spin_lock_irqsave(&chip->voice_lock, flags);
1694 if (substream->runtime && substream->runtime->private_data) {
1695 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
1696 ypcm->update_pcm_vol = 2;
1698 spin_unlock_irqrestore(&chip->voice_lock, flags);
1704 static snd_kcontrol_new_t snd_ymfpci_pcm_volume __devinitdata = {
1705 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1706 .name = "PCM Playback Volume",
1707 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1708 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1709 .info = snd_ymfpci_pcm_vol_info,
1710 .get = snd_ymfpci_pcm_vol_get,
1711 .put = snd_ymfpci_pcm_vol_put,
1719 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus)
1721 ymfpci_t *chip = bus->private_data;
1722 chip->ac97_bus = NULL;
1725 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97)
1727 ymfpci_t *chip = ac97->private_data;
1731 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch)
1733 ac97_template_t ac97;
1734 snd_kcontrol_t *kctl;
1735 snd_pcm_substream_t *substream;
1738 static ac97_bus_ops_t ops = {
1739 .write = snd_ymfpci_codec_write,
1740 .read = snd_ymfpci_codec_read,
1743 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1745 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1746 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1748 memset(&ac97, 0, sizeof(ac97));
1749 ac97.private_data = chip;
1750 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1751 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1755 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1756 AC97_EA_VRA|AC97_EA_VRM, 0);
1758 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1759 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1763 /* add S/PDIF control */
1764 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1765 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1767 kctl->id.device = chip->pcm_spdif->device;
1768 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1770 kctl->id.device = chip->pcm_spdif->device;
1771 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1773 kctl->id.device = chip->pcm_spdif->device;
1774 chip->spdif_pcm_ctl = kctl;
1776 /* direct recording source */
1777 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1778 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1782 * shared rear/line-in
1785 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1789 /* per-voice volume */
1790 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1791 for (idx = 0; idx < 32; ++idx) {
1792 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1795 kctl->id.device = chip->pcm->device;
1796 kctl->id.subdevice = idx;
1797 kctl->private_value = (unsigned long)substream;
1798 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1800 chip->pcm_mixer[idx].left = 0x8000;
1801 chip->pcm_mixer[idx].right = 0x8000;
1802 chip->pcm_mixer[idx].ctl = kctl;
1803 substream = substream->next;
1814 static int snd_ymfpci_timer_start(snd_timer_t *timer)
1817 unsigned long flags;
1820 chip = snd_timer_chip(timer);
1821 count = (timer->sticks << 1) - 1;
1822 spin_lock_irqsave(&chip->reg_lock, flags);
1823 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1824 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1825 spin_unlock_irqrestore(&chip->reg_lock, flags);
1829 static int snd_ymfpci_timer_stop(snd_timer_t *timer)
1832 unsigned long flags;
1834 chip = snd_timer_chip(timer);
1835 spin_lock_irqsave(&chip->reg_lock, flags);
1836 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1837 spin_unlock_irqrestore(&chip->reg_lock, flags);
1841 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer,
1842 unsigned long *num, unsigned long *den)
1849 static struct _snd_timer_hardware snd_ymfpci_timer_hw = {
1850 .flags = SNDRV_TIMER_HW_AUTO,
1851 .resolution = 20833, /* 1/fs = 20.8333...us */
1853 .start = snd_ymfpci_timer_start,
1854 .stop = snd_ymfpci_timer_stop,
1855 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1858 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device)
1860 snd_timer_t *timer = NULL;
1864 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1865 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1866 tid.card = chip->card->number;
1867 tid.device = device;
1869 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1870 strcpy(timer->name, "YMFPCI timer");
1871 timer->private_data = chip;
1872 timer->hw = snd_ymfpci_timer_hw;
1874 chip->timer = timer;
1883 static void snd_ymfpci_proc_read(snd_info_entry_t *entry,
1884 snd_info_buffer_t * buffer)
1886 ymfpci_t *chip = entry->private_data;
1889 snd_iprintf(buffer, "YMFPCI\n\n");
1890 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1891 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1894 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip)
1896 snd_info_entry_t *entry;
1898 if (! snd_card_proc_new(card, "ymfpci", &entry))
1899 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
1904 * initialization routines
1907 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1911 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1912 #if 0 // force to reset
1915 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1916 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1917 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1918 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1919 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1925 static void snd_ymfpci_enable_dsp(ymfpci_t *chip)
1927 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1930 static void snd_ymfpci_disable_dsp(ymfpci_t *chip)
1935 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1937 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1938 while (timeout-- > 0) {
1939 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1940 if ((val & 0x00000002) == 0)
1945 #include "ymfpci_image.h"
1947 static void snd_ymfpci_download_image(ymfpci_t *chip)
1951 unsigned long *inst;
1953 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1954 snd_ymfpci_disable_dsp(chip);
1955 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1956 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1957 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1958 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1959 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1960 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1961 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1962 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1963 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1965 /* setup DSP instruction code */
1966 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1967 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1969 /* setup control instruction code */
1970 switch (chip->device_id) {
1971 case PCI_DEVICE_ID_YAMAHA_724F:
1972 case PCI_DEVICE_ID_YAMAHA_740C:
1973 case PCI_DEVICE_ID_YAMAHA_744:
1974 case PCI_DEVICE_ID_YAMAHA_754:
1981 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
1982 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
1984 snd_ymfpci_enable_dsp(chip);
1987 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip)
1989 long size, playback_ctrl_size;
1990 int voice, bank, reg;
1992 dma_addr_t ptr_addr;
1994 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
1995 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
1996 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
1997 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
1998 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2000 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
2001 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
2002 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
2003 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
2005 /* work_ptr must be aligned to 256 bytes, but it's already
2006 covered with the kernel page allocation mechanism */
2007 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2008 size, &chip->work_ptr) < 0)
2010 ptr = chip->work_ptr.area;
2011 ptr_addr = chip->work_ptr.addr;
2012 memset(ptr, 0, size); /* for sure */
2014 chip->bank_base_playback = ptr;
2015 chip->bank_base_playback_addr = ptr_addr;
2016 chip->ctrl_playback = (u32 *)ptr;
2017 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2018 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2019 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2020 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2021 chip->voices[voice].number = voice;
2022 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr;
2023 chip->voices[voice].bank_addr = ptr_addr;
2024 for (bank = 0; bank < 2; bank++) {
2025 chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr;
2026 ptr += chip->bank_size_playback;
2027 ptr_addr += chip->bank_size_playback;
2030 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2031 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2032 chip->bank_base_capture = ptr;
2033 chip->bank_base_capture_addr = ptr_addr;
2034 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2035 for (bank = 0; bank < 2; bank++) {
2036 chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr;
2037 ptr += chip->bank_size_capture;
2038 ptr_addr += chip->bank_size_capture;
2040 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2041 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2042 chip->bank_base_effect = ptr;
2043 chip->bank_base_effect_addr = ptr_addr;
2044 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2045 for (bank = 0; bank < 2; bank++) {
2046 chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr;
2047 ptr += chip->bank_size_effect;
2048 ptr_addr += chip->bank_size_effect;
2050 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2051 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2052 chip->work_base = ptr;
2053 chip->work_base_addr = ptr_addr;
2055 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2057 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2058 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2059 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2060 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2061 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2063 /* S/PDIF output initialization */
2064 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2065 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2066 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2068 /* S/PDIF input initialization */
2069 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2071 /* digital mixer setup */
2072 for (reg = 0x80; reg < 0xc0; reg += 4)
2073 snd_ymfpci_writel(chip, reg, 0);
2074 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2075 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2076 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2077 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2078 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2079 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2080 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2085 static int snd_ymfpci_free(ymfpci_t *chip)
2089 snd_assert(chip != NULL, return -EINVAL);
2091 if (chip->res_reg_area) { /* don't touch busy hardware */
2092 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2093 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2094 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2095 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2096 snd_ymfpci_disable_dsp(chip);
2097 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2098 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2099 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2100 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2101 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2102 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2103 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2106 snd_ymfpci_ac3_done(chip);
2108 /* Set PCI device to D3 state */
2110 /* FIXME: temporarily disabled, otherwise we cannot fire up
2111 * the chip again unless reboot. ACPI bug?
2113 pci_set_power_state(chip->pci, 3);
2117 vfree(chip->saved_regs);
2119 release_and_free_resource(chip->mpu_res);
2120 release_and_free_resource(chip->fm_res);
2121 snd_ymfpci_free_gameport(chip);
2122 if (chip->reg_area_virt)
2123 iounmap(chip->reg_area_virt);
2124 if (chip->work_ptr.area)
2125 snd_dma_free_pages(&chip->work_ptr);
2128 free_irq(chip->irq, (void *)chip);
2129 release_and_free_resource(chip->res_reg_area);
2131 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2133 pci_disable_device(chip->pci);
2138 static int snd_ymfpci_dev_free(snd_device_t *device)
2140 ymfpci_t *chip = device->device_data;
2141 return snd_ymfpci_free(chip);
2145 static int saved_regs_index[] = {
2147 YDSXGR_SPDIFOUTCTRL,
2148 YDSXGR_SPDIFOUTSTATUS,
2151 YDSXGR_PRIADCLOOPVOL,
2152 YDSXGR_NATIVEDACINVOL,
2153 YDSXGR_NATIVEDACOUTVOL,
2154 // YDSXGR_BUF441OUTVOL,
2155 YDSXGR_NATIVEADCINVOL,
2156 YDSXGR_SPDIFLOOPVOL,
2159 YDSXGR_LEGACYOUTVOL,
2161 YDSXGR_PLAYCTRLBASE,
2165 /* capture set up */
2172 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2174 static int snd_ymfpci_suspend(snd_card_t *card, pm_message_t state)
2176 ymfpci_t *chip = card->pm_private_data;
2179 snd_pcm_suspend_all(chip->pcm);
2180 snd_pcm_suspend_all(chip->pcm2);
2181 snd_pcm_suspend_all(chip->pcm_spdif);
2182 snd_pcm_suspend_all(chip->pcm_4ch);
2183 snd_ac97_suspend(chip->ac97);
2184 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2185 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2186 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2187 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2188 snd_ymfpci_disable_dsp(chip);
2189 pci_disable_device(chip->pci);
2193 static int snd_ymfpci_resume(snd_card_t *card)
2195 ymfpci_t *chip = card->pm_private_data;
2198 pci_enable_device(chip->pci);
2199 pci_set_master(chip->pci);
2200 snd_ymfpci_aclink_reset(chip->pci);
2201 snd_ymfpci_codec_ready(chip, 0);
2202 snd_ymfpci_download_image(chip);
2205 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2206 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2208 snd_ac97_resume(chip->ac97);
2210 /* start hw again */
2211 if (chip->start_count > 0) {
2212 spin_lock_irq(&chip->reg_lock);
2213 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2214 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2215 spin_unlock_irq(&chip->reg_lock);
2219 #endif /* CONFIG_PM */
2221 int __devinit snd_ymfpci_create(snd_card_t * card,
2222 struct pci_dev * pci,
2223 unsigned short old_legacy_ctrl,
2228 static snd_device_ops_t ops = {
2229 .dev_free = snd_ymfpci_dev_free,
2234 /* enable PCI device */
2235 if ((err = pci_enable_device(pci)) < 0)
2238 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2240 pci_disable_device(pci);
2243 chip->old_legacy_ctrl = old_legacy_ctrl;
2244 spin_lock_init(&chip->reg_lock);
2245 spin_lock_init(&chip->voice_lock);
2246 init_waitqueue_head(&chip->interrupt_sleep);
2247 atomic_set(&chip->interrupt_sleep_count, 0);
2251 chip->device_id = pci->device;
2252 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2253 chip->reg_area_phys = pci_resource_start(pci, 0);
2254 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2255 pci_set_master(pci);
2257 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2258 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2259 snd_ymfpci_free(chip);
2262 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
2263 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2264 snd_ymfpci_free(chip);
2267 chip->irq = pci->irq;
2269 snd_ymfpci_aclink_reset(pci);
2270 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2271 snd_ymfpci_free(chip);
2275 snd_ymfpci_download_image(chip);
2277 udelay(100); /* seems we need a delay after downloading image.. */
2279 if (snd_ymfpci_memalloc(chip) < 0) {
2280 snd_ymfpci_free(chip);
2284 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2285 snd_ymfpci_free(chip);
2290 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2291 if (chip->saved_regs == NULL) {
2292 snd_ymfpci_free(chip);
2295 snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip);
2298 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2299 snd_ymfpci_free(chip);
2303 snd_ymfpci_proc_init(card, chip);
2305 snd_card_set_dev(card, &pci->dev);