3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/config.h>
70 #include <linux/init.h>
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/sched.h>
74 #include <linux/slab.h>
75 #include <linux/delay.h>
76 #include <linux/interrupt.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/crc32.h>
80 #include <linux/device.h>
81 #include <linux/spinlock.h>
82 #include <linux/ethtool.h>
83 #include <linux/mii.h>
84 #include <linux/workqueue.h>
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
97 * the LAN91C111 can be at any of the following port addresses. To change,
98 * for a slightly different card, you can add it to the array. Keep in
99 * mind that the array must end in zero.
101 static unsigned int smc_portlist[] __initdata = {
102 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
103 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
107 # define SMC_IOADDR -1
109 static unsigned long io = SMC_IOADDR;
110 module_param(io, ulong, 0400);
111 MODULE_PARM_DESC(io, "I/O base address");
116 static int irq = SMC_IRQ;
117 module_param(irq, int, 0400);
118 MODULE_PARM_DESC(irq, "IRQ number");
120 #endif /* CONFIG_ISA */
123 # define SMC_NOWAIT 0
125 static int nowait = SMC_NOWAIT;
126 module_param(nowait, int, 0400);
127 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
130 * Transmit timeout, default 5 seconds.
132 static int watchdog = 1000;
133 module_param(watchdog, int, 0400);
134 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
136 MODULE_LICENSE("GPL");
139 * The internal workings of the driver. If you are changing anything
140 * here with the SMC stuff, you should have the datasheet and know
141 * what you are doing.
143 #define CARDNAME "smc91x"
146 * Use power-down feature of the chip
151 * Wait time for memory to be free. This probably shouldn't be
152 * tuned that much, as waiting for this means nothing else happens
155 #define MEMORY_WAIT_TIME 16
158 * This selects whether TX packets are sent one by one to the SMC91x internal
159 * memory and throttled until transmission completes. This may prevent
160 * RX overruns a litle by keeping much of the memory free for RX packets
161 * but to the expense of reduced TX throughput and increased IRQ overhead.
162 * Note this is not a cure for a too slow data bus or too high IRQ latency.
164 #define THROTTLE_TX_PKTS 0
167 * The MII clock high/low times. 2x this number gives the MII clock period
168 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
172 /* store this information for the driver.. */
175 * If I have to wait until memory is available to send a
176 * packet, I will store the skbuff here, until I get the
177 * desired memory. Then, I'll send it out and free it.
179 struct sk_buff *pending_tx_skb;
180 struct tasklet_struct tx_task;
183 * these are things that the kernel wants me to keep, so users
184 * can find out semi-useless statistics of how well the card is
187 struct net_device_stats stats;
189 /* version/revision of the SMC91x chip */
192 /* Contains the current active transmission mode */
195 /* Contains the current active receive mode */
198 /* Contains the current active receive/phy mode */
205 struct mii_if_info mii;
208 struct work_struct phy_configure;
213 #ifdef SMC_CAN_USE_DATACS
217 #ifdef SMC_USE_PXA_DMA
218 /* DMA needs the physical address of the chip */
225 #define DBG(n, args...) \
227 if (SMC_DEBUG >= (n)) \
231 #define PRINTK(args...) printk(args)
233 #define DBG(n, args...) do { } while(0)
234 #define PRINTK(args...) printk(KERN_DEBUG args)
238 static void PRINT_PKT(u_char *buf, int length)
245 remainder = length % 16;
247 for (i = 0; i < lines ; i ++) {
249 for (cur = 0; cur < 8; cur++) {
253 printk("%02x%02x ", a, b);
257 for (i = 0; i < remainder/2 ; i++) {
261 printk("%02x%02x ", a, b);
266 #define PRINT_PKT(x...) do { } while(0)
270 /* this enables an interrupt in the interrupt mask register */
271 #define SMC_ENABLE_INT(x) do { \
272 unsigned char mask; \
273 spin_lock_irq(&lp->lock); \
274 mask = SMC_GET_INT_MASK(); \
276 SMC_SET_INT_MASK(mask); \
277 spin_unlock_irq(&lp->lock); \
280 /* this disables an interrupt from the interrupt mask register */
281 #define SMC_DISABLE_INT(x) do { \
282 unsigned char mask; \
283 spin_lock_irq(&lp->lock); \
284 mask = SMC_GET_INT_MASK(); \
286 SMC_SET_INT_MASK(mask); \
287 spin_unlock_irq(&lp->lock); \
291 * Wait while MMU is busy. This is usually in the order of a few nanosecs
292 * if at all, but let's avoid deadlocking the system if the hardware
293 * decides to go south.
295 #define SMC_WAIT_MMU_BUSY() do { \
296 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
297 unsigned long timeout = jiffies + 2; \
298 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
299 if (time_after(jiffies, timeout)) { \
300 printk("%s: timeout %s line %d\n", \
301 dev->name, __FILE__, __LINE__); \
311 * this does a soft reset on the device
313 static void smc_reset(struct net_device *dev)
315 struct smc_local *lp = netdev_priv(dev);
316 void __iomem *ioaddr = lp->base;
317 unsigned int ctl, cfg;
318 struct sk_buff *pending_skb;
320 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
322 /* Disable all interrupts, block TX tasklet */
323 spin_lock(&lp->lock);
326 pending_skb = lp->pending_tx_skb;
327 lp->pending_tx_skb = NULL;
328 spin_unlock(&lp->lock);
330 /* free any pending tx skb */
332 dev_kfree_skb(pending_skb);
333 lp->stats.tx_errors++;
334 lp->stats.tx_aborted_errors++;
338 * This resets the registers mostly to defaults, but doesn't
339 * affect EEPROM. That seems unnecessary
342 SMC_SET_RCR(RCR_SOFTRST);
345 * Setup the Configuration Register
346 * This is necessary because the CONFIG_REG is not affected
351 cfg = CONFIG_DEFAULT;
354 * Setup for fast accesses if requested. If the card/system
355 * can't handle it then there will be no recovery except for
356 * a hard reset or power cycle
359 cfg |= CONFIG_NO_WAIT;
362 * Release from possible power-down state
363 * Configuration register is not affected by Soft Reset
365 cfg |= CONFIG_EPH_POWER_EN;
369 /* this should pause enough for the chip to be happy */
371 * elaborate? What does the chip _need_? --jgarzik
373 * This seems to be undocumented, but something the original
374 * driver(s) have always done. Suspect undocumented timing
375 * info/determined empirically. --rmk
379 /* Disable transmit and receive functionality */
381 SMC_SET_RCR(RCR_CLEAR);
382 SMC_SET_TCR(TCR_CLEAR);
385 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
388 * Set the control register to automatically release successfully
389 * transmitted packets, to make the best use out of our limited
392 if(!THROTTLE_TX_PKTS)
393 ctl |= CTL_AUTO_RELEASE;
395 ctl &= ~CTL_AUTO_RELEASE;
400 SMC_SET_MMU_CMD(MC_RESET);
405 * Enable Interrupts, Receive, and Transmit
407 static void smc_enable(struct net_device *dev)
409 struct smc_local *lp = netdev_priv(dev);
410 void __iomem *ioaddr = lp->base;
413 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
415 /* see the header file for options in TCR/RCR DEFAULT */
417 SMC_SET_TCR(lp->tcr_cur_mode);
418 SMC_SET_RCR(lp->rcr_cur_mode);
421 SMC_SET_MAC_ADDR(dev->dev_addr);
423 /* now, enable interrupts */
424 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
425 if (lp->version >= (CHIP_91100 << 4))
428 SMC_SET_INT_MASK(mask);
431 * From this point the register bank must _NOT_ be switched away
432 * to something else than bank 2 without proper locking against
433 * races with any tasklet or interrupt handlers until smc_shutdown()
434 * or smc_reset() is called.
439 * this puts the device in an inactive state
441 static void smc_shutdown(struct net_device *dev)
443 struct smc_local *lp = netdev_priv(dev);
444 void __iomem *ioaddr = lp->base;
445 struct sk_buff *pending_skb;
447 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
449 /* no more interrupts for me */
450 spin_lock(&lp->lock);
453 pending_skb = lp->pending_tx_skb;
454 lp->pending_tx_skb = NULL;
455 spin_unlock(&lp->lock);
457 dev_kfree_skb(pending_skb);
459 /* and tell the card to stay away from that nasty outside world */
461 SMC_SET_RCR(RCR_CLEAR);
462 SMC_SET_TCR(TCR_CLEAR);
465 /* finally, shut the chip down */
467 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
472 * This is the procedure to handle the receipt of a packet.
474 static inline void smc_rcv(struct net_device *dev)
476 struct smc_local *lp = netdev_priv(dev);
477 void __iomem *ioaddr = lp->base;
478 unsigned int packet_number, status, packet_len;
480 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
482 packet_number = SMC_GET_RXFIFO();
483 if (unlikely(packet_number & RXFIFO_REMPTY)) {
484 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
488 /* read from start of packet */
489 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
491 /* First two words are status and packet length */
492 SMC_GET_PKT_HDR(status, packet_len);
493 packet_len &= 0x07ff; /* mask off top bits */
494 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
495 dev->name, packet_number, status,
496 packet_len, packet_len);
499 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
500 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
501 /* accept VLAN packets */
502 status &= ~RS_TOOLONG;
505 if (packet_len < 6) {
506 /* bloody hardware */
507 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
508 dev->name, packet_len, status);
509 status |= RS_TOOSHORT;
512 SMC_SET_MMU_CMD(MC_RELEASE);
513 lp->stats.rx_errors++;
514 if (status & RS_ALGNERR)
515 lp->stats.rx_frame_errors++;
516 if (status & (RS_TOOSHORT | RS_TOOLONG))
517 lp->stats.rx_length_errors++;
518 if (status & RS_BADCRC)
519 lp->stats.rx_crc_errors++;
523 unsigned int data_len;
525 /* set multicast stats */
526 if (status & RS_MULTICAST)
527 lp->stats.multicast++;
530 * Actual payload is packet_len - 6 (or 5 if odd byte).
531 * We want skb_reserve(2) and the final ctrl word
532 * (2 bytes, possibly containing the payload odd byte).
533 * Furthermore, we add 2 bytes to allow rounding up to
534 * multiple of 4 bytes on 32 bit buses.
535 * Hence packet_len - 6 + 2 + 2 + 2.
537 skb = dev_alloc_skb(packet_len);
538 if (unlikely(skb == NULL)) {
539 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
542 SMC_SET_MMU_CMD(MC_RELEASE);
543 lp->stats.rx_dropped++;
547 /* Align IP header to 32 bits */
550 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
551 if (lp->version == 0x90)
552 status |= RS_ODDFRAME;
555 * If odd length: packet_len - 5,
556 * otherwise packet_len - 6.
557 * With the trailing ctrl byte it's packet_len - 4.
559 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
560 data = skb_put(skb, data_len);
561 SMC_PULL_DATA(data, packet_len - 4);
564 SMC_SET_MMU_CMD(MC_RELEASE);
566 PRINT_PKT(data, packet_len - 4);
568 dev->last_rx = jiffies;
570 skb->protocol = eth_type_trans(skb, dev);
572 lp->stats.rx_packets++;
573 lp->stats.rx_bytes += data_len;
579 * On SMP we have the following problem:
581 * A = smc_hardware_send_pkt()
582 * B = smc_hard_start_xmit()
583 * C = smc_interrupt()
585 * A and B can never be executed simultaneously. However, at least on UP,
586 * it is possible (and even desirable) for C to interrupt execution of
587 * A or B in order to have better RX reliability and avoid overruns.
588 * C, just like A and B, must have exclusive access to the chip and
589 * each of them must lock against any other concurrent access.
590 * Unfortunately this is not possible to have C suspend execution of A or
591 * B taking place on another CPU. On UP this is no an issue since A and B
592 * are run from softirq context and C from hard IRQ context, and there is
593 * no other CPU where concurrent access can happen.
594 * If ever there is a way to force at least B and C to always be executed
595 * on the same CPU then we could use read/write locks to protect against
596 * any other concurrent access and C would always interrupt B. But life
597 * isn't that easy in a SMP world...
599 #define smc_special_trylock(lock) \
602 local_irq_disable(); \
603 __ret = spin_trylock(lock); \
605 local_irq_enable(); \
608 #define smc_special_lock(lock) spin_lock_irq(lock)
609 #define smc_special_unlock(lock) spin_unlock_irq(lock)
611 #define smc_special_trylock(lock) (1)
612 #define smc_special_lock(lock) do { } while (0)
613 #define smc_special_unlock(lock) do { } while (0)
617 * This is called to actually send a packet to the chip.
619 static void smc_hardware_send_pkt(unsigned long data)
621 struct net_device *dev = (struct net_device *)data;
622 struct smc_local *lp = netdev_priv(dev);
623 void __iomem *ioaddr = lp->base;
625 unsigned int packet_no, len;
628 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
630 if (!smc_special_trylock(&lp->lock)) {
631 netif_stop_queue(dev);
632 tasklet_schedule(&lp->tx_task);
636 skb = lp->pending_tx_skb;
637 if (unlikely(!skb)) {
638 smc_special_unlock(&lp->lock);
641 lp->pending_tx_skb = NULL;
643 packet_no = SMC_GET_AR();
644 if (unlikely(packet_no & AR_FAILED)) {
645 printk("%s: Memory allocation failed.\n", dev->name);
646 lp->stats.tx_errors++;
647 lp->stats.tx_fifo_errors++;
648 smc_special_unlock(&lp->lock);
652 /* point to the beginning of the packet */
653 SMC_SET_PN(packet_no);
654 SMC_SET_PTR(PTR_AUTOINC);
658 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
659 dev->name, packet_no, len, len, buf);
663 * Send the packet length (+6 for status words, length, and ctl.
664 * The card will pad to 64 bytes with zeroes if packet is too small.
666 SMC_PUT_PKT_HDR(0, len + 6);
668 /* send the actual data */
669 SMC_PUSH_DATA(buf, len & ~1);
671 /* Send final ctl word with the last byte if there is one */
672 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
675 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
676 * have the effect of having at most one packet queued for TX
677 * in the chip's memory at all time.
679 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
680 * when memory allocation (MC_ALLOC) does not succeed right away.
682 if (THROTTLE_TX_PKTS)
683 netif_stop_queue(dev);
685 /* queue the packet for TX */
686 SMC_SET_MMU_CMD(MC_ENQUEUE);
687 SMC_ACK_INT(IM_TX_EMPTY_INT);
688 smc_special_unlock(&lp->lock);
690 dev->trans_start = jiffies;
691 lp->stats.tx_packets++;
692 lp->stats.tx_bytes += len;
694 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
696 done: if (!THROTTLE_TX_PKTS)
697 netif_wake_queue(dev);
703 * Since I am not sure if I will have enough room in the chip's ram
704 * to store the packet, I call this routine which either sends it
705 * now, or set the card to generates an interrupt when ready
708 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
710 struct smc_local *lp = netdev_priv(dev);
711 void __iomem *ioaddr = lp->base;
712 unsigned int numPages, poll_count, status;
714 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
716 BUG_ON(lp->pending_tx_skb != NULL);
719 * The MMU wants the number of pages to be the number of 256 bytes
720 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
722 * The 91C111 ignores the size bits, but earlier models don't.
724 * Pkt size for allocating is data length +6 (for additional status
725 * words, length and ctl)
727 * If odd size then last byte is included in ctl word.
729 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
730 if (unlikely(numPages > 7)) {
731 printk("%s: Far too big packet error.\n", dev->name);
732 lp->stats.tx_errors++;
733 lp->stats.tx_dropped++;
738 smc_special_lock(&lp->lock);
740 /* now, try to allocate the memory */
741 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
744 * Poll the chip for a short amount of time in case the
745 * allocation succeeds quickly.
747 poll_count = MEMORY_WAIT_TIME;
749 status = SMC_GET_INT();
750 if (status & IM_ALLOC_INT) {
751 SMC_ACK_INT(IM_ALLOC_INT);
754 } while (--poll_count);
756 smc_special_unlock(&lp->lock);
758 lp->pending_tx_skb = skb;
760 /* oh well, wait until the chip finds memory later */
761 netif_stop_queue(dev);
762 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
763 SMC_ENABLE_INT(IM_ALLOC_INT);
766 * Allocation succeeded: push packet to the chip's own memory
769 smc_hardware_send_pkt((unsigned long)dev);
776 * This handles a TX interrupt, which is only called when:
777 * - a TX error occurred, or
778 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
780 static void smc_tx(struct net_device *dev)
782 struct smc_local *lp = netdev_priv(dev);
783 void __iomem *ioaddr = lp->base;
784 unsigned int saved_packet, packet_no, tx_status, pkt_len;
786 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
788 /* If the TX FIFO is empty then nothing to do */
789 packet_no = SMC_GET_TXFIFO();
790 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
791 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
795 /* select packet to read from */
796 saved_packet = SMC_GET_PN();
797 SMC_SET_PN(packet_no);
799 /* read the first word (status word) from this packet */
800 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
801 SMC_GET_PKT_HDR(tx_status, pkt_len);
802 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
803 dev->name, tx_status, packet_no);
805 if (!(tx_status & ES_TX_SUC))
806 lp->stats.tx_errors++;
808 if (tx_status & ES_LOSTCARR)
809 lp->stats.tx_carrier_errors++;
811 if (tx_status & (ES_LATCOL | ES_16COL)) {
812 PRINTK("%s: %s occurred on last xmit\n", dev->name,
813 (tx_status & ES_LATCOL) ?
814 "late collision" : "too many collisions");
815 lp->stats.tx_window_errors++;
816 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
817 printk(KERN_INFO "%s: unexpectedly large number of "
818 "bad collisions. Please check duplex "
819 "setting.\n", dev->name);
823 /* kill the packet */
825 SMC_SET_MMU_CMD(MC_FREEPKT);
827 /* Don't restore Packet Number Reg until busy bit is cleared */
829 SMC_SET_PN(saved_packet);
831 /* re-enable transmit */
833 SMC_SET_TCR(lp->tcr_cur_mode);
838 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
840 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
842 struct smc_local *lp = netdev_priv(dev);
843 void __iomem *ioaddr = lp->base;
844 unsigned int mii_reg, mask;
846 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
849 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
855 SMC_SET_MII(mii_reg);
857 SMC_SET_MII(mii_reg | MII_MCLK);
862 static unsigned int smc_mii_in(struct net_device *dev, int bits)
864 struct smc_local *lp = netdev_priv(dev);
865 void __iomem *ioaddr = lp->base;
866 unsigned int mii_reg, mask, val;
868 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
869 SMC_SET_MII(mii_reg);
871 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
872 if (SMC_GET_MII() & MII_MDI)
875 SMC_SET_MII(mii_reg);
877 SMC_SET_MII(mii_reg | MII_MCLK);
885 * Reads a register from the MII Management serial interface
887 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
889 struct smc_local *lp = netdev_priv(dev);
890 void __iomem *ioaddr = lp->base;
891 unsigned int phydata;
896 smc_mii_out(dev, 0xffffffff, 32);
898 /* Start code (01) + read (10) + phyaddr + phyreg */
899 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
901 /* Turnaround (2bits) + phydata */
902 phydata = smc_mii_in(dev, 18);
904 /* Return to idle state */
905 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
907 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
908 __FUNCTION__, phyaddr, phyreg, phydata);
915 * Writes a register to the MII Management serial interface
917 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
920 struct smc_local *lp = netdev_priv(dev);
921 void __iomem *ioaddr = lp->base;
926 smc_mii_out(dev, 0xffffffff, 32);
928 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
929 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
931 /* Return to idle state */
932 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
934 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
935 __FUNCTION__, phyaddr, phyreg, phydata);
941 * Finds and reports the PHY address
943 static void smc_phy_detect(struct net_device *dev)
945 struct smc_local *lp = netdev_priv(dev);
948 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
953 * Scan all 32 PHY addresses if necessary, starting at
954 * PHY#1 to PHY#31, and then PHY#0 last.
956 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
957 unsigned int id1, id2;
959 /* Read the PHY identifiers */
960 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
961 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
963 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
964 dev->name, id1, id2);
966 /* Make sure it is a valid identifier */
967 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
968 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
969 /* Save the PHY's address */
970 lp->mii.phy_id = phyaddr & 31;
971 lp->phy_type = id1 << 16 | id2;
978 * Sets the PHY to a configuration as determined by the user
980 static int smc_phy_fixed(struct net_device *dev)
982 struct smc_local *lp = netdev_priv(dev);
983 void __iomem *ioaddr = lp->base;
984 int phyaddr = lp->mii.phy_id;
987 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
989 /* Enter Link Disable state */
990 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
991 cfg1 |= PHY_CFG1_LNKDIS;
992 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
995 * Set our fixed capabilities
996 * Disable auto-negotiation
1000 if (lp->ctl_rfduplx)
1001 bmcr |= BMCR_FULLDPLX;
1003 if (lp->ctl_rspeed == 100)
1004 bmcr |= BMCR_SPEED100;
1006 /* Write our capabilities to the phy control register */
1007 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1009 /* Re-Configure the Receive/Phy Control register */
1011 SMC_SET_RPC(lp->rpc_cur_mode);
1018 * smc_phy_reset - reset the phy
1022 * Issue a software reset for the specified PHY and
1023 * wait up to 100ms for the reset to complete. We should
1024 * not access the PHY for 50ms after issuing the reset.
1026 * The time to wait appears to be dependent on the PHY.
1028 * Must be called with lp->lock locked.
1030 static int smc_phy_reset(struct net_device *dev, int phy)
1032 struct smc_local *lp = netdev_priv(dev);
1036 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1038 for (timeout = 2; timeout; timeout--) {
1039 spin_unlock_irq(&lp->lock);
1041 spin_lock_irq(&lp->lock);
1043 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1044 if (!(bmcr & BMCR_RESET))
1048 return bmcr & BMCR_RESET;
1052 * smc_phy_powerdown - powerdown phy
1055 * Power down the specified PHY
1057 static void smc_phy_powerdown(struct net_device *dev)
1059 struct smc_local *lp = netdev_priv(dev);
1061 int phy = lp->mii.phy_id;
1063 if (lp->phy_type == 0)
1066 /* We need to ensure that no calls to smc_phy_configure are
1069 flush_scheduled_work() cannot be called because we are
1070 running with the netlink semaphore held (from
1071 devinet_ioctl()) and the pending work queue contains
1072 linkwatch_event() (scheduled by netif_carrier_off()
1073 above). linkwatch_event() also wants the netlink semaphore.
1075 while(lp->work_pending)
1078 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1079 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1083 * smc_phy_check_media - check the media status and adjust TCR
1085 * @init: set true for initialisation
1087 * Select duplex mode depending on negotiation state. This
1088 * also updates our carrier state.
1090 static void smc_phy_check_media(struct net_device *dev, int init)
1092 struct smc_local *lp = netdev_priv(dev);
1093 void __iomem *ioaddr = lp->base;
1095 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1096 /* duplex state has changed */
1097 if (lp->mii.full_duplex) {
1098 lp->tcr_cur_mode |= TCR_SWFDUP;
1100 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1104 SMC_SET_TCR(lp->tcr_cur_mode);
1109 * Configures the specified PHY through the MII management interface
1110 * using Autonegotiation.
1111 * Calls smc_phy_fixed() if the user has requested a certain config.
1112 * If RPC ANEG bit is set, the media selection is dependent purely on
1113 * the selection by the MII (either in the MII BMCR reg or the result
1114 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1115 * is controlled by the RPC SPEED and RPC DPLX bits.
1117 static void smc_phy_configure(void *data)
1119 struct net_device *dev = data;
1120 struct smc_local *lp = netdev_priv(dev);
1121 void __iomem *ioaddr = lp->base;
1122 int phyaddr = lp->mii.phy_id;
1123 int my_phy_caps; /* My PHY capabilities */
1124 int my_ad_caps; /* My Advertised capabilities */
1127 DBG(3, "%s:smc_program_phy()\n", dev->name);
1129 spin_lock_irq(&lp->lock);
1132 * We should not be called if phy_type is zero.
1134 if (lp->phy_type == 0)
1135 goto smc_phy_configure_exit;
1137 if (smc_phy_reset(dev, phyaddr)) {
1138 printk("%s: PHY reset timed out\n", dev->name);
1139 goto smc_phy_configure_exit;
1143 * Enable PHY Interrupts (for register 18)
1144 * Interrupts listed here are disabled
1146 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1147 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1148 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1149 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1151 /* Configure the Receive/Phy Control register */
1153 SMC_SET_RPC(lp->rpc_cur_mode);
1155 /* If the user requested no auto neg, then go set his request */
1156 if (lp->mii.force_media) {
1158 goto smc_phy_configure_exit;
1161 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1162 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1164 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1165 printk(KERN_INFO "Auto negotiation NOT supported\n");
1167 goto smc_phy_configure_exit;
1170 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1172 if (my_phy_caps & BMSR_100BASE4)
1173 my_ad_caps |= ADVERTISE_100BASE4;
1174 if (my_phy_caps & BMSR_100FULL)
1175 my_ad_caps |= ADVERTISE_100FULL;
1176 if (my_phy_caps & BMSR_100HALF)
1177 my_ad_caps |= ADVERTISE_100HALF;
1178 if (my_phy_caps & BMSR_10FULL)
1179 my_ad_caps |= ADVERTISE_10FULL;
1180 if (my_phy_caps & BMSR_10HALF)
1181 my_ad_caps |= ADVERTISE_10HALF;
1183 /* Disable capabilities not selected by our user */
1184 if (lp->ctl_rspeed != 100)
1185 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1187 if (!lp->ctl_rfduplx)
1188 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1190 /* Update our Auto-Neg Advertisement Register */
1191 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1192 lp->mii.advertising = my_ad_caps;
1195 * Read the register back. Without this, it appears that when
1196 * auto-negotiation is restarted, sometimes it isn't ready and
1197 * the link does not come up.
1199 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1201 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1202 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1204 /* Restart auto-negotiation process in order to advertise my caps */
1205 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1207 smc_phy_check_media(dev, 1);
1209 smc_phy_configure_exit:
1210 spin_unlock_irq(&lp->lock);
1211 lp->work_pending = 0;
1217 * Purpose: Handle interrupts relating to PHY register 18. This is
1218 * called from the "hard" interrupt handler under our private spinlock.
1220 static void smc_phy_interrupt(struct net_device *dev)
1222 struct smc_local *lp = netdev_priv(dev);
1223 int phyaddr = lp->mii.phy_id;
1226 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1228 if (lp->phy_type == 0)
1232 smc_phy_check_media(dev, 0);
1234 /* Read PHY Register 18, Status Output */
1235 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1236 if ((phy18 & PHY_INT_INT) == 0)
1241 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1243 static void smc_10bt_check_media(struct net_device *dev, int init)
1245 struct smc_local *lp = netdev_priv(dev);
1246 void __iomem *ioaddr = lp->base;
1247 unsigned int old_carrier, new_carrier;
1249 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1252 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1255 if (init || (old_carrier != new_carrier)) {
1257 netif_carrier_off(dev);
1259 netif_carrier_on(dev);
1261 if (netif_msg_link(lp))
1262 printk(KERN_INFO "%s: link %s\n", dev->name,
1263 new_carrier ? "up" : "down");
1267 static void smc_eph_interrupt(struct net_device *dev)
1269 struct smc_local *lp = netdev_priv(dev);
1270 void __iomem *ioaddr = lp->base;
1273 smc_10bt_check_media(dev, 0);
1276 ctl = SMC_GET_CTL();
1277 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1283 * This is the main routine of the driver, to handle the device when
1284 * it needs some attention.
1286 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1288 struct net_device *dev = dev_id;
1289 struct smc_local *lp = netdev_priv(dev);
1290 void __iomem *ioaddr = lp->base;
1291 int status, mask, timeout, card_stats;
1294 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1296 spin_lock(&lp->lock);
1298 /* A preamble may be used when there is a potential race
1299 * between the interruptible transmit functions and this
1301 SMC_INTERRUPT_PREAMBLE;
1303 saved_pointer = SMC_GET_PTR();
1304 mask = SMC_GET_INT_MASK();
1305 SMC_SET_INT_MASK(0);
1307 /* set a timeout value, so I don't stay here forever */
1311 status = SMC_GET_INT();
1313 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1314 dev->name, status, mask,
1315 ({ int meminfo; SMC_SELECT_BANK(0);
1316 meminfo = SMC_GET_MIR();
1317 SMC_SELECT_BANK(2); meminfo; }),
1324 if (status & IM_TX_INT) {
1325 /* do this before RX as it will free memory quickly */
1326 DBG(3, "%s: TX int\n", dev->name);
1328 SMC_ACK_INT(IM_TX_INT);
1329 if (THROTTLE_TX_PKTS)
1330 netif_wake_queue(dev);
1331 } else if (status & IM_RCV_INT) {
1332 DBG(3, "%s: RX irq\n", dev->name);
1334 } else if (status & IM_ALLOC_INT) {
1335 DBG(3, "%s: Allocation irq\n", dev->name);
1336 tasklet_hi_schedule(&lp->tx_task);
1337 mask &= ~IM_ALLOC_INT;
1338 } else if (status & IM_TX_EMPTY_INT) {
1339 DBG(3, "%s: TX empty\n", dev->name);
1340 mask &= ~IM_TX_EMPTY_INT;
1344 card_stats = SMC_GET_COUNTER();
1347 /* single collisions */
1348 lp->stats.collisions += card_stats & 0xF;
1351 /* multiple collisions */
1352 lp->stats.collisions += card_stats & 0xF;
1353 } else if (status & IM_RX_OVRN_INT) {
1354 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1355 ({ int eph_st; SMC_SELECT_BANK(0);
1356 eph_st = SMC_GET_EPH_STATUS();
1357 SMC_SELECT_BANK(2); eph_st; }) );
1358 SMC_ACK_INT(IM_RX_OVRN_INT);
1359 lp->stats.rx_errors++;
1360 lp->stats.rx_fifo_errors++;
1361 } else if (status & IM_EPH_INT) {
1362 smc_eph_interrupt(dev);
1363 } else if (status & IM_MDINT) {
1364 SMC_ACK_INT(IM_MDINT);
1365 smc_phy_interrupt(dev);
1366 } else if (status & IM_ERCV_INT) {
1367 SMC_ACK_INT(IM_ERCV_INT);
1368 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1370 } while (--timeout);
1372 /* restore register states */
1373 SMC_SET_PTR(saved_pointer);
1374 SMC_SET_INT_MASK(mask);
1376 spin_unlock(&lp->lock);
1378 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1381 * We return IRQ_HANDLED unconditionally here even if there was
1382 * nothing to do. There is a possibility that a packet might
1383 * get enqueued into the chip right after TX_EMPTY_INT is raised
1384 * but just before the CPU acknowledges the IRQ.
1385 * Better take an unneeded IRQ in some occasions than complexifying
1386 * the code for all cases.
1391 #ifdef CONFIG_NET_POLL_CONTROLLER
1393 * Polling receive - used by netconsole and other diagnostic tools
1394 * to allow network i/o with interrupts disabled.
1396 static void smc_poll_controller(struct net_device *dev)
1398 disable_irq(dev->irq);
1399 smc_interrupt(dev->irq, dev, NULL);
1400 enable_irq(dev->irq);
1404 /* Our watchdog timed out. Called by the networking layer */
1405 static void smc_timeout(struct net_device *dev)
1407 struct smc_local *lp = netdev_priv(dev);
1408 void __iomem *ioaddr = lp->base;
1409 int status, mask, eph_st, meminfo, fifo;
1411 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1413 spin_lock_irq(&lp->lock);
1414 status = SMC_GET_INT();
1415 mask = SMC_GET_INT_MASK();
1416 fifo = SMC_GET_FIFO();
1418 eph_st = SMC_GET_EPH_STATUS();
1419 meminfo = SMC_GET_MIR();
1421 spin_unlock_irq(&lp->lock);
1422 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1423 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1424 dev->name, status, mask, meminfo, fifo, eph_st );
1430 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1431 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1432 * which calls schedule(). Hence we use a work queue.
1434 if (lp->phy_type != 0) {
1435 if (schedule_work(&lp->phy_configure)) {
1436 lp->work_pending = 1;
1440 /* We can accept TX packets again */
1441 dev->trans_start = jiffies;
1442 netif_wake_queue(dev);
1446 * This routine will, depending on the values passed to it,
1447 * either make it accept multicast packets, go into
1448 * promiscuous mode (for TCPDUMP and cousins) or accept
1449 * a select set of multicast packets
1451 static void smc_set_multicast_list(struct net_device *dev)
1453 struct smc_local *lp = netdev_priv(dev);
1454 void __iomem *ioaddr = lp->base;
1455 unsigned char multicast_table[8];
1456 int update_multicast = 0;
1458 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1460 if (dev->flags & IFF_PROMISC) {
1461 DBG(2, "%s: RCR_PRMS\n", dev->name);
1462 lp->rcr_cur_mode |= RCR_PRMS;
1465 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1466 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1467 when promiscuous mode is turned on.
1471 * Here, I am setting this to accept all multicast packets.
1472 * I don't need to zero the multicast table, because the flag is
1473 * checked before the table is
1475 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1476 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1477 lp->rcr_cur_mode |= RCR_ALMUL;
1481 * This sets the internal hardware table to filter out unwanted
1482 * multicast packets before they take up memory.
1484 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1485 * address are the offset into the table. If that bit is 1, then the
1486 * multicast packet is accepted. Otherwise, it's dropped silently.
1488 * To use the 6 bits as an offset into the table, the high 3 bits are
1489 * the number of the 8 bit register, while the low 3 bits are the bit
1490 * within that register.
1492 else if (dev->mc_count) {
1494 struct dev_mc_list *cur_addr;
1496 /* table for flipping the order of 3 bits */
1497 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1499 /* start with a table of all zeros: reject all */
1500 memset(multicast_table, 0, sizeof(multicast_table));
1502 cur_addr = dev->mc_list;
1503 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1506 /* do we have a pointer here? */
1509 /* make sure this is a multicast address -
1510 shouldn't this be a given if we have it here ? */
1511 if (!(*cur_addr->dmi_addr & 1))
1514 /* only use the low order bits */
1515 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1517 /* do some messy swapping to put the bit in the right spot */
1518 multicast_table[invert3[position&7]] |=
1519 (1<<invert3[(position>>3)&7]);
1522 /* be sure I get rid of flags I might have set */
1523 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1525 /* now, the table can be loaded into the chipset */
1526 update_multicast = 1;
1528 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1529 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1532 * since I'm disabling all multicast entirely, I need to
1533 * clear the multicast list
1535 memset(multicast_table, 0, sizeof(multicast_table));
1536 update_multicast = 1;
1539 spin_lock_irq(&lp->lock);
1541 SMC_SET_RCR(lp->rcr_cur_mode);
1542 if (update_multicast) {
1544 SMC_SET_MCAST(multicast_table);
1547 spin_unlock_irq(&lp->lock);
1552 * Open and Initialize the board
1554 * Set up everything, reset the card, etc..
1557 smc_open(struct net_device *dev)
1559 struct smc_local *lp = netdev_priv(dev);
1561 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1564 * Check that the address is valid. If its not, refuse
1565 * to bring the device up. The user must specify an
1566 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1568 if (!is_valid_ether_addr(dev->dev_addr)) {
1569 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1573 /* Setup the default Register Modes */
1574 lp->tcr_cur_mode = TCR_DEFAULT;
1575 lp->rcr_cur_mode = RCR_DEFAULT;
1576 lp->rpc_cur_mode = RPC_DEFAULT;
1579 * If we are not using a MII interface, we need to
1580 * monitor our own carrier signal to detect faults.
1582 if (lp->phy_type == 0)
1583 lp->tcr_cur_mode |= TCR_MON_CSN;
1585 /* reset the hardware */
1589 /* Configure the PHY, initialize the link state */
1590 if (lp->phy_type != 0)
1591 smc_phy_configure(dev);
1593 spin_lock_irq(&lp->lock);
1594 smc_10bt_check_media(dev, 1);
1595 spin_unlock_irq(&lp->lock);
1598 netif_start_queue(dev);
1605 * this makes the board clean up everything that it can
1606 * and not talk to the outside world. Caused by
1607 * an 'ifconfig ethX down'
1609 static int smc_close(struct net_device *dev)
1611 struct smc_local *lp = netdev_priv(dev);
1613 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1615 netif_stop_queue(dev);
1616 netif_carrier_off(dev);
1618 /* clear everything */
1620 tasklet_kill(&lp->tx_task);
1621 smc_phy_powerdown(dev);
1626 * Get the current statistics.
1627 * This may be called with the card open or closed.
1629 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1631 struct smc_local *lp = netdev_priv(dev);
1633 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1642 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1644 struct smc_local *lp = netdev_priv(dev);
1650 if (lp->phy_type != 0) {
1651 spin_lock_irq(&lp->lock);
1652 ret = mii_ethtool_gset(&lp->mii, cmd);
1653 spin_unlock_irq(&lp->lock);
1655 cmd->supported = SUPPORTED_10baseT_Half |
1656 SUPPORTED_10baseT_Full |
1657 SUPPORTED_TP | SUPPORTED_AUI;
1659 if (lp->ctl_rspeed == 10)
1660 cmd->speed = SPEED_10;
1661 else if (lp->ctl_rspeed == 100)
1662 cmd->speed = SPEED_100;
1664 cmd->autoneg = AUTONEG_DISABLE;
1665 cmd->transceiver = XCVR_INTERNAL;
1667 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1676 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1678 struct smc_local *lp = netdev_priv(dev);
1681 if (lp->phy_type != 0) {
1682 spin_lock_irq(&lp->lock);
1683 ret = mii_ethtool_sset(&lp->mii, cmd);
1684 spin_unlock_irq(&lp->lock);
1686 if (cmd->autoneg != AUTONEG_DISABLE ||
1687 cmd->speed != SPEED_10 ||
1688 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1689 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1692 // lp->port = cmd->port;
1693 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1695 // if (netif_running(dev))
1696 // smc_set_port(dev);
1705 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1707 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1708 strncpy(info->version, version, sizeof(info->version));
1709 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1712 static int smc_ethtool_nwayreset(struct net_device *dev)
1714 struct smc_local *lp = netdev_priv(dev);
1717 if (lp->phy_type != 0) {
1718 spin_lock_irq(&lp->lock);
1719 ret = mii_nway_restart(&lp->mii);
1720 spin_unlock_irq(&lp->lock);
1726 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1728 struct smc_local *lp = netdev_priv(dev);
1729 return lp->msg_enable;
1732 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1734 struct smc_local *lp = netdev_priv(dev);
1735 lp->msg_enable = level;
1738 static struct ethtool_ops smc_ethtool_ops = {
1739 .get_settings = smc_ethtool_getsettings,
1740 .set_settings = smc_ethtool_setsettings,
1741 .get_drvinfo = smc_ethtool_getdrvinfo,
1743 .get_msglevel = smc_ethtool_getmsglevel,
1744 .set_msglevel = smc_ethtool_setmsglevel,
1745 .nway_reset = smc_ethtool_nwayreset,
1746 .get_link = ethtool_op_get_link,
1747 // .get_eeprom = smc_ethtool_geteeprom,
1748 // .set_eeprom = smc_ethtool_seteeprom,
1754 * This routine has a simple purpose -- make the SMC chip generate an
1755 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1758 * does this still work?
1760 * I just deleted auto_irq.c, since it was never built...
1763 static int __init smc_findirq(void __iomem *ioaddr)
1766 unsigned long cookie;
1768 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1770 cookie = probe_irq_on();
1773 * What I try to do here is trigger an ALLOC_INT. This is done
1774 * by allocating a small chunk of memory, which will give an interrupt
1777 /* enable ALLOCation interrupts ONLY */
1779 SMC_SET_INT_MASK(IM_ALLOC_INT);
1782 * Allocate 512 bytes of memory. Note that the chip was just
1783 * reset so all the memory is available
1785 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1788 * Wait until positive that the interrupt has been generated
1793 int_status = SMC_GET_INT();
1794 if (int_status & IM_ALLOC_INT)
1795 break; /* got the interrupt */
1796 } while (--timeout);
1799 * there is really nothing that I can do here if timeout fails,
1800 * as autoirq_report will return a 0 anyway, which is what I
1801 * want in this case. Plus, the clean up is needed in both
1805 /* and disable all interrupts again */
1806 SMC_SET_INT_MASK(0);
1808 /* and return what I found */
1809 return probe_irq_off(cookie);
1813 * Function: smc_probe(unsigned long ioaddr)
1816 * Tests to see if a given ioaddr points to an SMC91x chip.
1817 * Returns a 0 on success
1820 * (1) see if the high byte of BANK_SELECT is 0x33
1821 * (2) compare the ioaddr with the base register's address
1822 * (3) see if I recognize the chip ID in the appropriate register
1824 * Here I do typical initialization tasks.
1826 * o Initialize the structure if needed
1827 * o print out my vanity message if not done so already
1828 * o print out what type of hardware is detected
1829 * o print out the ethernet address
1831 * o set up my private data
1832 * o configure the dev structure with my subroutines
1833 * o actually GRAB the irq.
1836 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1838 struct smc_local *lp = netdev_priv(dev);
1839 static int version_printed = 0;
1841 unsigned int val, revision_register;
1842 const char *version_string;
1844 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1846 /* First, see if the high byte is 0x33 */
1847 val = SMC_CURRENT_BANK();
1848 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1849 if ((val & 0xFF00) != 0x3300) {
1850 if ((val & 0xFF) == 0x33) {
1852 "%s: Detected possible byte-swapped interface"
1853 " at IOADDR %p\n", CARDNAME, ioaddr);
1860 * The above MIGHT indicate a device, but I need to write to
1861 * further test this.
1864 val = SMC_CURRENT_BANK();
1865 if ((val & 0xFF00) != 0x3300) {
1871 * well, we've already written once, so hopefully another
1872 * time won't hurt. This time, I need to switch the bank
1873 * register to bank 1, so I can access the base address
1877 val = SMC_GET_BASE();
1878 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1879 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1880 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1881 CARDNAME, ioaddr, val);
1885 * check if the revision register is something that I
1886 * recognize. These might need to be added to later,
1887 * as future revisions could be added.
1890 revision_register = SMC_GET_REV();
1891 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1892 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1893 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1894 /* I don't recognize this chip, so... */
1895 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1896 ", Contact author.\n", CARDNAME,
1897 ioaddr, revision_register);
1903 /* At this point I'll assume that the chip is an SMC91x. */
1904 if (version_printed++ == 0)
1905 printk("%s", version);
1907 /* fill in some of the fields */
1908 dev->base_addr = (unsigned long)ioaddr;
1910 lp->version = revision_register & 0xff;
1911 spin_lock_init(&lp->lock);
1913 /* Get the MAC address */
1915 SMC_GET_MAC_ADDR(dev->dev_addr);
1917 /* now, reset the chip, and put it into a known state */
1921 * If dev->irq is 0, then the device has to be banged on to see
1924 * This banging doesn't always detect the IRQ, for unknown reasons.
1925 * a workaround is to reset the chip and try again.
1927 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1928 * be what is requested on the command line. I don't do that, mostly
1929 * because the card that I have uses a non-standard method of accessing
1930 * the IRQs, and because this _should_ work in most configurations.
1932 * Specifying an IRQ is done with the assumption that the user knows
1933 * what (s)he is doing. No checking is done!!!!
1940 dev->irq = smc_findirq(ioaddr);
1943 /* kick the card and try again */
1947 if (dev->irq == 0) {
1948 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1953 dev->irq = irq_canonicalize(dev->irq);
1955 /* Fill in the fields of the device structure with ethernet values. */
1958 dev->open = smc_open;
1959 dev->stop = smc_close;
1960 dev->hard_start_xmit = smc_hard_start_xmit;
1961 dev->tx_timeout = smc_timeout;
1962 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1963 dev->get_stats = smc_query_statistics;
1964 dev->set_multicast_list = smc_set_multicast_list;
1965 dev->ethtool_ops = &smc_ethtool_ops;
1966 #ifdef CONFIG_NET_POLL_CONTROLLER
1967 dev->poll_controller = smc_poll_controller;
1970 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1971 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1972 lp->mii.phy_id_mask = 0x1f;
1973 lp->mii.reg_num_mask = 0x1f;
1974 lp->mii.force_media = 0;
1975 lp->mii.full_duplex = 0;
1977 lp->mii.mdio_read = smc_phy_read;
1978 lp->mii.mdio_write = smc_phy_write;
1981 * Locate the phy, if any.
1983 if (lp->version >= (CHIP_91100 << 4))
1984 smc_phy_detect(dev);
1986 /* Set default parameters */
1987 lp->msg_enable = NETIF_MSG_LINK;
1988 lp->ctl_rfduplx = 0;
1989 lp->ctl_rspeed = 10;
1991 if (lp->version >= (CHIP_91100 << 4)) {
1992 lp->ctl_rfduplx = 1;
1993 lp->ctl_rspeed = 100;
1997 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
2001 set_irq_type(dev->irq, IRQT_RISING);
2003 #ifdef SMC_USE_PXA_DMA
2005 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2006 smc_pxa_dma_irq, NULL);
2012 retval = register_netdev(dev);
2014 /* now, print out the card info, in a short format.. */
2015 printk("%s: %s (rev %d) at %p IRQ %d",
2016 dev->name, version_string, revision_register & 0x0f,
2017 lp->base, dev->irq);
2019 if (dev->dma != (unsigned char)-1)
2020 printk(" DMA %d", dev->dma);
2022 printk("%s%s\n", nowait ? " [nowait]" : "",
2023 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2025 if (!is_valid_ether_addr(dev->dev_addr)) {
2026 printk("%s: Invalid ethernet MAC address. Please "
2027 "set using ifconfig\n", dev->name);
2029 /* Print the Ethernet address */
2030 printk("%s: Ethernet addr: ", dev->name);
2031 for (i = 0; i < 5; i++)
2032 printk("%2.2x:", dev->dev_addr[i]);
2033 printk("%2.2x\n", dev->dev_addr[5]);
2036 if (lp->phy_type == 0) {
2037 PRINTK("%s: No PHY found\n", dev->name);
2038 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2039 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2040 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2041 PRINTK("%s: PHY LAN83C180\n", dev->name);
2046 #ifdef SMC_USE_PXA_DMA
2047 if (retval && dev->dma != (unsigned char)-1)
2048 pxa_free_dma(dev->dma);
2053 static int smc_enable_device(struct platform_device *pdev)
2055 unsigned long flags;
2056 unsigned char ecor, ecsr;
2058 struct resource * res;
2060 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2065 * Map the attribute space. This is overkill, but clean.
2067 addr = ioremap(res->start, ATTRIB_SIZE);
2072 * Reset the device. We must disable IRQs around this
2073 * since a reset causes the IRQ line become active.
2075 local_irq_save(flags);
2076 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2077 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2078 readb(addr + (ECOR << SMC_IO_SHIFT));
2081 * Wait 100us for the chip to reset.
2086 * The device will ignore all writes to the enable bit while
2087 * reset is asserted, even if the reset bit is cleared in the
2088 * same write. Must clear reset first, then enable the device.
2090 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2091 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2094 * Set the appropriate byte/word mode.
2096 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2097 #ifndef SMC_CAN_USE_16BIT
2100 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2101 local_irq_restore(flags);
2106 * Wait for the chip to wake up. We could poll the control
2107 * register in the main register space, but that isn't mapped
2108 * yet. We know this is going to take 750us.
2115 static int smc_request_attrib(struct platform_device *pdev)
2117 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2122 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2128 static void smc_release_attrib(struct platform_device *pdev)
2130 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2133 release_mem_region(res->start, ATTRIB_SIZE);
2136 #ifdef SMC_CAN_USE_DATACS
2137 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2139 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2140 struct smc_local *lp = netdev_priv(ndev);
2145 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2146 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2150 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2153 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2155 struct smc_local *lp = netdev_priv(ndev);
2156 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2159 iounmap(lp->datacs);
2164 release_mem_region(res->start, SMC_DATA_EXTENT);
2167 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2168 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2174 * dev->base_addr == 0, try to find all possible locations
2175 * dev->base_addr > 0x1ff, this is the address to check
2176 * dev->base_addr == <anything else>, return failure code
2179 * 0 --> there is a device
2180 * anything else, error
2182 static int smc_drv_probe(struct device *dev)
2184 struct platform_device *pdev = to_platform_device(dev);
2185 struct net_device *ndev;
2186 struct resource *res;
2187 unsigned int __iomem *addr;
2190 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2192 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2199 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2204 ndev = alloc_etherdev(sizeof(struct smc_local));
2206 printk("%s: could not allocate device.\n", CARDNAME);
2208 goto out_release_io;
2210 SET_MODULE_OWNER(ndev);
2211 SET_NETDEV_DEV(ndev, dev);
2213 ndev->dma = (unsigned char)-1;
2214 ndev->irq = platform_get_irq(pdev, 0);
2216 ret = smc_request_attrib(pdev);
2218 goto out_free_netdev;
2219 #if defined(CONFIG_SA1100_ASSABET)
2220 NCR_0 |= NCR_ENET_OSC_EN;
2222 ret = smc_enable_device(pdev);
2224 goto out_release_attrib;
2226 addr = ioremap(res->start, SMC_IO_EXTENT);
2229 goto out_release_attrib;
2232 dev_set_drvdata(dev, ndev);
2233 ret = smc_probe(ndev, addr);
2236 #ifdef SMC_USE_PXA_DMA
2238 struct smc_local *lp = netdev_priv(ndev);
2239 lp->physaddr = res->start;
2243 smc_request_datacs(pdev, ndev);
2248 dev_set_drvdata(dev, NULL);
2251 smc_release_attrib(pdev);
2255 release_mem_region(res->start, SMC_IO_EXTENT);
2257 printk("%s: not found (%d).\n", CARDNAME, ret);
2262 static int smc_drv_remove(struct device *dev)
2264 struct platform_device *pdev = to_platform_device(dev);
2265 struct net_device *ndev = dev_get_drvdata(dev);
2266 struct smc_local *lp = netdev_priv(ndev);
2267 struct resource *res;
2269 dev_set_drvdata(dev, NULL);
2271 unregister_netdev(ndev);
2273 free_irq(ndev->irq, ndev);
2275 #ifdef SMC_USE_PXA_DMA
2276 if (ndev->dma != (unsigned char)-1)
2277 pxa_free_dma(ndev->dma);
2281 smc_release_datacs(pdev,ndev);
2282 smc_release_attrib(pdev);
2284 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2286 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2287 release_mem_region(res->start, SMC_IO_EXTENT);
2294 static int smc_drv_suspend(struct device *dev, pm_message_t state, u32 level)
2296 struct net_device *ndev = dev_get_drvdata(dev);
2298 if (ndev && level == SUSPEND_DISABLE) {
2299 if (netif_running(ndev)) {
2300 netif_device_detach(ndev);
2302 smc_phy_powerdown(ndev);
2308 static int smc_drv_resume(struct device *dev, u32 level)
2310 struct platform_device *pdev = to_platform_device(dev);
2311 struct net_device *ndev = dev_get_drvdata(dev);
2313 if (ndev && level == RESUME_ENABLE) {
2314 struct smc_local *lp = netdev_priv(ndev);
2315 smc_enable_device(pdev);
2316 if (netif_running(ndev)) {
2319 if (lp->phy_type != 0)
2320 smc_phy_configure(ndev);
2321 netif_device_attach(ndev);
2327 static struct device_driver smc_driver = {
2329 .bus = &platform_bus_type,
2330 .probe = smc_drv_probe,
2331 .remove = smc_drv_remove,
2332 .suspend = smc_drv_suspend,
2333 .resume = smc_drv_resume,
2336 static int __init smc_init(void)
2342 "%s: You shouldn't use auto-probing with insmod!\n",
2347 return driver_register(&smc_driver);
2350 static void __exit smc_cleanup(void)
2352 driver_unregister(&smc_driver);
2355 module_init(smc_init);
2356 module_exit(smc_cleanup);