1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005, 2006 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.1.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 #define MYRI10GE_ALLOC_ORDER 0
96 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
97 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
99 struct myri10ge_rx_buffer_state {
102 DECLARE_PCI_UNMAP_ADDR(bus)
103 DECLARE_PCI_UNMAP_LEN(len)
106 struct myri10ge_tx_buffer_state {
109 DECLARE_PCI_UNMAP_ADDR(bus)
110 DECLARE_PCI_UNMAP_LEN(len)
113 struct myri10ge_cmd {
119 struct myri10ge_rx_buf {
120 struct mcp_kreq_ether_recv __iomem *lanai; /* lanai ptr for recv ring */
121 u8 __iomem *wc_fifo; /* w/c rx dma addr fifo address */
122 struct mcp_kreq_ether_recv *shadow; /* host shadow of recv ring */
123 struct myri10ge_rx_buffer_state *info;
130 int mask; /* number of rx slots -1 */
134 struct myri10ge_tx_buf {
135 struct mcp_kreq_ether_send __iomem *lanai; /* lanai ptr for sendq */
136 u8 __iomem *wc_fifo; /* w/c send fifo address */
137 struct mcp_kreq_ether_send *req_list; /* host shadow of sendq */
139 struct myri10ge_tx_buffer_state *info;
140 int mask; /* number of transmit slots -1 */
141 int boundary; /* boundary transmits cannot cross */
142 int req ____cacheline_aligned; /* transmit slots submitted */
143 int pkt_start; /* packets started */
144 int done ____cacheline_aligned; /* transmit slots completed */
145 int pkt_done; /* packets completed */
148 struct myri10ge_rx_done {
149 struct mcp_slot *entry;
155 struct myri10ge_priv {
156 int running; /* running? */
157 int csum_flag; /* rx_csums? */
158 struct myri10ge_tx_buf tx; /* transmit ring */
159 struct myri10ge_rx_buf rx_small;
160 struct myri10ge_rx_buf rx_big;
161 struct myri10ge_rx_done rx_done;
164 struct net_device *dev;
165 struct net_device_stats stats;
168 unsigned long board_span;
169 unsigned long iomem_base;
170 __be32 __iomem *irq_claim;
171 __be32 __iomem *irq_deassert;
172 char *mac_addr_string;
173 struct mcp_cmd_response *cmd;
175 struct mcp_irq_data *fw_stats;
176 dma_addr_t fw_stats_bus;
177 struct pci_dev *pdev;
180 unsigned int rdma_tags_available;
182 __be32 __iomem *intr_coal_delay_ptr;
187 wait_queue_head_t down_wq;
188 struct work_struct watchdog_work;
189 struct timer_list watchdog_timer;
190 int watchdog_tx_done;
196 char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
197 char fw_version[128];
198 u8 mac_addr[6]; /* eeprom mac address */
199 unsigned long serial_number;
200 int vendor_specific_offset;
201 int fw_multicast_support;
211 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
212 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
214 static char *myri10ge_fw_name = NULL;
215 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
216 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name\n");
218 static int myri10ge_ecrc_enable = 1;
219 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
220 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E\n");
222 static int myri10ge_max_intr_slots = 1024;
223 module_param(myri10ge_max_intr_slots, int, S_IRUGO);
224 MODULE_PARM_DESC(myri10ge_max_intr_slots, "Interrupt queue slots\n");
226 static int myri10ge_small_bytes = -1; /* -1 == auto */
227 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
228 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets\n");
230 static int myri10ge_msi = 1; /* enable msi by default */
231 module_param(myri10ge_msi, int, S_IRUGO);
232 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n");
234 static int myri10ge_intr_coal_delay = 25;
235 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
236 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n");
238 static int myri10ge_flow_control = 1;
239 module_param(myri10ge_flow_control, int, S_IRUGO);
240 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter\n");
242 static int myri10ge_deassert_wait = 1;
243 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
244 MODULE_PARM_DESC(myri10ge_deassert_wait,
245 "Wait when deasserting legacy interrupts\n");
247 static int myri10ge_force_firmware = 0;
248 module_param(myri10ge_force_firmware, int, S_IRUGO);
249 MODULE_PARM_DESC(myri10ge_force_firmware,
250 "Force firmware to assume aligned completions\n");
252 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
253 module_param(myri10ge_initial_mtu, int, S_IRUGO);
254 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU\n");
256 static int myri10ge_napi_weight = 64;
257 module_param(myri10ge_napi_weight, int, S_IRUGO);
258 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight\n");
260 static int myri10ge_watchdog_timeout = 1;
261 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
262 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout\n");
264 static int myri10ge_max_irq_loops = 1048576;
265 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
266 MODULE_PARM_DESC(myri10ge_max_irq_loops,
267 "Set stuck legacy IRQ detection threshold\n");
269 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
271 static int myri10ge_debug = -1; /* defaults above */
272 module_param(myri10ge_debug, int, 0);
273 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
275 static int myri10ge_fill_thresh = 256;
276 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
277 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n");
279 #define MYRI10GE_FW_OFFSET 1024*1024
280 #define MYRI10GE_HIGHPART_TO_U32(X) \
281 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
282 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
284 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
286 static inline void put_be32(__be32 val, __be32 __iomem * p)
288 __raw_writel((__force __u32) val, (__force void __iomem *)p);
292 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
293 struct myri10ge_cmd *data, int atomic)
296 char buf_bytes[sizeof(*buf) + 8];
297 struct mcp_cmd_response *response = mgp->cmd;
298 char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
299 u32 dma_low, dma_high, result, value;
302 /* ensure buf is aligned to 8 bytes */
303 buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
305 buf->data0 = htonl(data->data0);
306 buf->data1 = htonl(data->data1);
307 buf->data2 = htonl(data->data2);
308 buf->cmd = htonl(cmd);
309 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
310 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
312 buf->response_addr.low = htonl(dma_low);
313 buf->response_addr.high = htonl(dma_high);
314 response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
316 myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
318 /* wait up to 15ms. Longest command is the DMA benchmark,
319 * which is capped at 5ms, but runs from a timeout handler
320 * that runs every 7.8ms. So a 15ms timeout leaves us with
324 /* if atomic is set, do not sleep,
325 * and try to get the completion quickly
326 * (1ms will be enough for those commands) */
327 for (sleep_total = 0;
329 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
333 /* use msleep for most command */
334 for (sleep_total = 0;
336 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
341 result = ntohl(response->result);
342 value = ntohl(response->data);
343 if (result != MYRI10GE_NO_RESPONSE_RESULT) {
347 } else if (result == MXGEFW_CMD_UNKNOWN) {
350 dev_err(&mgp->pdev->dev,
351 "command %d failed, result = %d\n",
357 dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
363 * The eeprom strings on the lanaiX have the format
366 * PT:ddd mmm xx xx:xx:xx xx\0
367 * PV:ddd mmm xx xx:xx:xx xx\0
369 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
374 ptr = mgp->eeprom_strings;
375 limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
377 while (*ptr != '\0' && ptr < limit) {
378 if (memcmp(ptr, "MAC=", 4) == 0) {
380 mgp->mac_addr_string = ptr;
381 for (i = 0; i < 6; i++) {
382 if ((ptr + 2) > limit)
385 simple_strtoul(ptr, &ptr, 16);
389 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
391 mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
393 while (ptr < limit && *ptr++) ;
399 dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
404 * Enable or disable periodic RDMAs from the host to make certain
405 * chipsets resend dropped PCIe messages
408 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
410 char __iomem *submit;
412 u32 dma_low, dma_high;
415 /* clear confirmation addr */
419 /* send a rdma command to the PCIe engine, and wait for the
420 * response in the confirmation address. The firmware should
421 * write a -1 there to indicate it is alive and well
423 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
424 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
426 buf[0] = htonl(dma_high); /* confirm addr MSW */
427 buf[1] = htonl(dma_low); /* confirm addr LSW */
428 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
429 buf[3] = htonl(dma_high); /* dummy addr MSW */
430 buf[4] = htonl(dma_low); /* dummy addr LSW */
431 buf[5] = htonl(enable); /* enable? */
433 submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
435 myri10ge_pio_copy(submit, &buf, sizeof(buf));
436 for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
438 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
439 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
440 (enable ? "enable" : "disable"));
444 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
445 struct mcp_gen_header *hdr)
447 struct device *dev = &mgp->pdev->dev;
450 /* check firmware type */
451 if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
452 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
456 /* save firmware version for ethtool */
457 strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
459 sscanf(mgp->fw_version, "%d.%d", &major, &minor);
461 if (!(major == MXGEFW_VERSION_MAJOR && minor == MXGEFW_VERSION_MINOR)) {
462 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
463 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
464 MXGEFW_VERSION_MINOR);
470 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
472 unsigned crc, reread_crc;
473 const struct firmware *fw;
474 struct device *dev = &mgp->pdev->dev;
475 struct mcp_gen_header *hdr;
480 if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
481 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
484 goto abort_with_nothing;
489 if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
490 fw->size < MCP_HEADER_PTR_OFFSET + 4) {
491 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
497 hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
498 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
499 dev_err(dev, "Bad firmware file\n");
503 hdr = (void *)(fw->data + hdr_offset);
505 status = myri10ge_validate_firmware(mgp, hdr);
509 crc = crc32(~0, fw->data, fw->size);
510 for (i = 0; i < fw->size; i += 256) {
511 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
513 min(256U, (unsigned)(fw->size - i)));
517 /* corruption checking is good for parity recovery and buggy chipset */
518 memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
519 reread_crc = crc32(~0, fw->data, fw->size);
520 if (crc != reread_crc) {
521 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
522 (unsigned)fw->size, reread_crc, crc);
526 *size = (u32) fw->size;
529 release_firmware(fw);
535 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
537 struct mcp_gen_header *hdr;
538 struct device *dev = &mgp->pdev->dev;
539 const size_t bytes = sizeof(struct mcp_gen_header);
543 /* find running firmware header */
544 hdr_offset = ntohl(__raw_readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
546 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
547 dev_err(dev, "Running firmware has bad header offset (%d)\n",
552 /* copy header of running firmware from SRAM to host memory to
553 * validate firmware */
554 hdr = kmalloc(bytes, GFP_KERNEL);
556 dev_err(dev, "could not malloc firmware hdr\n");
559 memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
560 status = myri10ge_validate_firmware(mgp, hdr);
565 static int myri10ge_load_firmware(struct myri10ge_priv *mgp)
567 char __iomem *submit;
569 u32 dma_low, dma_high, size;
573 status = myri10ge_load_hotplug_firmware(mgp, &size);
575 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
577 /* Do not attempt to adopt firmware if there
582 status = myri10ge_adopt_running_firmware(mgp);
584 dev_err(&mgp->pdev->dev,
585 "failed to adopt running firmware\n");
588 dev_info(&mgp->pdev->dev,
589 "Successfully adopted running firmware\n");
590 if (mgp->tx.boundary == 4096) {
591 dev_warn(&mgp->pdev->dev,
592 "Using firmware currently running on NIC"
594 dev_warn(&mgp->pdev->dev,
595 "performance consider loading optimized "
597 dev_warn(&mgp->pdev->dev, "via hotplug\n");
600 mgp->fw_name = "adopted";
601 mgp->tx.boundary = 2048;
605 /* clear confirmation addr */
609 /* send a reload command to the bootstrap MCP, and wait for the
610 * response in the confirmation address. The firmware should
611 * write a -1 there to indicate it is alive and well
613 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
614 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
616 buf[0] = htonl(dma_high); /* confirm addr MSW */
617 buf[1] = htonl(dma_low); /* confirm addr LSW */
618 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
620 /* FIX: All newest firmware should un-protect the bottom of
621 * the sram before handoff. However, the very first interfaces
622 * do not. Therefore the handoff copy must skip the first 8 bytes
624 buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
625 buf[4] = htonl(size - 8); /* length of code */
626 buf[5] = htonl(8); /* where to copy to */
627 buf[6] = htonl(0); /* where to jump to */
629 submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
631 myri10ge_pio_copy(submit, &buf, sizeof(buf));
636 while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20) {
640 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
641 dev_err(&mgp->pdev->dev, "handoff failed\n");
644 dev_info(&mgp->pdev->dev, "handoff confirmed\n");
645 myri10ge_dummy_rdma(mgp, 1);
650 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
652 struct myri10ge_cmd cmd;
655 cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
656 | (addr[2] << 8) | addr[3]);
658 cmd.data1 = ((addr[4] << 8) | (addr[5]));
660 status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
664 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
666 struct myri10ge_cmd cmd;
669 ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
670 status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
674 "myri10ge: %s: Failed to set flow control mode\n",
683 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
685 struct myri10ge_cmd cmd;
688 ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
689 status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
691 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
695 static int myri10ge_reset(struct myri10ge_priv *mgp)
697 struct myri10ge_cmd cmd;
702 /* try to send a reset command to the card to see if it
704 memset(&cmd, 0, sizeof(cmd));
705 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
707 dev_err(&mgp->pdev->dev, "failed reset\n");
711 /* Now exchange information about interrupts */
713 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
714 memset(mgp->rx_done.entry, 0, bytes);
715 cmd.data0 = (u32) bytes;
716 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
717 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
718 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
719 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA, &cmd, 0);
722 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
723 mgp->irq_claim = (__iomem __be32 *) (mgp->sram + cmd.data0);
724 if (!mgp->msi_enabled) {
725 status |= myri10ge_send_cmd
726 (mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET, &cmd, 0);
727 mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
730 status |= myri10ge_send_cmd
731 (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
732 mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
734 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
737 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
739 /* Run a small DMA test.
740 * The magic multipliers to the length tell the firmware
741 * to do DMA read, write, or read+write tests. The
742 * results are returned in cmd.data0. The upper 16
743 * bits or the return is the number of transfers completed.
744 * The lower 16 bits is the time in 0.5us ticks that the
745 * transfers took to complete.
748 len = mgp->tx.boundary;
750 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
751 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
752 cmd.data2 = len * 0x10000;
753 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0);
755 mgp->read_dma = ((cmd.data0 >> 16) * len * 2) /
756 (cmd.data0 & 0xffff);
758 dev_warn(&mgp->pdev->dev, "DMA read benchmark failed: %d\n",
760 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
761 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
762 cmd.data2 = len * 0x1;
763 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0);
765 mgp->write_dma = ((cmd.data0 >> 16) * len * 2) /
766 (cmd.data0 & 0xffff);
768 dev_warn(&mgp->pdev->dev, "DMA write benchmark failed: %d\n",
771 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
772 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
773 cmd.data2 = len * 0x10001;
774 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0);
776 mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
777 (cmd.data0 & 0xffff);
779 dev_warn(&mgp->pdev->dev,
780 "DMA read/write benchmark failed: %d\n", status);
782 memset(mgp->rx_done.entry, 0, bytes);
784 /* reset mcp/driver shared state back to 0 */
787 mgp->tx.pkt_start = 0;
788 mgp->tx.pkt_done = 0;
790 mgp->rx_small.cnt = 0;
791 mgp->rx_done.idx = 0;
792 mgp->rx_done.cnt = 0;
793 mgp->link_changes = 0;
794 status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
795 myri10ge_change_promisc(mgp, 0, 0);
796 myri10ge_change_pause(mgp, mgp->pause);
801 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
802 struct mcp_kreq_ether_recv *src)
807 src->addr_low = htonl(DMA_32BIT_MASK);
808 myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
810 myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
813 put_be32(low, &dst->addr_low);
817 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
819 struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
821 if ((skb->protocol == htons(ETH_P_8021Q)) &&
822 (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
823 vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
825 skb->ip_summed = CHECKSUM_COMPLETE;
830 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
831 struct skb_frag_struct *rx_frags, int len, int hlen)
833 struct skb_frag_struct *skb_frags;
835 skb->len = skb->data_len = len;
836 skb->truesize = len + sizeof(struct sk_buff);
837 /* attach the page(s) */
839 skb_frags = skb_shinfo(skb)->frags;
841 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
842 len -= rx_frags->size;
845 skb_shinfo(skb)->nr_frags++;
848 /* pskb_may_pull is not available in irq context, but
849 * skb_pull() (for ether_pad and eth_type_trans()) requires
850 * the beginning of the packet in skb_headlen(), move it
852 memcpy(skb->data, va, hlen);
853 skb_shinfo(skb)->frags[0].page_offset += hlen;
854 skb_shinfo(skb)->frags[0].size -= hlen;
855 skb->data_len -= hlen;
857 skb_pull(skb, MXGEFW_PAD);
861 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
862 int bytes, int watchdog)
867 if (unlikely(rx->watchdog_needed && !watchdog))
870 /* try to refill entire ring */
871 while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
872 idx = rx->fill_cnt & rx->mask;
874 if ((bytes < MYRI10GE_ALLOC_SIZE / 2) &&
875 (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE)) {
876 /* we can use part of previous page */
879 /* we need a new page */
881 alloc_pages(GFP_ATOMIC | __GFP_COMP,
882 MYRI10GE_ALLOC_ORDER);
883 if (unlikely(page == NULL)) {
884 if (rx->fill_cnt - rx->cnt < 16)
885 rx->watchdog_needed = 1;
890 rx->bus = pci_map_page(mgp->pdev, page, 0,
894 rx->info[idx].page = rx->page;
895 rx->info[idx].page_offset = rx->page_offset;
896 /* note that this is the address of the start of the
898 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
899 rx->shadow[idx].addr_low =
900 htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
901 rx->shadow[idx].addr_high =
902 htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
904 /* start next packet on a cacheline boundary */
905 rx->page_offset += SKB_DATA_ALIGN(bytes);
908 /* copy 8 descriptors to the firmware at a time */
909 if ((idx & 7) == 7) {
910 if (rx->wc_fifo == NULL)
911 myri10ge_submit_8rx(&rx->lanai[idx - 7],
912 &rx->shadow[idx - 7]);
915 myri10ge_pio_copy(rx->wc_fifo,
916 &rx->shadow[idx - 7], 64);
923 myri10ge_unmap_rx_page(struct pci_dev *pdev,
924 struct myri10ge_rx_buffer_state *info, int bytes)
926 /* unmap the recvd page if we're the only or last user of it */
927 if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
928 (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
929 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
930 & ~(MYRI10GE_ALLOC_SIZE - 1)),
931 MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
935 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
936 * page into an skb */
939 myri10ge_rx_done(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
940 int bytes, int len, __wsum csum)
943 struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
944 int i, idx, hlen, remainder;
945 struct pci_dev *pdev = mgp->pdev;
946 struct net_device *dev = mgp->dev;
950 idx = rx->cnt & rx->mask;
951 va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
953 /* Fill skb_frag_struct(s) with data from our receive */
954 for (i = 0, remainder = len; remainder > 0; i++) {
955 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
956 rx_frags[i].page = rx->info[idx].page;
957 rx_frags[i].page_offset = rx->info[idx].page_offset;
958 if (remainder < MYRI10GE_ALLOC_SIZE)
959 rx_frags[i].size = remainder;
961 rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
963 idx = rx->cnt & rx->mask;
964 remainder -= MYRI10GE_ALLOC_SIZE;
967 hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
969 /* allocate an skb to attach the page(s) to. */
971 skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
972 if (unlikely(skb == NULL)) {
973 mgp->stats.rx_dropped++;
976 put_page(rx_frags[i].page);
981 /* Attach the pages to the skb, and trim off any padding */
982 myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
983 if (skb_shinfo(skb)->frags[0].size <= 0) {
984 put_page(skb_shinfo(skb)->frags[0].page);
985 skb_shinfo(skb)->nr_frags = 0;
987 skb->protocol = eth_type_trans(skb, dev);
990 if (mgp->csum_flag) {
991 if ((skb->protocol == htons(ETH_P_IP)) ||
992 (skb->protocol == htons(ETH_P_IPV6))) {
994 skb->ip_summed = CHECKSUM_COMPLETE;
996 myri10ge_vlan_ip_csum(skb, csum);
998 netif_receive_skb(skb);
999 dev->last_rx = jiffies;
1003 static inline void myri10ge_tx_done(struct myri10ge_priv *mgp, int mcp_index)
1005 struct pci_dev *pdev = mgp->pdev;
1006 struct myri10ge_tx_buf *tx = &mgp->tx;
1007 struct sk_buff *skb;
1011 while (tx->pkt_done != mcp_index) {
1012 idx = tx->done & tx->mask;
1013 skb = tx->info[idx].skb;
1016 tx->info[idx].skb = NULL;
1017 if (tx->info[idx].last) {
1019 tx->info[idx].last = 0;
1022 len = pci_unmap_len(&tx->info[idx], len);
1023 pci_unmap_len_set(&tx->info[idx], len, 0);
1025 mgp->stats.tx_bytes += skb->len;
1026 mgp->stats.tx_packets++;
1027 dev_kfree_skb_irq(skb);
1029 pci_unmap_single(pdev,
1030 pci_unmap_addr(&tx->info[idx],
1035 pci_unmap_page(pdev,
1036 pci_unmap_addr(&tx->info[idx],
1041 /* limit potential for livelock by only handling
1042 * 2 full tx rings per call */
1043 if (unlikely(++limit > 2 * tx->mask))
1046 /* start the queue if we've stopped it */
1047 if (netif_queue_stopped(mgp->dev)
1048 && tx->req - tx->done < (tx->mask >> 1)) {
1050 netif_wake_queue(mgp->dev);
1054 static inline void myri10ge_clean_rx_done(struct myri10ge_priv *mgp, int *limit)
1056 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1057 unsigned long rx_bytes = 0;
1058 unsigned long rx_packets = 0;
1059 unsigned long rx_ok;
1061 int idx = rx_done->idx;
1062 int cnt = rx_done->cnt;
1066 while (rx_done->entry[idx].length != 0 && *limit != 0) {
1067 length = ntohs(rx_done->entry[idx].length);
1068 rx_done->entry[idx].length = 0;
1069 checksum = csum_unfold(rx_done->entry[idx].checksum);
1070 if (length <= mgp->small_bytes)
1071 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_small,
1075 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_big,
1078 rx_packets += rx_ok;
1079 rx_bytes += rx_ok * (unsigned long)length;
1081 idx = cnt & (myri10ge_max_intr_slots - 1);
1083 /* limit potential for livelock by only handling a
1084 * limited number of frames. */
1089 mgp->stats.rx_packets += rx_packets;
1090 mgp->stats.rx_bytes += rx_bytes;
1092 /* restock receive rings if needed */
1093 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt < myri10ge_fill_thresh)
1094 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1095 mgp->small_bytes + MXGEFW_PAD, 0);
1096 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt < myri10ge_fill_thresh)
1097 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1101 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1103 struct mcp_irq_data *stats = mgp->fw_stats;
1105 if (unlikely(stats->stats_updated)) {
1106 if (mgp->link_state != stats->link_up) {
1107 mgp->link_state = stats->link_up;
1108 if (mgp->link_state) {
1109 if (netif_msg_link(mgp))
1111 "myri10ge: %s: link up\n",
1113 netif_carrier_on(mgp->dev);
1114 mgp->link_changes++;
1116 if (netif_msg_link(mgp))
1118 "myri10ge: %s: link down\n",
1120 netif_carrier_off(mgp->dev);
1121 mgp->link_changes++;
1124 if (mgp->rdma_tags_available !=
1125 ntohl(mgp->fw_stats->rdma_tags_available)) {
1126 mgp->rdma_tags_available =
1127 ntohl(mgp->fw_stats->rdma_tags_available);
1128 printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1129 "%d tags left\n", mgp->dev->name,
1130 mgp->rdma_tags_available);
1132 mgp->down_cnt += stats->link_down;
1133 if (stats->link_down)
1134 wake_up(&mgp->down_wq);
1138 static int myri10ge_poll(struct net_device *netdev, int *budget)
1140 struct myri10ge_priv *mgp = netdev_priv(netdev);
1141 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1142 int limit, orig_limit, work_done;
1144 /* process as many rx events as NAPI will allow */
1145 limit = min(*budget, netdev->quota);
1147 myri10ge_clean_rx_done(mgp, &limit);
1148 work_done = orig_limit - limit;
1149 *budget -= work_done;
1150 netdev->quota -= work_done;
1152 if (rx_done->entry[rx_done->idx].length == 0 || !netif_running(netdev)) {
1153 netif_rx_complete(netdev);
1154 put_be32(htonl(3), mgp->irq_claim);
1160 static irqreturn_t myri10ge_intr(int irq, void *arg)
1162 struct myri10ge_priv *mgp = arg;
1163 struct mcp_irq_data *stats = mgp->fw_stats;
1164 struct myri10ge_tx_buf *tx = &mgp->tx;
1165 u32 send_done_count;
1168 /* make sure it is our IRQ, and that the DMA has finished */
1169 if (unlikely(!stats->valid))
1172 /* low bit indicates receives are present, so schedule
1173 * napi poll handler */
1174 if (stats->valid & 1)
1175 netif_rx_schedule(mgp->dev);
1177 if (!mgp->msi_enabled) {
1178 put_be32(0, mgp->irq_deassert);
1179 if (!myri10ge_deassert_wait)
1185 /* Wait for IRQ line to go low, if using INTx */
1189 /* check for transmit completes and receives */
1190 send_done_count = ntohl(stats->send_done_count);
1191 if (send_done_count != tx->pkt_done)
1192 myri10ge_tx_done(mgp, (int)send_done_count);
1193 if (unlikely(i > myri10ge_max_irq_loops)) {
1194 printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1197 schedule_work(&mgp->watchdog_work);
1199 if (likely(stats->valid == 0))
1205 myri10ge_check_statblock(mgp);
1207 put_be32(htonl(3), mgp->irq_claim + 1);
1208 return (IRQ_HANDLED);
1212 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1214 cmd->autoneg = AUTONEG_DISABLE;
1215 cmd->speed = SPEED_10000;
1216 cmd->duplex = DUPLEX_FULL;
1221 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1223 struct myri10ge_priv *mgp = netdev_priv(netdev);
1225 strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1226 strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1227 strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1228 strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1232 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1234 struct myri10ge_priv *mgp = netdev_priv(netdev);
1235 coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1240 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1242 struct myri10ge_priv *mgp = netdev_priv(netdev);
1244 mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1245 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1250 myri10ge_get_pauseparam(struct net_device *netdev,
1251 struct ethtool_pauseparam *pause)
1253 struct myri10ge_priv *mgp = netdev_priv(netdev);
1256 pause->rx_pause = mgp->pause;
1257 pause->tx_pause = mgp->pause;
1261 myri10ge_set_pauseparam(struct net_device *netdev,
1262 struct ethtool_pauseparam *pause)
1264 struct myri10ge_priv *mgp = netdev_priv(netdev);
1266 if (pause->tx_pause != mgp->pause)
1267 return myri10ge_change_pause(mgp, pause->tx_pause);
1268 if (pause->rx_pause != mgp->pause)
1269 return myri10ge_change_pause(mgp, pause->tx_pause);
1270 if (pause->autoneg != 0)
1276 myri10ge_get_ringparam(struct net_device *netdev,
1277 struct ethtool_ringparam *ring)
1279 struct myri10ge_priv *mgp = netdev_priv(netdev);
1281 ring->rx_mini_max_pending = mgp->rx_small.mask + 1;
1282 ring->rx_max_pending = mgp->rx_big.mask + 1;
1283 ring->rx_jumbo_max_pending = 0;
1284 ring->tx_max_pending = mgp->rx_small.mask + 1;
1285 ring->rx_mini_pending = ring->rx_mini_max_pending;
1286 ring->rx_pending = ring->rx_max_pending;
1287 ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1288 ring->tx_pending = ring->tx_max_pending;
1291 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1293 struct myri10ge_priv *mgp = netdev_priv(netdev);
1300 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1302 struct myri10ge_priv *mgp = netdev_priv(netdev);
1304 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1310 static const char myri10ge_gstrings_stats[][ETH_GSTRING_LEN] = {
1311 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1312 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1313 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1314 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1315 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1316 "tx_heartbeat_errors", "tx_window_errors",
1317 /* device-specific stats */
1318 "tx_boundary", "WC", "irq", "MSI",
1319 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1320 "serial_number", "tx_pkt_start", "tx_pkt_done",
1321 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1322 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1323 "link_changes", "link_up", "dropped_link_overflow",
1324 "dropped_link_error_or_filtered", "dropped_multicast_filtered",
1325 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1326 "dropped_no_big_buffer"
1329 #define MYRI10GE_NET_STATS_LEN 21
1330 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1333 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1335 switch (stringset) {
1337 memcpy(data, *myri10ge_gstrings_stats,
1338 sizeof(myri10ge_gstrings_stats));
1343 static int myri10ge_get_stats_count(struct net_device *netdev)
1345 return MYRI10GE_STATS_LEN;
1349 myri10ge_get_ethtool_stats(struct net_device *netdev,
1350 struct ethtool_stats *stats, u64 * data)
1352 struct myri10ge_priv *mgp = netdev_priv(netdev);
1355 for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1356 data[i] = ((unsigned long *)&mgp->stats)[i];
1358 data[i++] = (unsigned int)mgp->tx.boundary;
1359 data[i++] = (unsigned int)(mgp->mtrr >= 0);
1360 data[i++] = (unsigned int)mgp->pdev->irq;
1361 data[i++] = (unsigned int)mgp->msi_enabled;
1362 data[i++] = (unsigned int)mgp->read_dma;
1363 data[i++] = (unsigned int)mgp->write_dma;
1364 data[i++] = (unsigned int)mgp->read_write_dma;
1365 data[i++] = (unsigned int)mgp->serial_number;
1366 data[i++] = (unsigned int)mgp->tx.pkt_start;
1367 data[i++] = (unsigned int)mgp->tx.pkt_done;
1368 data[i++] = (unsigned int)mgp->tx.req;
1369 data[i++] = (unsigned int)mgp->tx.done;
1370 data[i++] = (unsigned int)mgp->rx_small.cnt;
1371 data[i++] = (unsigned int)mgp->rx_big.cnt;
1372 data[i++] = (unsigned int)mgp->wake_queue;
1373 data[i++] = (unsigned int)mgp->stop_queue;
1374 data[i++] = (unsigned int)mgp->watchdog_resets;
1375 data[i++] = (unsigned int)mgp->tx_linearized;
1376 data[i++] = (unsigned int)mgp->link_changes;
1377 data[i++] = (unsigned int)ntohl(mgp->fw_stats->link_up);
1378 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_link_overflow);
1380 (unsigned int)ntohl(mgp->fw_stats->dropped_link_error_or_filtered);
1382 (unsigned int)ntohl(mgp->fw_stats->dropped_multicast_filtered);
1383 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_runt);
1384 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_overrun);
1385 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_small_buffer);
1386 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_big_buffer);
1389 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1391 struct myri10ge_priv *mgp = netdev_priv(netdev);
1392 mgp->msg_enable = value;
1395 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1397 struct myri10ge_priv *mgp = netdev_priv(netdev);
1398 return mgp->msg_enable;
1401 static const struct ethtool_ops myri10ge_ethtool_ops = {
1402 .get_settings = myri10ge_get_settings,
1403 .get_drvinfo = myri10ge_get_drvinfo,
1404 .get_coalesce = myri10ge_get_coalesce,
1405 .set_coalesce = myri10ge_set_coalesce,
1406 .get_pauseparam = myri10ge_get_pauseparam,
1407 .set_pauseparam = myri10ge_set_pauseparam,
1408 .get_ringparam = myri10ge_get_ringparam,
1409 .get_rx_csum = myri10ge_get_rx_csum,
1410 .set_rx_csum = myri10ge_set_rx_csum,
1411 .get_tx_csum = ethtool_op_get_tx_csum,
1412 .set_tx_csum = ethtool_op_set_tx_hw_csum,
1413 .get_sg = ethtool_op_get_sg,
1414 .set_sg = ethtool_op_set_sg,
1416 .get_tso = ethtool_op_get_tso,
1417 .set_tso = ethtool_op_set_tso,
1419 .get_strings = myri10ge_get_strings,
1420 .get_stats_count = myri10ge_get_stats_count,
1421 .get_ethtool_stats = myri10ge_get_ethtool_stats,
1422 .set_msglevel = myri10ge_set_msglevel,
1423 .get_msglevel = myri10ge_get_msglevel
1426 static int myri10ge_allocate_rings(struct net_device *dev)
1428 struct myri10ge_priv *mgp;
1429 struct myri10ge_cmd cmd;
1430 int tx_ring_size, rx_ring_size;
1431 int tx_ring_entries, rx_ring_entries;
1435 mgp = netdev_priv(dev);
1437 /* get ring sizes */
1439 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1440 tx_ring_size = cmd.data0;
1441 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1442 rx_ring_size = cmd.data0;
1444 tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1445 rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1446 mgp->tx.mask = tx_ring_entries - 1;
1447 mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1;
1449 /* allocate the host shadow rings */
1451 bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1452 * sizeof(*mgp->tx.req_list);
1453 mgp->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1454 if (mgp->tx.req_bytes == NULL)
1455 goto abort_with_nothing;
1457 /* ensure req_list entries are aligned to 8 bytes */
1458 mgp->tx.req_list = (struct mcp_kreq_ether_send *)
1459 ALIGN((unsigned long)mgp->tx.req_bytes, 8);
1461 bytes = rx_ring_entries * sizeof(*mgp->rx_small.shadow);
1462 mgp->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1463 if (mgp->rx_small.shadow == NULL)
1464 goto abort_with_tx_req_bytes;
1466 bytes = rx_ring_entries * sizeof(*mgp->rx_big.shadow);
1467 mgp->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1468 if (mgp->rx_big.shadow == NULL)
1469 goto abort_with_rx_small_shadow;
1471 /* allocate the host info rings */
1473 bytes = tx_ring_entries * sizeof(*mgp->tx.info);
1474 mgp->tx.info = kzalloc(bytes, GFP_KERNEL);
1475 if (mgp->tx.info == NULL)
1476 goto abort_with_rx_big_shadow;
1478 bytes = rx_ring_entries * sizeof(*mgp->rx_small.info);
1479 mgp->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1480 if (mgp->rx_small.info == NULL)
1481 goto abort_with_tx_info;
1483 bytes = rx_ring_entries * sizeof(*mgp->rx_big.info);
1484 mgp->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1485 if (mgp->rx_big.info == NULL)
1486 goto abort_with_rx_small_info;
1488 /* Fill the receive rings */
1489 mgp->rx_big.cnt = 0;
1490 mgp->rx_small.cnt = 0;
1491 mgp->rx_big.fill_cnt = 0;
1492 mgp->rx_small.fill_cnt = 0;
1493 mgp->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1494 mgp->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1495 mgp->rx_small.watchdog_needed = 0;
1496 mgp->rx_big.watchdog_needed = 0;
1497 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1498 mgp->small_bytes + MXGEFW_PAD, 0);
1500 if (mgp->rx_small.fill_cnt < mgp->rx_small.mask + 1) {
1501 printk(KERN_ERR "myri10ge: %s: alloced only %d small bufs\n",
1502 dev->name, mgp->rx_small.fill_cnt);
1503 goto abort_with_rx_small_ring;
1506 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1507 if (mgp->rx_big.fill_cnt < mgp->rx_big.mask + 1) {
1508 printk(KERN_ERR "myri10ge: %s: alloced only %d big bufs\n",
1509 dev->name, mgp->rx_big.fill_cnt);
1510 goto abort_with_rx_big_ring;
1515 abort_with_rx_big_ring:
1516 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1517 int idx = i & mgp->rx_big.mask;
1518 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1520 put_page(mgp->rx_big.info[idx].page);
1523 abort_with_rx_small_ring:
1524 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1525 int idx = i & mgp->rx_small.mask;
1526 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1527 mgp->small_bytes + MXGEFW_PAD);
1528 put_page(mgp->rx_small.info[idx].page);
1531 kfree(mgp->rx_big.info);
1533 abort_with_rx_small_info:
1534 kfree(mgp->rx_small.info);
1537 kfree(mgp->tx.info);
1539 abort_with_rx_big_shadow:
1540 kfree(mgp->rx_big.shadow);
1542 abort_with_rx_small_shadow:
1543 kfree(mgp->rx_small.shadow);
1545 abort_with_tx_req_bytes:
1546 kfree(mgp->tx.req_bytes);
1547 mgp->tx.req_bytes = NULL;
1548 mgp->tx.req_list = NULL;
1554 static void myri10ge_free_rings(struct net_device *dev)
1556 struct myri10ge_priv *mgp;
1557 struct sk_buff *skb;
1558 struct myri10ge_tx_buf *tx;
1561 mgp = netdev_priv(dev);
1563 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1564 idx = i & mgp->rx_big.mask;
1565 if (i == mgp->rx_big.fill_cnt - 1)
1566 mgp->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
1567 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1569 put_page(mgp->rx_big.info[idx].page);
1572 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1573 idx = i & mgp->rx_small.mask;
1574 if (i == mgp->rx_small.fill_cnt - 1)
1575 mgp->rx_small.info[idx].page_offset =
1576 MYRI10GE_ALLOC_SIZE;
1577 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1578 mgp->small_bytes + MXGEFW_PAD);
1579 put_page(mgp->rx_small.info[idx].page);
1582 while (tx->done != tx->req) {
1583 idx = tx->done & tx->mask;
1584 skb = tx->info[idx].skb;
1587 tx->info[idx].skb = NULL;
1589 len = pci_unmap_len(&tx->info[idx], len);
1590 pci_unmap_len_set(&tx->info[idx], len, 0);
1592 mgp->stats.tx_dropped++;
1593 dev_kfree_skb_any(skb);
1595 pci_unmap_single(mgp->pdev,
1596 pci_unmap_addr(&tx->info[idx],
1601 pci_unmap_page(mgp->pdev,
1602 pci_unmap_addr(&tx->info[idx],
1607 kfree(mgp->rx_big.info);
1609 kfree(mgp->rx_small.info);
1611 kfree(mgp->tx.info);
1613 kfree(mgp->rx_big.shadow);
1615 kfree(mgp->rx_small.shadow);
1617 kfree(mgp->tx.req_bytes);
1618 mgp->tx.req_bytes = NULL;
1619 mgp->tx.req_list = NULL;
1622 static int myri10ge_open(struct net_device *dev)
1624 struct myri10ge_priv *mgp;
1625 struct myri10ge_cmd cmd;
1626 int status, big_pow2;
1628 mgp = netdev_priv(dev);
1630 if (mgp->running != MYRI10GE_ETH_STOPPED)
1633 mgp->running = MYRI10GE_ETH_STARTING;
1634 status = myri10ge_reset(mgp);
1636 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
1637 mgp->running = MYRI10GE_ETH_STOPPED;
1641 /* decide what small buffer size to use. For good TCP rx
1642 * performance, it is important to not receive 1514 byte
1643 * frames into jumbo buffers, as it confuses the socket buffer
1644 * accounting code, leading to drops and erratic performance.
1647 if (dev->mtu <= ETH_DATA_LEN)
1648 /* enough for a TCP header */
1649 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
1650 ? (128 - MXGEFW_PAD)
1651 : (SMP_CACHE_BYTES - MXGEFW_PAD);
1653 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1654 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
1656 /* Override the small buffer size? */
1657 if (myri10ge_small_bytes > 0)
1658 mgp->small_bytes = myri10ge_small_bytes;
1660 /* get the lanai pointers to the send and receive rings */
1662 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
1664 (struct mcp_kreq_ether_send __iomem *)(mgp->sram + cmd.data0);
1667 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd, 0);
1668 mgp->rx_small.lanai =
1669 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1671 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
1673 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1677 "myri10ge: %s: failed to get ring sizes or locations\n",
1679 mgp->running = MYRI10GE_ETH_STOPPED;
1683 if (mgp->mtrr >= 0) {
1684 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1685 mgp->rx_small.wc_fifo =
1686 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;
1687 mgp->rx_big.wc_fifo =
1688 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_BIG;
1690 mgp->tx.wc_fifo = NULL;
1691 mgp->rx_small.wc_fifo = NULL;
1692 mgp->rx_big.wc_fifo = NULL;
1695 /* Firmware needs the big buff size as a power of 2. Lie and
1696 * tell him the buffer is larger, because we only use 1
1697 * buffer/pkt, and the mtu will prevent overruns.
1699 big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1700 if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
1701 while ((big_pow2 & (big_pow2 - 1)) != 0)
1703 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1705 big_pow2 = MYRI10GE_ALLOC_SIZE;
1706 mgp->big_bytes = big_pow2;
1709 status = myri10ge_allocate_rings(dev);
1711 goto abort_with_nothing;
1713 /* now give firmware buffers sizes, and MTU */
1714 cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
1715 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
1716 cmd.data0 = mgp->small_bytes;
1718 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
1719 cmd.data0 = big_pow2;
1721 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
1723 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
1725 goto abort_with_rings;
1728 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->fw_stats_bus);
1729 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->fw_stats_bus);
1730 cmd.data2 = sizeof(struct mcp_irq_data);
1731 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
1732 if (status == -ENOSYS) {
1733 dma_addr_t bus = mgp->fw_stats_bus;
1734 bus += offsetof(struct mcp_irq_data, send_done_count);
1735 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
1736 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
1737 status = myri10ge_send_cmd(mgp,
1738 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
1740 /* Firmware cannot support multicast without STATS_DMA_V2 */
1741 mgp->fw_multicast_support = 0;
1743 mgp->fw_multicast_support = 1;
1746 printk(KERN_ERR "myri10ge: %s: Couldn't set stats DMA\n",
1748 goto abort_with_rings;
1751 mgp->link_state = htonl(~0U);
1752 mgp->rdma_tags_available = 15;
1754 netif_poll_enable(mgp->dev); /* must happen prior to any irq */
1756 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
1758 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
1760 goto abort_with_rings;
1763 mgp->wake_queue = 0;
1764 mgp->stop_queue = 0;
1765 mgp->running = MYRI10GE_ETH_RUNNING;
1766 mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
1767 add_timer(&mgp->watchdog_timer);
1768 netif_wake_queue(dev);
1772 myri10ge_free_rings(dev);
1775 mgp->running = MYRI10GE_ETH_STOPPED;
1779 static int myri10ge_close(struct net_device *dev)
1781 struct myri10ge_priv *mgp;
1782 struct myri10ge_cmd cmd;
1783 int status, old_down_cnt;
1785 mgp = netdev_priv(dev);
1787 if (mgp->running != MYRI10GE_ETH_RUNNING)
1790 if (mgp->tx.req_bytes == NULL)
1793 del_timer_sync(&mgp->watchdog_timer);
1794 mgp->running = MYRI10GE_ETH_STOPPING;
1795 netif_poll_disable(mgp->dev);
1796 netif_carrier_off(dev);
1797 netif_stop_queue(dev);
1798 old_down_cnt = mgp->down_cnt;
1800 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
1802 printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n",
1805 wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ);
1806 if (old_down_cnt == mgp->down_cnt)
1807 printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name);
1809 netif_tx_disable(dev);
1811 myri10ge_free_rings(dev);
1813 mgp->running = MYRI10GE_ETH_STOPPED;
1817 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1818 * backwards one at a time and handle ring wraps */
1821 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
1822 struct mcp_kreq_ether_send *src, int cnt)
1824 int idx, starting_slot;
1825 starting_slot = tx->req;
1828 idx = (starting_slot + cnt) & tx->mask;
1829 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
1835 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1836 * at most 32 bytes at a time, so as to avoid involving the software
1837 * pio handler in the nic. We re-write the first segment's flags
1838 * to mark them valid only after writing the entire chain.
1842 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
1846 struct mcp_kreq_ether_send __iomem *dstp, *dst;
1847 struct mcp_kreq_ether_send *srcp;
1850 idx = tx->req & tx->mask;
1852 last_flags = src->flags;
1855 dst = dstp = &tx->lanai[idx];
1858 if ((idx + cnt) < tx->mask) {
1859 for (i = 0; i < (cnt - 1); i += 2) {
1860 myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
1861 mb(); /* force write every 32 bytes */
1866 /* submit all but the first request, and ensure
1867 * that it is submitted below */
1868 myri10ge_submit_req_backwards(tx, src, cnt);
1872 /* submit the first request */
1873 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
1874 mb(); /* barrier before setting valid flag */
1877 /* re-write the last 32-bits with the valid flags */
1878 src->flags = last_flags;
1879 put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
1885 myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx,
1886 struct mcp_kreq_ether_send *src, int cnt)
1891 myri10ge_pio_copy(tx->wc_fifo, src, 64);
1897 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1898 * needs to be so that we don't overrun it */
1899 myri10ge_pio_copy(tx->wc_fifo + MXGEFW_ETH_SEND_OFFSET(cnt),
1906 * Transmit a packet. We need to split the packet so that a single
1907 * segment does not cross myri10ge->tx.boundary, so this makes segment
1908 * counting tricky. So rather than try to count segments up front, we
1909 * just give up if there are too few segments to hold a reasonably
1910 * fragmented packet currently available. If we run
1911 * out of segments while preparing a packet for DMA, we just linearize
1915 static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev)
1917 struct myri10ge_priv *mgp = netdev_priv(dev);
1918 struct mcp_kreq_ether_send *req;
1919 struct myri10ge_tx_buf *tx = &mgp->tx;
1920 struct skb_frag_struct *frag;
1923 __be32 high_swapped;
1925 int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
1926 u16 pseudo_hdr_offset, cksum_offset;
1927 int cum_len, seglen, boundary, rdma_count;
1932 avail = tx->mask - 1 - (tx->req - tx->done);
1935 max_segments = MXGEFW_MAX_SEND_DESC;
1938 if (skb->len > (dev->mtu + ETH_HLEN)) {
1939 mss = skb_shinfo(skb)->gso_size;
1941 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
1943 #endif /*NETIF_F_TSO */
1945 if ((unlikely(avail < max_segments))) {
1946 /* we are out of transmit resources */
1948 netif_stop_queue(dev);
1952 /* Setup checksum offloading, if needed */
1954 pseudo_hdr_offset = 0;
1956 flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
1957 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1958 cksum_offset = (skb->h.raw - skb->data);
1959 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
1960 /* If the headers are excessively large, then we must
1961 * fall back to a software checksum */
1962 if (unlikely(cksum_offset > 255 || pseudo_hdr_offset > 127)) {
1963 if (skb_checksum_help(skb))
1966 pseudo_hdr_offset = 0;
1968 odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
1969 flags |= MXGEFW_FLAGS_CKSUM;
1976 if (mss) { /* TSO */
1977 /* this removes any CKSUM flag from before */
1978 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
1980 /* negative cum_len signifies to the
1981 * send loop that we are still in the
1982 * header portion of the TSO packet.
1983 * TSO header must be at most 134 bytes long */
1984 cum_len = -((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1986 /* for TSO, pseudo_hdr_offset holds mss.
1987 * The firmware figures out where to put
1988 * the checksum by parsing the header. */
1989 pseudo_hdr_offset = mss;
1991 #endif /*NETIF_F_TSO */
1992 /* Mark small packets, and pad out tiny packets */
1993 if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
1994 flags |= MXGEFW_FLAGS_SMALL;
1996 /* pad frames to at least ETH_ZLEN bytes */
1997 if (unlikely(skb->len < ETH_ZLEN)) {
1998 if (skb_padto(skb, ETH_ZLEN)) {
1999 /* The packet is gone, so we must
2001 mgp->stats.tx_dropped += 1;
2004 /* adjust the len to account for the zero pad
2005 * so that the nic can know how long it is */
2006 skb->len = ETH_ZLEN;
2010 /* map the skb for DMA */
2011 len = skb->len - skb->data_len;
2012 idx = tx->req & tx->mask;
2013 tx->info[idx].skb = skb;
2014 bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2015 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2016 pci_unmap_len_set(&tx->info[idx], len, len);
2018 frag_cnt = skb_shinfo(skb)->nr_frags;
2023 /* "rdma_count" is the number of RDMAs belonging to the
2024 * current packet BEFORE the current send request. For
2025 * non-TSO packets, this is equal to "count".
2026 * For TSO packets, rdma_count needs to be reset
2027 * to 0 after a segment cut.
2029 * The rdma_count field of the send request is
2030 * the number of RDMAs of the packet starting at
2031 * that request. For TSO send requests with one ore more cuts
2032 * in the middle, this is the number of RDMAs starting
2033 * after the last cut in the request. All previous
2034 * segments before the last cut implicitly have 1 RDMA.
2036 * Since the number of RDMAs is not known beforehand,
2037 * it must be filled-in retroactively - after each
2038 * segmentation cut or at the end of the entire packet.
2042 /* Break the SKB or Fragment up into pieces which
2043 * do not cross mgp->tx.boundary */
2044 low = MYRI10GE_LOWPART_TO_U32(bus);
2045 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2050 if (unlikely(count == max_segments))
2051 goto abort_linearize;
2053 boundary = (low + tx->boundary) & ~(tx->boundary - 1);
2054 seglen = boundary - low;
2057 flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2058 cum_len_next = cum_len + seglen;
2060 if (mss) { /* TSO */
2061 (req - rdma_count)->rdma_count = rdma_count + 1;
2063 if (likely(cum_len >= 0)) { /* payload */
2064 int next_is_first, chop;
2066 chop = (cum_len_next > mss);
2067 cum_len_next = cum_len_next % mss;
2068 next_is_first = (cum_len_next == 0);
2069 flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2070 flags_next |= next_is_first *
2072 rdma_count |= -(chop | next_is_first);
2073 rdma_count += chop & !next_is_first;
2074 } else if (likely(cum_len_next >= 0)) { /* header ends */
2080 small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2081 flags_next = MXGEFW_FLAGS_TSO_PLD |
2082 MXGEFW_FLAGS_FIRST |
2083 (small * MXGEFW_FLAGS_SMALL);
2086 #endif /* NETIF_F_TSO */
2087 req->addr_high = high_swapped;
2088 req->addr_low = htonl(low);
2089 req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2090 req->pad = 0; /* complete solid 16-byte block; does this matter? */
2091 req->rdma_count = 1;
2092 req->length = htons(seglen);
2093 req->cksum_offset = cksum_offset;
2094 req->flags = flags | ((cum_len & 1) * odd_flag);
2098 cum_len = cum_len_next;
2103 if (unlikely(cksum_offset > seglen))
2104 cksum_offset -= seglen;
2108 if (frag_idx == frag_cnt)
2111 /* map next fragment for DMA */
2112 idx = (count + tx->req) & tx->mask;
2113 frag = &skb_shinfo(skb)->frags[frag_idx];
2116 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2117 len, PCI_DMA_TODEVICE);
2118 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2119 pci_unmap_len_set(&tx->info[idx], len, len);
2122 (req - rdma_count)->rdma_count = rdma_count;
2127 req->flags |= MXGEFW_FLAGS_TSO_LAST;
2128 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2129 MXGEFW_FLAGS_FIRST)));
2131 idx = ((count - 1) + tx->req) & tx->mask;
2132 tx->info[idx].last = 1;
2133 if (tx->wc_fifo == NULL)
2134 myri10ge_submit_req(tx, tx->req_list, count);
2136 myri10ge_submit_req_wc(tx, tx->req_list, count);
2138 if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2140 netif_stop_queue(dev);
2142 dev->trans_start = jiffies;
2146 /* Free any DMA resources we've alloced and clear out the skb
2147 * slot so as to not trip up assertions, and to avoid a
2148 * double-free if linearizing fails */
2150 last_idx = (idx + 1) & tx->mask;
2151 idx = tx->req & tx->mask;
2152 tx->info[idx].skb = NULL;
2154 len = pci_unmap_len(&tx->info[idx], len);
2156 if (tx->info[idx].skb != NULL)
2157 pci_unmap_single(mgp->pdev,
2158 pci_unmap_addr(&tx->info[idx],
2162 pci_unmap_page(mgp->pdev,
2163 pci_unmap_addr(&tx->info[idx],
2166 pci_unmap_len_set(&tx->info[idx], len, 0);
2167 tx->info[idx].skb = NULL;
2169 idx = (idx + 1) & tx->mask;
2170 } while (idx != last_idx);
2171 if (skb_is_gso(skb)) {
2173 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2178 if (skb_linearize(skb))
2181 mgp->tx_linearized++;
2185 dev_kfree_skb_any(skb);
2186 mgp->stats.tx_dropped += 1;
2191 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2193 struct myri10ge_priv *mgp = netdev_priv(dev);
2197 static void myri10ge_set_multicast_list(struct net_device *dev)
2199 struct myri10ge_cmd cmd;
2200 struct myri10ge_priv *mgp;
2201 struct dev_mc_list *mc_list;
2202 __be32 data[2] = { 0, 0 };
2205 mgp = netdev_priv(dev);
2206 /* can be called from atomic contexts,
2207 * pass 1 to force atomicity in myri10ge_send_cmd() */
2208 myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
2210 /* This firmware is known to not support multicast */
2211 if (!mgp->fw_multicast_support)
2214 /* Disable multicast filtering */
2216 err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
2218 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2219 " error status: %d\n", dev->name, err);
2223 if (dev->flags & IFF_ALLMULTI) {
2224 /* request to disable multicast filtering, so quit here */
2228 /* Flush the filters */
2230 err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
2234 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2235 ", error status: %d\n", dev->name, err);
2239 /* Walk the multicast list, and add each address */
2240 for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
2241 memcpy(data, &mc_list->dmi_addr, 6);
2242 cmd.data0 = ntohl(data[0]);
2243 cmd.data1 = ntohl(data[1]);
2244 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
2248 printk(KERN_ERR "myri10ge: %s: Failed "
2249 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2250 "%d\t", dev->name, err);
2251 printk(KERN_ERR "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2252 ((unsigned char *)&mc_list->dmi_addr)[0],
2253 ((unsigned char *)&mc_list->dmi_addr)[1],
2254 ((unsigned char *)&mc_list->dmi_addr)[2],
2255 ((unsigned char *)&mc_list->dmi_addr)[3],
2256 ((unsigned char *)&mc_list->dmi_addr)[4],
2257 ((unsigned char *)&mc_list->dmi_addr)[5]
2262 /* Enable multicast filtering */
2263 err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
2265 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2266 "error status: %d\n", dev->name, err);
2276 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
2278 struct sockaddr *sa = addr;
2279 struct myri10ge_priv *mgp = netdev_priv(dev);
2282 if (!is_valid_ether_addr(sa->sa_data))
2283 return -EADDRNOTAVAIL;
2285 status = myri10ge_update_mac_address(mgp, sa->sa_data);
2288 "myri10ge: %s: changing mac address failed with %d\n",
2293 /* change the dev structure */
2294 memcpy(dev->dev_addr, sa->sa_data, 6);
2298 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
2300 struct myri10ge_priv *mgp = netdev_priv(dev);
2303 if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
2304 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
2305 dev->name, new_mtu);
2308 printk(KERN_INFO "%s: changing mtu from %d to %d\n",
2309 dev->name, dev->mtu, new_mtu);
2311 /* if we change the mtu on an active device, we must
2312 * reset the device so the firmware sees the change */
2313 myri10ge_close(dev);
2323 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2324 * Only do it if the bridge is a root port since we don't want to disturb
2325 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2328 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2330 struct pci_dev *bridge = mgp->pdev->bus->self;
2331 struct device *dev = &mgp->pdev->dev;
2338 if (!myri10ge_ecrc_enable || !bridge)
2341 /* check that the bridge is a root port */
2342 cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
2343 pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
2344 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2345 if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
2346 if (myri10ge_ecrc_enable > 1) {
2347 struct pci_dev *old_bridge = bridge;
2349 /* Walk the hierarchy up to the root port
2350 * where ECRC has to be enabled */
2352 bridge = bridge->bus->self;
2355 "Failed to find root port"
2356 " to force ECRC\n");
2360 pci_find_capability(bridge, PCI_CAP_ID_EXP);
2361 pci_read_config_word(bridge,
2362 cap + PCI_CAP_FLAGS, &val);
2363 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2364 } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
2367 "Forcing ECRC on non-root port %s"
2368 " (enabling on root port %s)\n",
2369 pci_name(old_bridge), pci_name(bridge));
2372 "Not enabling ECRC on non-root port %s\n",
2378 cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
2382 ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
2384 dev_err(dev, "failed reading ext-conf-space of %s\n",
2386 dev_err(dev, "\t pci=nommconf in use? "
2387 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2390 if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
2393 err_cap |= PCI_ERR_CAP_ECRC_GENE;
2394 pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
2395 dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
2396 mgp->tx.boundary = 4096;
2397 mgp->fw_name = myri10ge_fw_aligned;
2401 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2402 * when the PCI-E Completion packets are aligned on an 8-byte
2403 * boundary. Some PCI-E chip sets always align Completion packets; on
2404 * the ones that do not, the alignment can be enforced by enabling
2405 * ECRC generation (if supported).
2407 * When PCI-E Completion packets are not aligned, it is actually more
2408 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2410 * If the driver can neither enable ECRC nor verify that it has
2411 * already been enabled, then it must use a firmware image which works
2412 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2413 * should also ensure that it never gives the device a Read-DMA which is
2414 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2415 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2416 * firmware image, and set tx.boundary to 4KB.
2419 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2420 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2422 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2424 struct pci_dev *bridge = mgp->pdev->bus->self;
2426 mgp->tx.boundary = 2048;
2427 mgp->fw_name = myri10ge_fw_unaligned;
2429 if (myri10ge_force_firmware == 0) {
2430 int link_width, exp_cap;
2433 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
2434 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
2435 link_width = (lnk >> 4) & 0x3f;
2437 myri10ge_enable_ecrc(mgp);
2439 /* Check to see if Link is less than 8 or if the
2440 * upstream bridge is known to provide aligned
2442 if (link_width < 8) {
2443 dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
2445 mgp->tx.boundary = 4096;
2446 mgp->fw_name = myri10ge_fw_aligned;
2447 } else if (bridge &&
2448 /* ServerWorks HT2000/HT1000 */
2449 ((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
2450 && bridge->device ==
2451 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE)
2452 /* All Intel E5000 PCIE ports */
2453 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2454 && bridge->device >=
2455 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2456 && bridge->device <=
2457 PCI_DEVICE_ID_INTEL_E5000_PCIE47))) {
2458 dev_info(&mgp->pdev->dev,
2459 "Assuming aligned completions (0x%x:0x%x)\n",
2460 bridge->vendor, bridge->device);
2461 mgp->tx.boundary = 4096;
2462 mgp->fw_name = myri10ge_fw_aligned;
2465 if (myri10ge_force_firmware == 1) {
2466 dev_info(&mgp->pdev->dev,
2467 "Assuming aligned completions (forced)\n");
2468 mgp->tx.boundary = 4096;
2469 mgp->fw_name = myri10ge_fw_aligned;
2471 dev_info(&mgp->pdev->dev,
2472 "Assuming unaligned completions (forced)\n");
2473 mgp->tx.boundary = 2048;
2474 mgp->fw_name = myri10ge_fw_unaligned;
2477 if (myri10ge_fw_name != NULL) {
2478 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
2480 mgp->fw_name = myri10ge_fw_name;
2484 static void myri10ge_save_state(struct myri10ge_priv *mgp)
2486 struct pci_dev *pdev = mgp->pdev;
2489 pci_save_state(pdev);
2490 /* now save PCIe and MSI state that Linux will not
2492 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2493 pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &mgp->devctl);
2494 cap = pci_find_capability(pdev, PCI_CAP_ID_MSI);
2495 pci_read_config_word(pdev, cap + PCI_MSI_FLAGS, &mgp->msi_flags);
2498 static void myri10ge_restore_state(struct myri10ge_priv *mgp)
2500 struct pci_dev *pdev = mgp->pdev;
2503 /* restore PCIe and MSI state that linux will not */
2504 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2505 pci_write_config_dword(pdev, cap + PCI_CAP_ID_EXP, mgp->devctl);
2506 cap = pci_find_capability(pdev, PCI_CAP_ID_MSI);
2507 pci_write_config_word(pdev, cap + PCI_MSI_FLAGS, mgp->msi_flags);
2509 pci_restore_state(pdev);
2514 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
2516 struct myri10ge_priv *mgp;
2517 struct net_device *netdev;
2519 mgp = pci_get_drvdata(pdev);
2524 netif_device_detach(netdev);
2525 if (netif_running(netdev)) {
2526 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
2528 myri10ge_close(netdev);
2531 myri10ge_dummy_rdma(mgp, 0);
2532 free_irq(pdev->irq, mgp);
2533 myri10ge_save_state(mgp);
2534 pci_disable_device(pdev);
2535 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2539 static int myri10ge_resume(struct pci_dev *pdev)
2541 struct myri10ge_priv *mgp;
2542 struct net_device *netdev;
2546 mgp = pci_get_drvdata(pdev);
2550 pci_set_power_state(pdev, 0); /* zeros conf space as a side effect */
2551 msleep(5); /* give card time to respond */
2552 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2553 if (vendor == 0xffff) {
2554 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
2558 myri10ge_restore_state(mgp);
2560 status = pci_enable_device(pdev);
2562 dev_err(&pdev->dev, "failed to enable device\n");
2566 pci_set_master(pdev);
2568 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
2571 dev_err(&pdev->dev, "failed to allocate IRQ\n");
2572 goto abort_with_enabled;
2575 myri10ge_reset(mgp);
2576 myri10ge_dummy_rdma(mgp, 1);
2578 /* Save configuration space to be restored if the
2579 * nic resets due to a parity error */
2580 myri10ge_save_state(mgp);
2582 if (netif_running(netdev)) {
2584 myri10ge_open(netdev);
2587 netif_device_attach(netdev);
2592 pci_disable_device(pdev);
2597 #endif /* CONFIG_PM */
2599 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
2601 struct pci_dev *pdev = mgp->pdev;
2602 int vs = mgp->vendor_specific_offset;
2605 /*enter read32 mode */
2606 pci_write_config_byte(pdev, vs + 0x10, 0x3);
2608 /*read REBOOT_STATUS (0xfffffff0) */
2609 pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
2610 pci_read_config_dword(pdev, vs + 0x14, &reboot);
2615 * This watchdog is used to check whether the board has suffered
2616 * from a parity error and needs to be recovered.
2618 static void myri10ge_watchdog(struct work_struct *work)
2620 struct myri10ge_priv *mgp =
2621 container_of(work, struct myri10ge_priv, watchdog_work);
2626 mgp->watchdog_resets++;
2627 pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
2628 if ((cmd & PCI_COMMAND_MASTER) == 0) {
2629 /* Bus master DMA disabled? Check to see
2630 * if the card rebooted due to a parity error
2631 * For now, just report it */
2632 reboot = myri10ge_read_reboot(mgp);
2634 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2635 mgp->dev->name, reboot);
2637 * A rebooted nic will come back with config space as
2638 * it was after power was applied to PCIe bus.
2639 * Attempt to restore config space which was saved
2640 * when the driver was loaded, or the last time the
2641 * nic was resumed from power saving mode.
2643 myri10ge_restore_state(mgp);
2645 /* if we get back -1's from our slot, perhaps somebody
2646 * powered off our card. Don't try to reset it in
2648 if (cmd == 0xffff) {
2649 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2650 if (vendor == 0xffff) {
2652 "myri10ge: %s: device disappeared!\n",
2657 /* Perhaps it is a software error. Try to reset */
2659 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
2661 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2662 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2663 mgp->tx.pkt_start, mgp->tx.pkt_done,
2664 (int)ntohl(mgp->fw_stats->send_done_count));
2666 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2667 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2668 mgp->tx.pkt_start, mgp->tx.pkt_done,
2669 (int)ntohl(mgp->fw_stats->send_done_count));
2672 myri10ge_close(mgp->dev);
2673 status = myri10ge_load_firmware(mgp);
2675 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
2678 myri10ge_open(mgp->dev);
2683 * We use our own timer routine rather than relying upon
2684 * netdev->tx_timeout because we have a very large hardware transmit
2685 * queue. Due to the large queue, the netdev->tx_timeout function
2686 * cannot detect a NIC with a parity error in a timely fashion if the
2687 * NIC is lightly loaded.
2689 static void myri10ge_watchdog_timer(unsigned long arg)
2691 struct myri10ge_priv *mgp;
2693 mgp = (struct myri10ge_priv *)arg;
2695 if (mgp->rx_small.watchdog_needed) {
2696 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
2697 mgp->small_bytes + MXGEFW_PAD, 1);
2698 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt >=
2699 myri10ge_fill_thresh)
2700 mgp->rx_small.watchdog_needed = 0;
2702 if (mgp->rx_big.watchdog_needed) {
2703 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 1);
2704 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt >=
2705 myri10ge_fill_thresh)
2706 mgp->rx_big.watchdog_needed = 0;
2709 if (mgp->tx.req != mgp->tx.done &&
2710 mgp->tx.done == mgp->watchdog_tx_done &&
2711 mgp->watchdog_tx_req != mgp->watchdog_tx_done)
2712 /* nic seems like it might be stuck.. */
2713 schedule_work(&mgp->watchdog_work);
2716 mod_timer(&mgp->watchdog_timer,
2717 jiffies + myri10ge_watchdog_timeout * HZ);
2719 mgp->watchdog_tx_done = mgp->tx.done;
2720 mgp->watchdog_tx_req = mgp->tx.req;
2723 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2725 struct net_device *netdev;
2726 struct myri10ge_priv *mgp;
2727 struct device *dev = &pdev->dev;
2730 int status = -ENXIO;
2735 netdev = alloc_etherdev(sizeof(*mgp));
2736 if (netdev == NULL) {
2737 dev_err(dev, "Could not allocate ethernet device\n");
2741 mgp = netdev_priv(netdev);
2742 memset(mgp, 0, sizeof(*mgp));
2745 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
2746 mgp->pause = myri10ge_flow_control;
2747 mgp->intr_coal_delay = myri10ge_intr_coal_delay;
2748 mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
2749 init_waitqueue_head(&mgp->down_wq);
2751 if (pci_enable_device(pdev)) {
2752 dev_err(&pdev->dev, "pci_enable_device call failed\n");
2754 goto abort_with_netdev;
2756 myri10ge_select_firmware(mgp);
2758 /* Find the vendor-specific cap so we can check
2759 * the reboot register later on */
2760 mgp->vendor_specific_offset
2761 = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
2763 /* Set our max read request to 4KB */
2764 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2766 dev_err(&pdev->dev, "Bad PCI_CAP_ID_EXP location %d\n", cap);
2767 goto abort_with_netdev;
2769 status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val);
2771 dev_err(&pdev->dev, "Error %d reading PCI_EXP_DEVCTL\n",
2773 goto abort_with_netdev;
2775 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
2776 status = pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, val);
2778 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
2780 goto abort_with_netdev;
2783 pci_set_master(pdev);
2785 status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2789 "64-bit pci address mask was refused, trying 32-bit");
2790 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2793 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
2794 goto abort_with_netdev;
2796 mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
2797 &mgp->cmd_bus, GFP_KERNEL);
2798 if (mgp->cmd == NULL)
2799 goto abort_with_netdev;
2801 mgp->fw_stats = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
2802 &mgp->fw_stats_bus, GFP_KERNEL);
2803 if (mgp->fw_stats == NULL)
2804 goto abort_with_cmd;
2806 mgp->board_span = pci_resource_len(pdev, 0);
2807 mgp->iomem_base = pci_resource_start(pdev, 0);
2810 mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
2811 MTRR_TYPE_WRCOMB, 1);
2813 /* Hack. need to get rid of these magic numbers */
2815 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2816 if (mgp->sram_size > mgp->board_span) {
2817 dev_err(&pdev->dev, "board span %ld bytes too small\n",
2821 mgp->sram = ioremap(mgp->iomem_base, mgp->board_span);
2822 if (mgp->sram == NULL) {
2823 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
2824 mgp->board_span, mgp->iomem_base);
2828 memcpy_fromio(mgp->eeprom_strings,
2829 mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE,
2830 MYRI10GE_EEPROM_STRINGS_SIZE);
2831 memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
2832 status = myri10ge_read_mac_addr(mgp);
2834 goto abort_with_ioremap;
2836 for (i = 0; i < ETH_ALEN; i++)
2837 netdev->dev_addr[i] = mgp->mac_addr[i];
2839 /* allocate rx done ring */
2840 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
2841 mgp->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
2842 &mgp->rx_done.bus, GFP_KERNEL);
2843 if (mgp->rx_done.entry == NULL)
2844 goto abort_with_ioremap;
2845 memset(mgp->rx_done.entry, 0, bytes);
2847 status = myri10ge_load_firmware(mgp);
2849 dev_err(&pdev->dev, "failed to load firmware\n");
2850 goto abort_with_rx_done;
2853 status = myri10ge_reset(mgp);
2855 dev_err(&pdev->dev, "failed reset\n");
2856 goto abort_with_firmware;
2860 status = pci_enable_msi(pdev);
2863 "Error %d setting up MSI; falling back to xPIC\n",
2866 mgp->msi_enabled = 1;
2869 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
2872 dev_err(&pdev->dev, "failed to allocate IRQ\n");
2873 goto abort_with_firmware;
2876 pci_set_drvdata(pdev, mgp);
2877 if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
2878 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
2879 if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
2880 myri10ge_initial_mtu = 68;
2881 netdev->mtu = myri10ge_initial_mtu;
2882 netdev->open = myri10ge_open;
2883 netdev->stop = myri10ge_close;
2884 netdev->hard_start_xmit = myri10ge_xmit;
2885 netdev->get_stats = myri10ge_get_stats;
2886 netdev->base_addr = mgp->iomem_base;
2887 netdev->irq = pdev->irq;
2888 netdev->change_mtu = myri10ge_change_mtu;
2889 netdev->set_multicast_list = myri10ge_set_multicast_list;
2890 netdev->set_mac_address = myri10ge_set_mac_address;
2891 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
2893 netdev->features |= NETIF_F_HIGHDMA;
2894 netdev->poll = myri10ge_poll;
2895 netdev->weight = myri10ge_napi_weight;
2897 /* Save configuration space to be restored if the
2898 * nic resets due to a parity error */
2899 myri10ge_save_state(mgp);
2901 /* Setup the watchdog timer */
2902 setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
2903 (unsigned long)mgp);
2905 SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
2906 INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
2907 status = register_netdev(netdev);
2909 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
2910 goto abort_with_irq;
2912 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2913 (mgp->msi_enabled ? "MSI" : "xPIC"),
2914 pdev->irq, mgp->tx.boundary, mgp->fw_name,
2915 (mgp->mtrr >= 0 ? "Enabled" : "Disabled"));
2920 free_irq(pdev->irq, mgp);
2921 if (mgp->msi_enabled)
2922 pci_disable_msi(pdev);
2924 abort_with_firmware:
2925 myri10ge_dummy_rdma(mgp, 0);
2928 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
2929 dma_free_coherent(&pdev->dev, bytes,
2930 mgp->rx_done.entry, mgp->rx_done.bus);
2938 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
2940 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
2941 mgp->fw_stats, mgp->fw_stats_bus);
2944 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
2945 mgp->cmd, mgp->cmd_bus);
2949 free_netdev(netdev);
2956 * Does what is necessary to shutdown one Myrinet device. Called
2957 * once for each Myrinet card by the kernel when a module is
2960 static void myri10ge_remove(struct pci_dev *pdev)
2962 struct myri10ge_priv *mgp;
2963 struct net_device *netdev;
2966 mgp = pci_get_drvdata(pdev);
2970 flush_scheduled_work();
2972 unregister_netdev(netdev);
2973 free_irq(pdev->irq, mgp);
2974 if (mgp->msi_enabled)
2975 pci_disable_msi(pdev);
2977 myri10ge_dummy_rdma(mgp, 0);
2979 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
2980 dma_free_coherent(&pdev->dev, bytes,
2981 mgp->rx_done.entry, mgp->rx_done.bus);
2987 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
2989 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
2990 mgp->fw_stats, mgp->fw_stats_bus);
2992 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
2993 mgp->cmd, mgp->cmd_bus);
2995 free_netdev(netdev);
2996 pci_set_drvdata(pdev, NULL);
2999 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3001 static struct pci_device_id myri10ge_pci_tbl[] = {
3002 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
3006 static struct pci_driver myri10ge_driver = {
3008 .probe = myri10ge_probe,
3009 .remove = myri10ge_remove,
3010 .id_table = myri10ge_pci_tbl,
3012 .suspend = myri10ge_suspend,
3013 .resume = myri10ge_resume,
3017 static __init int myri10ge_init_module(void)
3019 printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
3020 MYRI10GE_VERSION_STR);
3021 return pci_register_driver(&myri10ge_driver);
3024 module_init(myri10ge_init_module);
3026 static __exit void myri10ge_cleanup_module(void)
3028 pci_unregister_driver(&myri10ge_driver);
3031 module_exit(myri10ge_cleanup_module);