2 * C-Media CMI8788 driver for C-Media's reference design and similar models
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * SPI 0 -> 1st AK4396 (front)
22 * SPI 1 -> 2nd AK4396 (surround)
23 * SPI 2 -> 3rd AK4396 (center/LFE)
25 * SPI 4 -> 4th AK4396 (back)
27 * GPIO 0 -> DFS0 of AK5385
28 * GPIO 1 -> DFS1 of AK5385
29 * GPIO 8 -> enable headphone amplifier on HT-Omega models
32 #include <linux/delay.h>
33 #include <linux/mutex.h>
34 #include <linux/pci.h>
35 #include <sound/ac97_codec.h>
36 #include <sound/control.h>
37 #include <sound/core.h>
38 #include <sound/initval.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include <sound/tlv.h>
46 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
47 MODULE_DESCRIPTION("C-Media CMI8788 driver");
48 MODULE_LICENSE("GPL v2");
49 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
51 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
52 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
53 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
55 module_param_array(index, int, NULL, 0444);
56 MODULE_PARM_DESC(index, "card index");
57 module_param_array(id, charp, NULL, 0444);
58 MODULE_PARM_DESC(id, "ID string");
59 module_param_array(enable, bool, NULL, 0444);
60 MODULE_PARM_DESC(enable, "enable card");
63 MODEL_CMEDIA_REF, /* C-Media's reference design */
64 MODEL_MERIDIAN, /* AuzenTech X-Meridian */
65 MODEL_CLARO, /* HT-Omega Claro */
66 MODEL_CLARO_HALO, /* HT-Omega Claro halo */
69 static struct pci_device_id oxygen_ids[] __devinitdata = {
70 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
71 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
72 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
73 { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
74 { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
75 { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
76 { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
77 { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
78 { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
79 { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
80 { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
83 MODULE_DEVICE_TABLE(pci, oxygen_ids);
86 #define GPIO_AK5385_DFS_MASK 0x0003
87 #define GPIO_AK5385_DFS_NORMAL 0x0000
88 #define GPIO_AK5385_DFS_DOUBLE 0x0001
89 #define GPIO_AK5385_DFS_QUAD 0x0002
91 #define GPIO_CLARO_HP 0x0100
95 u16 saved_wm8785_registers[2];
98 static void ak4396_write(struct oxygen *chip, unsigned int codec,
101 /* maps ALSA channel pair number to SPI output */
102 static const u8 codec_spi_map[4] = {
105 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
106 OXYGEN_SPI_DATA_LENGTH_2 |
107 OXYGEN_SPI_CLOCK_160 |
108 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
109 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
110 AK4396_WRITE | (reg << 8) | value);
113 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
115 struct generic_data *data = chip->model_data;
117 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
118 OXYGEN_SPI_DATA_LENGTH_2 |
119 OXYGEN_SPI_CLOCK_160 |
120 (3 << OXYGEN_SPI_CODEC_SHIFT) |
121 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
123 if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
124 data->saved_wm8785_registers[reg] = value;
127 static void update_ak4396_volume(struct oxygen *chip)
131 for (i = 0; i < 4; ++i) {
132 ak4396_write(chip, i,
133 AK4396_LCH_ATT, chip->dac_volume[i * 2]);
134 ak4396_write(chip, i,
135 AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
139 static void ak4396_registers_init(struct oxygen *chip)
141 struct generic_data *data = chip->model_data;
144 for (i = 0; i < 4; ++i) {
145 ak4396_write(chip, i,
146 AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
147 ak4396_write(chip, i,
148 AK4396_CONTROL_2, data->ak4396_ctl2);
149 ak4396_write(chip, i,
150 AK4396_CONTROL_3, AK4396_PCM);
152 update_ak4396_volume(chip);
155 static void ak4396_init(struct oxygen *chip)
157 struct generic_data *data = chip->model_data;
159 data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
160 ak4396_registers_init(chip);
161 snd_component_add(chip->card, "AK4396");
164 static void ak5385_init(struct oxygen *chip)
166 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
167 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
168 snd_component_add(chip->card, "AK5385");
171 static void wm8785_registers_init(struct oxygen *chip)
173 struct generic_data *data = chip->model_data;
175 wm8785_write(chip, WM8785_R7, 0);
176 wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
177 wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
180 static void wm8785_init(struct oxygen *chip)
182 struct generic_data *data = chip->model_data;
184 data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE |
185 WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
186 data->saved_wm8785_registers[1] = WM8785_WL_24;
187 wm8785_registers_init(chip);
188 snd_component_add(chip->card, "WM8785");
191 static void generic_init(struct oxygen *chip)
197 static void meridian_init(struct oxygen *chip)
203 static void claro_enable_hp(struct oxygen *chip)
206 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
207 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
210 static void claro_init(struct oxygen *chip)
214 claro_enable_hp(chip);
217 static void claro_halo_init(struct oxygen *chip)
221 claro_enable_hp(chip);
224 static void generic_cleanup(struct oxygen *chip)
228 static void claro_disable_hp(struct oxygen *chip)
230 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
233 static void claro_cleanup(struct oxygen *chip)
235 claro_disable_hp(chip);
238 static void claro_suspend(struct oxygen *chip)
240 claro_disable_hp(chip);
243 static void generic_resume(struct oxygen *chip)
245 ak4396_registers_init(chip);
246 wm8785_registers_init(chip);
249 static void meridian_resume(struct oxygen *chip)
251 ak4396_registers_init(chip);
254 static void claro_resume(struct oxygen *chip)
256 ak4396_registers_init(chip);
257 claro_enable_hp(chip);
260 static void set_ak4396_params(struct oxygen *chip,
261 struct snd_pcm_hw_params *params)
263 struct generic_data *data = chip->model_data;
267 value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
268 if (params_rate(params) <= 54000)
269 value |= AK4396_DFS_NORMAL;
270 else if (params_rate(params) <= 108000)
271 value |= AK4396_DFS_DOUBLE;
273 value |= AK4396_DFS_QUAD;
274 data->ak4396_ctl2 = value;
276 msleep(1); /* wait for the new MCLK to become stable */
278 for (i = 0; i < 4; ++i) {
279 ak4396_write(chip, i,
280 AK4396_CONTROL_1, AK4396_DIF_24_MSB);
281 ak4396_write(chip, i,
282 AK4396_CONTROL_2, value);
283 ak4396_write(chip, i,
284 AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
288 static void update_ak4396_mute(struct oxygen *chip)
290 struct generic_data *data = chip->model_data;
294 value = data->ak4396_ctl2 & ~AK4396_SMUTE;
296 value |= AK4396_SMUTE;
297 data->ak4396_ctl2 = value;
298 for (i = 0; i < 4; ++i)
299 ak4396_write(chip, i, AK4396_CONTROL_2, value);
302 static void set_wm8785_params(struct oxygen *chip,
303 struct snd_pcm_hw_params *params)
307 wm8785_write(chip, WM8785_R7, 0);
309 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
310 if (params_rate(params) <= 48000)
311 value |= WM8785_OSR_SINGLE;
312 else if (params_rate(params) <= 96000)
313 value |= WM8785_OSR_DOUBLE;
315 value |= WM8785_OSR_QUAD;
316 wm8785_write(chip, WM8785_R0, value);
318 if (snd_pcm_format_width(params_format(params)) <= 16)
319 value = WM8785_WL_16;
321 value = WM8785_WL_24;
322 wm8785_write(chip, WM8785_R1, value);
325 static void set_ak5385_params(struct oxygen *chip,
326 struct snd_pcm_hw_params *params)
330 if (params_rate(params) <= 54000)
331 value = GPIO_AK5385_DFS_NORMAL;
332 else if (params_rate(params) <= 108000)
333 value = GPIO_AK5385_DFS_DOUBLE;
335 value = GPIO_AK5385_DFS_QUAD;
336 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
337 value, GPIO_AK5385_DFS_MASK);
340 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
342 static const struct oxygen_model model_generic = {
343 .shortname = "C-Media CMI8788",
344 .longname = "C-Media Oxygen HD Audio",
346 .init = generic_init,
347 .cleanup = generic_cleanup,
348 .resume = generic_resume,
349 .set_dac_params = set_ak4396_params,
350 .set_adc_params = set_wm8785_params,
351 .update_dac_volume = update_ak4396_volume,
352 .update_dac_mute = update_ak4396_mute,
353 .dac_tlv = ak4396_db_scale,
354 .model_data_size = sizeof(struct generic_data),
355 .device_config = PLAYBACK_0_TO_I2S |
356 PLAYBACK_1_TO_SPDIF |
357 PLAYBACK_2_TO_AC97_1 |
358 CAPTURE_0_FROM_I2S_1 |
359 CAPTURE_1_FROM_SPDIF |
360 CAPTURE_2_FROM_AC97_1,
363 .dac_volume_max = 255,
364 .function_flags = OXYGEN_FUNCTION_SPI |
365 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
366 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
367 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
370 static int __devinit get_oxygen_model(struct oxygen *chip,
371 const struct pci_device_id *id)
373 chip->model = model_generic;
374 switch (id->driver_data) {
376 chip->model.init = meridian_init;
377 chip->model.resume = meridian_resume;
378 chip->model.set_adc_params = set_ak5385_params;
379 chip->model.device_config = PLAYBACK_0_TO_I2S |
380 PLAYBACK_1_TO_SPDIF |
381 CAPTURE_0_FROM_I2S_2 |
382 CAPTURE_1_FROM_SPDIF;
385 chip->model.init = claro_init;
386 chip->model.cleanup = claro_cleanup;
387 chip->model.suspend = claro_suspend;
388 chip->model.resume = claro_resume;
390 case MODEL_CLARO_HALO:
391 chip->model.init = claro_halo_init;
392 chip->model.cleanup = claro_cleanup;
393 chip->model.suspend = claro_suspend;
394 chip->model.resume = claro_resume;
395 chip->model.set_adc_params = set_ak5385_params;
398 if (id->driver_data == MODEL_MERIDIAN ||
399 id->driver_data == MODEL_CLARO_HALO) {
400 chip->model.misc_flags = OXYGEN_MISC_MIDI;
401 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
406 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
407 const struct pci_device_id *pci_id)
412 if (dev >= SNDRV_CARDS)
418 err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
419 oxygen_ids, get_oxygen_model);
425 static struct pci_driver oxygen_driver = {
427 .id_table = oxygen_ids,
428 .probe = generic_oxygen_probe,
429 .remove = __devexit_p(oxygen_pci_remove),
431 .suspend = oxygen_pci_suspend,
432 .resume = oxygen_pci_resume,
436 static int __init alsa_card_oxygen_init(void)
438 return pci_register_driver(&oxygen_driver);
441 static void __exit alsa_card_oxygen_exit(void)
443 pci_unregister_driver(&oxygen_driver);
446 module_init(alsa_card_oxygen_init)
447 module_exit(alsa_card_oxygen_exit)