git.oblomov.eu Git - linux-2.6/blob - sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/delay.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/moduleparam.h>
  18
  19 #include <sound/driver.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/info.h>
  23 #include <sound/control.h>
  24 #include <sound/timer.h>
  25 #include <sound/initval.h>
  26 #include <sound/pcm_params.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/irq.h>
  30
  31 #ifdef CONFIG_SBUS
  32 #define SBUS_SUPPORT
  33 #endif
  34
  35 #ifdef SBUS_SUPPORT
  36 #include <asm/sbus.h>
  37 #endif
  38
  39 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  40 #define EBUS_SUPPORT
  41 #endif
  42
  43 #ifdef EBUS_SUPPORT
  44 #include <linux/pci.h>
  45 #include <asm/ebus.h>
  46 #endif
  47
  48 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  49 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  50 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  51
  52 module_param_array(index, int, NULL, 0444);
  53 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  54 module_param_array(id, charp, NULL, 0444);
  55 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  56 module_param_array(enable, bool, NULL, 0444);
  57 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  58 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  59 MODULE_DESCRIPTION("Sun CS4231");
  60 MODULE_LICENSE("GPL");
  61 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  62
  63 #ifdef SBUS_SUPPORT
  64 struct sbus_dma_info {
  65        spinlock_t      lock;
  66        int             dir;
  67        void __iomem    *regs;
  68 };
  69 #endif
  70
  71 struct snd_cs4231;
  72 struct cs4231_dma_control {
  73         void            (*prepare)(struct cs4231_dma_control *dma_cont, int dir);
  74         void            (*enable)(struct cs4231_dma_control *dma_cont, int on);
  75         int             (*request)(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len);
  76         unsigned int    (*address)(struct cs4231_dma_control *dma_cont);
  77         void            (*reset)(struct snd_cs4231 *chip);
  78         void            (*preallocate)(struct snd_cs4231 *chip, struct snd_pcm *pcm);
  79 #ifdef EBUS_SUPPORT
  80         struct          ebus_dma_info   ebus_info;
  81 #endif
  82 #ifdef SBUS_SUPPORT
  83         struct          sbus_dma_info   sbus_info;
  84 #endif
  85 };
  86
  87 struct snd_cs4231 {
  88         spinlock_t              lock;
  89         void __iomem            *port;
  90
  91         struct cs4231_dma_control       p_dma;
  92         struct cs4231_dma_control       c_dma;
  93
  94         u32                     flags;
  95 #define CS4231_FLAG_EBUS        0x00000001
  96 #define CS4231_FLAG_PLAYBACK    0x00000002
  97 #define CS4231_FLAG_CAPTURE     0x00000004
  98
  99         struct snd_card         *card;
 100         struct snd_pcm          *pcm;
 101         struct snd_pcm_substream        *playback_substream;
 102         unsigned int            p_periods_sent;
 103         struct snd_pcm_substream        *capture_substream;
 104         unsigned int            c_periods_sent;
 105         struct snd_timer        *timer;
 106
 107         unsigned short mode;
 108 #define CS4231_MODE_NONE        0x0000
 109 #define CS4231_MODE_PLAY        0x0001
 110 #define CS4231_MODE_RECORD      0x0002
 111 #define CS4231_MODE_TIMER       0x0004
 112 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
 113
 114         unsigned char           image[32];      /* registers image */
 115         int                     mce_bit;
 116         int                     calibrate_mute;
 117         struct mutex            mce_mutex;
 118         struct mutex            open_mutex;
 119
 120         union {
 121 #ifdef SBUS_SUPPORT
 122                 struct sbus_dev         *sdev;
 123 #endif
 124 #ifdef EBUS_SUPPORT
 125                 struct pci_dev          *pdev;
 126 #endif
 127         } dev_u;
 128         unsigned int            irq[2];
 129         unsigned int            regs_size;
 130         struct snd_cs4231       *next;
 131 };
 132
 133 static struct snd_cs4231 *cs4231_list;
 134
 135 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 136  * now....  -DaveM
 137  */
 138
 139 /* IO ports */
 140
 141 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 142
 143 /* XXX offsets are different than PC ISA chips... */
 144 #define c_d_c_CS4231REGSEL      0x0
 145 #define c_d_c_CS4231REG         0x4
 146 #define c_d_c_CS4231STATUS      0x8
 147 #define c_d_c_CS4231PIO         0xc
 148
 149 /* codec registers */
 150
 151 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 152 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 153 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 154 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 155 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 156 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 157 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 158 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 159 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 160 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 161 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 162 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 163 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 164 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 165 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 166 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 167 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 168 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 169 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 170 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 171 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 172 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 173 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 174 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 175 #define CS4236_EXT_REG          0x17    /* extended register access */
 176 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 177 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 178 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 179 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 180 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 181 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 182 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 183 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 184 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 185 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 186 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 187
 188 /* definitions for codec register select port - CODECP( REGSEL ) */
 189
 190 #define CS4231_INIT             0x80    /* CODEC is initializing */
 191 #define CS4231_MCE              0x40    /* mode change enable */
 192 #define CS4231_TRD              0x20    /* transfer request disable */
 193
 194 /* definitions for codec status register - CODECP( STATUS ) */
 195
 196 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 197
 198 /* definitions for codec irq status - CS4231_IRQ_STATUS */
 199
 200 #define CS4231_PLAYBACK_IRQ     0x10
 201 #define CS4231_RECORD_IRQ       0x20
 202 #define CS4231_TIMER_IRQ        0x40
 203 #define CS4231_ALL_IRQS         0x70
 204 #define CS4231_REC_UNDERRUN     0x08
 205 #define CS4231_REC_OVERRUN      0x04
 206 #define CS4231_PLY_OVERRUN      0x02
 207 #define CS4231_PLY_UNDERRUN     0x01
 208
 209 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 210
 211 #define CS4231_ENABLE_MIC_GAIN  0x20
 212
 213 #define CS4231_MIXS_LINE        0x00
 214 #define CS4231_MIXS_AUX1        0x40
 215 #define CS4231_MIXS_MIC         0x80
 216 #define CS4231_MIXS_ALL         0xc0
 217
 218 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 219
 220 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 221 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 222 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 223 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 224 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 225 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 226 #define CS4231_STEREO           0x10    /* stereo mode */
 227 /* bits 3-1 define frequency divisor */
 228 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 229 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 230
 231 /* definitions for interface control register - CS4231_IFACE_CTRL */
 232
 233 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 234 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 235 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 236 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 237 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 238 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 239 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 240
 241 /* definitions for pin control register - CS4231_PIN_CTRL */
 242
 243 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 244 #define CS4231_XCTL1            0x40    /* external control #1 */
 245 #define CS4231_XCTL0            0x80    /* external control #0 */
 246
 247 /* definitions for test and init register - CS4231_TEST_INIT */
 248
 249 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 250 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 251
 252 /* definitions for misc control register - CS4231_MISC_INFO */
 253
 254 #define CS4231_MODE2            0x40    /* MODE 2 */
 255 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 256 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 257
 258 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 259
 260 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 261 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 262 #define CS4231_OLB              0x80    /* output level bit */
 263
 264 /* SBUS DMA register defines.  */
 265
 266 #define APCCSR  0x10UL  /* APC DMA CSR */
 267 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 268 #define APCCC   0x24UL  /* APC Capture Count */
 269 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 270 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 271 #define APCPVA  0x30UL  /* APC Play DMA Address */
 272 #define APCPC   0x34UL  /* APC Play Count */
 273 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 274 #define APCPNC  0x3cUL  /* APC Play Next Count */
 275
 276 /* Defines for SBUS DMA-routines */
 277
 278 #define APCVA  0x0UL    /* APC DMA Address */
 279 #define APCC   0x4UL    /* APC Count */
 280 #define APCNVA 0x8UL    /* APC DMA Next Address */
 281 #define APCNC  0xcUL    /* APC Next Count */
 282 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
 283 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
 284
 285 /* APCCSR bits */
 286
 287 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 288 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 289 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 290 #define APC_GENL_INT    0x100000 /* General interrupt */
 291 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 292 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 293 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 294 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 295 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 296 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 297 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 298 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 299 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 300 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 301 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 302 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 303 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 304 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 305 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 306 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 307 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 308 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 309
 310 /* EBUS DMA register offsets  */
 311
 312 #define EBDMA_CSR       0x00UL  /* Control/Status */
 313 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 314 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 315
 316 /*
 317  *  Some variables
 318  */
 319
 320 static unsigned char freq_bits[14] = {
 321         /* 5510 */      0x00 | CS4231_XTAL2,
 322         /* 6620 */      0x0E | CS4231_XTAL2,
 323         /* 8000 */      0x00 | CS4231_XTAL1,
 324         /* 9600 */      0x0E | CS4231_XTAL1,
 325         /* 11025 */     0x02 | CS4231_XTAL2,
 326         /* 16000 */     0x02 | CS4231_XTAL1,
 327         /* 18900 */     0x04 | CS4231_XTAL2,
 328         /* 22050 */     0x06 | CS4231_XTAL2,
 329         /* 27042 */     0x04 | CS4231_XTAL1,
 330         /* 32000 */     0x06 | CS4231_XTAL1,
 331         /* 33075 */     0x0C | CS4231_XTAL2,
 332         /* 37800 */     0x08 | CS4231_XTAL2,
 333         /* 44100 */     0x0A | CS4231_XTAL2,
 334         /* 48000 */     0x0C | CS4231_XTAL1
 335 };
 336
 337 static unsigned int rates[14] = {
 338         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 339         27042, 32000, 33075, 37800, 44100, 48000
 340 };
 341
 342 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
 343         .count  = 14,
 344         .list   = rates,
 345 };
 346
 347 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
 348 {
 349         return snd_pcm_hw_constraint_list(runtime, 0,
 350                                           SNDRV_PCM_HW_PARAM_RATE,
 351                                           &hw_constraints_rates);
 352 }
 353
 354 static unsigned char snd_cs4231_original_image[32] =
 355 {
 356         0x00,                   /* 00/00 - lic */
 357         0x00,                   /* 01/01 - ric */
 358         0x9f,                   /* 02/02 - la1ic */
 359         0x9f,                   /* 03/03 - ra1ic */
 360         0x9f,                   /* 04/04 - la2ic */
 361         0x9f,                   /* 05/05 - ra2ic */
 362         0xbf,                   /* 06/06 - loc */
 363         0xbf,                   /* 07/07 - roc */
 364         0x20,                   /* 08/08 - pdfr */
 365         CS4231_AUTOCALIB,       /* 09/09 - ic */
 366         0x00,                   /* 0a/10 - pc */
 367         0x00,                   /* 0b/11 - ti */
 368         CS4231_MODE2,           /* 0c/12 - mi */
 369         0x00,                   /* 0d/13 - lbc */
 370         0x00,                   /* 0e/14 - pbru */
 371         0x00,                   /* 0f/15 - pbrl */
 372         0x80,                   /* 10/16 - afei */
 373         0x01,                   /* 11/17 - afeii */
 374         0x9f,                   /* 12/18 - llic */
 375         0x9f,                   /* 13/19 - rlic */
 376         0x00,                   /* 14/20 - tlb */
 377         0x00,                   /* 15/21 - thb */
 378         0x00,                   /* 16/22 - la3mic/reserved */
 379         0x00,                   /* 17/23 - ra3mic/reserved */
 380         0x00,                   /* 18/24 - afs */
 381         0x00,                   /* 19/25 - lamoc/version */
 382         0x00,                   /* 1a/26 - mioc */
 383         0x00,                   /* 1b/27 - ramoc/reserved */
 384         0x20,                   /* 1c/28 - cdfr */
 385         0x00,                   /* 1d/29 - res4 */
 386         0x00,                   /* 1e/30 - cbru */
 387         0x00,                   /* 1f/31 - cbrl */
 388 };
 389
 390 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
 391 {
 392 #ifdef EBUS_SUPPORT
 393         if (cp->flags & CS4231_FLAG_EBUS) {
 394                 return readb(reg_addr);
 395         } else {
 396 #endif
 397 #ifdef SBUS_SUPPORT
 398                 return sbus_readb(reg_addr);
 399 #endif
 400 #ifdef EBUS_SUPPORT
 401         }
 402 #endif
 403 }
 404
 405 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, void __iomem *reg_addr)
 406 {
 407 #ifdef EBUS_SUPPORT
 408         if (cp->flags & CS4231_FLAG_EBUS) {
 409                 return writeb(val, reg_addr);
 410         } else {
 411 #endif
 412 #ifdef SBUS_SUPPORT
 413                 return sbus_writeb(val, reg_addr);
 414 #endif
 415 #ifdef EBUS_SUPPORT
 416         }
 417 #endif
 418 }
 419
 420 /*
 421  *  Basic I/O functions
 422  */
 423
 424 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
 425                      unsigned char mask, unsigned char value)
 426 {
 427         int timeout;
 428         unsigned char tmp;
 429
 430         for (timeout = 250;
 431              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 432              timeout--)
 433                 udelay(100);
 434 #ifdef CONFIG_SND_DEBUG
 435         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 436                 snd_printdd("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 437 #endif
 438         if (chip->calibrate_mute) {
 439                 chip->image[reg] &= mask;
 440                 chip->image[reg] |= value;
 441         } else {
 442                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 443                 mb();
 444                 tmp = (chip->image[reg] & mask) | value;
 445                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 446                 chip->image[reg] = tmp;
 447                 mb();
 448         }
 449 }
 450
 451 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 452 {
 453         int timeout;
 454
 455         for (timeout = 250;
 456              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 457              timeout--)
 458                 udelay(100);
 459 #ifdef CONFIG_SND_DEBUG
 460         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 461                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 462 #endif
 463         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 464         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 465         mb();
 466 }
 467
 468 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 469 {
 470         int timeout;
 471
 472         for (timeout = 250;
 473              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 474              timeout--)
 475                 udelay(100);
 476 #ifdef CONFIG_SND_DEBUG
 477         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 478                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 479 #endif
 480         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 481         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 482         chip->image[reg] = value;
 483         mb();
 484 }
 485
 486 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
 487 {
 488         int timeout;
 489         unsigned char ret;
 490
 491         for (timeout = 250;
 492              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 493              timeout--)
 494                 udelay(100);
 495 #ifdef CONFIG_SND_DEBUG
 496         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 497                 snd_printdd("in: auto calibration time out - reg = 0x%x\n", reg);
 498 #endif
 499         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 500         mb();
 501         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 502         return ret;
 503 }
 504
 505 /*
 506  *  CS4231 detection / MCE routines
 507  */
 508
 509 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
 510 {
 511         int timeout;
 512
 513         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 514         for (timeout = 5; timeout > 0; timeout--)
 515                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 516
 517         /* end of cleanup sequence */
 518         for (timeout = 500;
 519              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 520              timeout--)
 521                 udelay(1000);
 522 }
 523
 524 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
 525 {
 526         unsigned long flags;
 527         int timeout;
 528
 529         spin_lock_irqsave(&chip->lock, flags);
 530         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 531                 udelay(100);
 532 #ifdef CONFIG_SND_DEBUG
 533         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 534                 snd_printdd("mce_up - auto calibration time out (0)\n");
 535 #endif
 536         chip->mce_bit |= CS4231_MCE;
 537         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 538         if (timeout == 0x80)
 539                 snd_printdd("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
 540         if (!(timeout & CS4231_MCE))
 541                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 542         spin_unlock_irqrestore(&chip->lock, flags);
 543 }
 544
 545 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
 546 {
 547         unsigned long flags;
 548         int timeout;
 549
 550         spin_lock_irqsave(&chip->lock, flags);
 551         snd_cs4231_busy_wait(chip);
 552 #ifdef CONFIG_SND_DEBUG
 553         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 554                 snd_printdd("mce_down [%p] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 555 #endif
 556         chip->mce_bit &= ~CS4231_MCE;
 557         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 558         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 559         if (timeout == 0x80)
 560                 snd_printdd("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
 561         if ((timeout & CS4231_MCE) == 0) {
 562                 spin_unlock_irqrestore(&chip->lock, flags);
 563                 return;
 564         }
 565         snd_cs4231_busy_wait(chip);
 566
 567         /* calibration process */
 568
 569         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 570                 udelay(100);
 571         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 572                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 573                 spin_unlock_irqrestore(&chip->lock, flags);
 574                 return;
 575         }
 576
 577         /* in 10ms increments, check condition, up to 250ms */
 578         timeout = 25;
 579         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 580                 spin_unlock_irqrestore(&chip->lock, flags);
 581                 if (--timeout < 0) {
 582                         snd_printk("mce_down - auto calibration time out (2)\n");
 583                         return;
 584                 }
 585                 msleep(10);
 586                 spin_lock_irqsave(&chip->lock, flags);
 587         }
 588
 589         /* in 10ms increments, check condition, up to 100ms */
 590         timeout = 10;
 591         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 592                 spin_unlock_irqrestore(&chip->lock, flags);
 593                 if (--timeout < 0) {
 594                         snd_printk("mce_down - auto calibration time out (3)\n");
 595                         return;
 596                 }
 597                 msleep(10);
 598                 spin_lock_irqsave(&chip->lock, flags);
 599         }
 600         spin_unlock_irqrestore(&chip->lock, flags);
 601 }
 602
 603 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
 604                                    struct snd_pcm_substream *substream,
 605                                    unsigned int *periods_sent)
 606 {
 607         struct snd_pcm_runtime *runtime = substream->runtime;
 608
 609         while (1) {
 610                 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
 611                 unsigned int offset = period_size * (*periods_sent);
 612
 613                 BUG_ON(period_size >= (1 << 24));
 614
 615                 if (dma_cont->request(dma_cont, runtime->dma_addr + offset, period_size))
 616                         return;
 617                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 618         }
 619 }
 620
 621 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
 622                                unsigned int what, int on)
 623 {
 624         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 625         struct cs4231_dma_control *dma_cont;
 626
 627         if (what & CS4231_PLAYBACK_ENABLE) {
 628                 dma_cont = &chip->p_dma;
 629                 if (on) {
 630                         dma_cont->prepare(dma_cont, 0);
 631                         dma_cont->enable(dma_cont, 1);
 632                         snd_cs4231_advance_dma(dma_cont,
 633                                 chip->playback_substream,
 634                                 &chip->p_periods_sent);
 635                 } else {
 636                         dma_cont->enable(dma_cont, 0);
 637                 }
 638         }
 639         if (what & CS4231_RECORD_ENABLE) {
 640                 dma_cont = &chip->c_dma;
 641                 if (on) {
 642                         dma_cont->prepare(dma_cont, 1);
 643                         dma_cont->enable(dma_cont, 1);
 644                         snd_cs4231_advance_dma(dma_cont,
 645                                 chip->capture_substream,
 646                                 &chip->c_periods_sent);
 647                 } else {
 648                         dma_cont->enable(dma_cont, 0);
 649                 }
 650         }
 651 }
 652
 653 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
 654 {
 655         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 656         int result = 0;
 657
 658         switch (cmd) {
 659         case SNDRV_PCM_TRIGGER_START:
 660         case SNDRV_PCM_TRIGGER_STOP:
 661         {
 662                 unsigned int what = 0;
 663                 struct snd_pcm_substream *s;
 664                 struct list_head *pos;
 665                 unsigned long flags;
 666
 667                 snd_pcm_group_for_each(pos, substream) {
 668                         s = snd_pcm_group_substream_entry(pos);
 669                         if (s == chip->playback_substream) {
 670                                 what |= CS4231_PLAYBACK_ENABLE;
 671                                 snd_pcm_trigger_done(s, substream);
 672                         } else if (s == chip->capture_substream) {
 673                                 what |= CS4231_RECORD_ENABLE;
 674                                 snd_pcm_trigger_done(s, substream);
 675                         }
 676                 }
 677
 678                 spin_lock_irqsave(&chip->lock, flags);
 679                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 680                         cs4231_dma_trigger(substream, what, 1);
 681                         chip->image[CS4231_IFACE_CTRL] |= what;
 682                 } else {
 683                         cs4231_dma_trigger(substream, what, 0);
 684                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 685                 }
 686                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 687                                chip->image[CS4231_IFACE_CTRL]);
 688                 spin_unlock_irqrestore(&chip->lock, flags);
 689                 break;
 690         }
 691         default:
 692                 result = -EINVAL;
 693                 break;
 694         }
 695
 696         return result;
 697 }
 698
 699 /*
 700  *  CODEC I/O
 701  */
 702
 703 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 704 {
 705         int i;
 706
 707         for (i = 0; i < 14; i++)
 708                 if (rate == rates[i])
 709                         return freq_bits[i];
 710         // snd_BUG();
 711         return freq_bits[13];
 712 }
 713
 714 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, int channels)
 715 {
 716         unsigned char rformat;
 717
 718         rformat = CS4231_LINEAR_8;
 719         switch (format) {
 720         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 721         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 722         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 723         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 724         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 725         }
 726         if (channels > 1)
 727                 rformat |= CS4231_STEREO;
 728         return rformat;
 729 }
 730
 731 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
 732 {
 733         unsigned long flags;
 734
 735         mute = mute ? 1 : 0;
 736         spin_lock_irqsave(&chip->lock, flags);
 737         if (chip->calibrate_mute == mute) {
 738                 spin_unlock_irqrestore(&chip->lock, flags);
 739                 return;
 740         }
 741         if (!mute) {
 742                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 743                                 chip->image[CS4231_LEFT_INPUT]);
 744                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 745                                 chip->image[CS4231_RIGHT_INPUT]);
 746                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 747                                 chip->image[CS4231_LOOPBACK]);
 748         }
 749         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 750                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 751         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 752                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 753         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 754                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 755         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 756                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 757         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 758                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 759         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 760                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 761         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 762                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 763         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 764                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 765         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 766                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 767         chip->calibrate_mute = mute;
 768         spin_unlock_irqrestore(&chip->lock, flags);
 769 }
 770
 771 static void snd_cs4231_playback_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 772                                        unsigned char pdfr)
 773 {
 774         unsigned long flags;
 775
 776         mutex_lock(&chip->mce_mutex);
 777         snd_cs4231_calibrate_mute(chip, 1);
 778
 779         snd_cs4231_mce_up(chip);
 780
 781         spin_lock_irqsave(&chip->lock, flags);
 782         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 783                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 784                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 785                        pdfr);
 786         spin_unlock_irqrestore(&chip->lock, flags);
 787
 788         snd_cs4231_mce_down(chip);
 789
 790         snd_cs4231_calibrate_mute(chip, 0);
 791         mutex_unlock(&chip->mce_mutex);
 792 }
 793
 794 static void snd_cs4231_capture_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 795                                       unsigned char cdfr)
 796 {
 797         unsigned long flags;
 798
 799         mutex_lock(&chip->mce_mutex);
 800         snd_cs4231_calibrate_mute(chip, 1);
 801
 802         snd_cs4231_mce_up(chip);
 803
 804         spin_lock_irqsave(&chip->lock, flags);
 805         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 806                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 807                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 808                                (cdfr & 0x0f));
 809                 spin_unlock_irqrestore(&chip->lock, flags);
 810                 snd_cs4231_mce_down(chip);
 811                 snd_cs4231_mce_up(chip);
 812                 spin_lock_irqsave(&chip->lock, flags);
 813         }
 814         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 815         spin_unlock_irqrestore(&chip->lock, flags);
 816
 817         snd_cs4231_mce_down(chip);
 818
 819         snd_cs4231_calibrate_mute(chip, 0);
 820         mutex_unlock(&chip->mce_mutex);
 821 }
 822
 823 /*
 824  *  Timer interface
 825  */
 826
 827 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
 828 {
 829         struct snd_cs4231 *chip = snd_timer_chip(timer);
 830
 831         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 832 }
 833
 834 static int snd_cs4231_timer_start(struct snd_timer *timer)
 835 {
 836         unsigned long flags;
 837         unsigned int ticks;
 838         struct snd_cs4231 *chip = snd_timer_chip(timer);
 839
 840         spin_lock_irqsave(&chip->lock, flags);
 841         ticks = timer->sticks;
 842         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 843             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 844             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 845                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 846                                chip->image[CS4231_TIMER_HIGH] =
 847                                (unsigned char) (ticks >> 8));
 848                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 849                                chip->image[CS4231_TIMER_LOW] =
 850                                (unsigned char) ticks);
 851                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 852                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 853         }
 854         spin_unlock_irqrestore(&chip->lock, flags);
 855
 856         return 0;
 857 }
 858
 859 static int snd_cs4231_timer_stop(struct snd_timer *timer)
 860 {
 861         unsigned long flags;
 862         struct snd_cs4231 *chip = snd_timer_chip(timer);
 863
 864         spin_lock_irqsave(&chip->lock, flags);
 865         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 866                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 867         spin_unlock_irqrestore(&chip->lock, flags);
 868
 869         return 0;
 870 }
 871
 872 static void __init snd_cs4231_init(struct snd_cs4231 *chip)
 873 {
 874         unsigned long flags;
 875
 876         snd_cs4231_mce_down(chip);
 877
 878 #ifdef SNDRV_DEBUG_MCE
 879         snd_printdd("init: (1)\n");
 880 #endif
 881         snd_cs4231_mce_up(chip);
 882         spin_lock_irqsave(&chip->lock, flags);
 883         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 884                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 885                                             CS4231_CALIB_MODE);
 886         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 887         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 888         spin_unlock_irqrestore(&chip->lock, flags);
 889         snd_cs4231_mce_down(chip);
 890
 891 #ifdef SNDRV_DEBUG_MCE
 892         snd_printdd("init: (2)\n");
 893 #endif
 894
 895         snd_cs4231_mce_up(chip);
 896         spin_lock_irqsave(&chip->lock, flags);
 897         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 898         spin_unlock_irqrestore(&chip->lock, flags);
 899         snd_cs4231_mce_down(chip);
 900
 901 #ifdef SNDRV_DEBUG_MCE
 902         snd_printdd("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 903 #endif
 904
 905         spin_lock_irqsave(&chip->lock, flags);
 906         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 907         spin_unlock_irqrestore(&chip->lock, flags);
 908
 909         snd_cs4231_mce_up(chip);
 910         spin_lock_irqsave(&chip->lock, flags);
 911         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 912         spin_unlock_irqrestore(&chip->lock, flags);
 913         snd_cs4231_mce_down(chip);
 914
 915 #ifdef SNDRV_DEBUG_MCE
 916         snd_printdd("init: (4)\n");
 917 #endif
 918
 919         snd_cs4231_mce_up(chip);
 920         spin_lock_irqsave(&chip->lock, flags);
 921         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 922         spin_unlock_irqrestore(&chip->lock, flags);
 923         snd_cs4231_mce_down(chip);
 924
 925 #ifdef SNDRV_DEBUG_MCE
 926         snd_printdd("init: (5)\n");
 927 #endif
 928 }
 929
 930 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
 931 {
 932         unsigned long flags;
 933
 934         mutex_lock(&chip->open_mutex);
 935         if ((chip->mode & mode)) {
 936                 mutex_unlock(&chip->open_mutex);
 937                 return -EAGAIN;
 938         }
 939         if (chip->mode & CS4231_MODE_OPEN) {
 940                 chip->mode |= mode;
 941                 mutex_unlock(&chip->open_mutex);
 942                 return 0;
 943         }
 944         /* ok. now enable and ack CODEC IRQ */
 945         spin_lock_irqsave(&chip->lock, flags);
 946         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 947                        CS4231_RECORD_IRQ |
 948                        CS4231_TIMER_IRQ);
 949         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 950         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 951         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 952
 953         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 954                        CS4231_RECORD_IRQ |
 955                        CS4231_TIMER_IRQ);
 956         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 957
 958         spin_unlock_irqrestore(&chip->lock, flags);
 959
 960         chip->mode = mode;
 961         mutex_unlock(&chip->open_mutex);
 962         return 0;
 963 }
 964
 965 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
 966 {
 967         unsigned long flags;
 968
 969         mutex_lock(&chip->open_mutex);
 970         chip->mode &= ~mode;
 971         if (chip->mode & CS4231_MODE_OPEN) {
 972                 mutex_unlock(&chip->open_mutex);
 973                 return;
 974         }
 975         snd_cs4231_calibrate_mute(chip, 1);
 976
 977         /* disable IRQ */
 978         spin_lock_irqsave(&chip->lock, flags);
 979         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 980         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 981         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 982
 983         /* now disable record & playback */
 984
 985         if (chip->image[CS4231_IFACE_CTRL] &
 986             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 987              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
 988                 spin_unlock_irqrestore(&chip->lock, flags);
 989                 snd_cs4231_mce_up(chip);
 990                 spin_lock_irqsave(&chip->lock, flags);
 991                 chip->image[CS4231_IFACE_CTRL] &=
 992                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 993                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
 994                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 995                 spin_unlock_irqrestore(&chip->lock, flags);
 996                 snd_cs4231_mce_down(chip);
 997                 spin_lock_irqsave(&chip->lock, flags);
 998         }
 999
1000         /* clear IRQ again */
1001         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1002         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1003         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1004         spin_unlock_irqrestore(&chip->lock, flags);
1005
1006         snd_cs4231_calibrate_mute(chip, 0);
1007
1008         chip->mode = 0;
1009         mutex_unlock(&chip->open_mutex);
1010 }
1011
1012 /*
1013  *  timer open/close
1014  */
1015
1016 static int snd_cs4231_timer_open(struct snd_timer *timer)
1017 {
1018         struct snd_cs4231 *chip = snd_timer_chip(timer);
1019         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1020         return 0;
1021 }
1022
1023 static int snd_cs4231_timer_close(struct snd_timer * timer)
1024 {
1025         struct snd_cs4231 *chip = snd_timer_chip(timer);
1026         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1027         return 0;
1028 }
1029
1030 static struct snd_timer_hardware snd_cs4231_timer_table =
1031 {
1032         .flags          =       SNDRV_TIMER_HW_AUTO,
1033         .resolution     =       9945,
1034         .ticks          =       65535,
1035         .open           =       snd_cs4231_timer_open,
1036         .close          =       snd_cs4231_timer_close,
1037         .c_resolution   =       snd_cs4231_timer_resolution,
1038         .start          =       snd_cs4231_timer_start,
1039         .stop           =       snd_cs4231_timer_stop,
1040 };
1041
1042 /*
1043  *  ok.. exported functions..
1044  */
1045
1046 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
1047                                          struct snd_pcm_hw_params *hw_params)
1048 {
1049         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1050         unsigned char new_pdfr;
1051         int err;
1052
1053         if ((err = snd_pcm_lib_malloc_pages(substream,
1054                                             params_buffer_bytes(hw_params))) < 0)
1055                 return err;
1056         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1057                                          params_channels(hw_params)) |
1058                 snd_cs4231_get_rate(params_rate(hw_params));
1059         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1060
1061         return 0;
1062 }
1063
1064 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
1065 {
1066         return snd_pcm_lib_free_pages(substream);
1067 }
1068
1069 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1070 {
1071         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1072         struct snd_pcm_runtime *runtime = substream->runtime;
1073         unsigned long flags;
1074
1075         spin_lock_irqsave(&chip->lock, flags);
1076
1077         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1078                                             CS4231_PLAYBACK_PIO);
1079
1080         BUG_ON(runtime->period_size > 0xffff + 1);
1081
1082         chip->p_periods_sent = 0;
1083         spin_unlock_irqrestore(&chip->lock, flags);
1084
1085         return 0;
1086 }
1087
1088 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
1089                                         struct snd_pcm_hw_params *hw_params)
1090 {
1091         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1092         unsigned char new_cdfr;
1093         int err;
1094
1095         if ((err = snd_pcm_lib_malloc_pages(substream,
1096                                             params_buffer_bytes(hw_params))) < 0)
1097                 return err;
1098         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1099                                          params_channels(hw_params)) |
1100                 snd_cs4231_get_rate(params_rate(hw_params));
1101         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1102
1103         return 0;
1104 }
1105
1106 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
1107 {
1108         return snd_pcm_lib_free_pages(substream);
1109 }
1110
1111 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1112 {
1113         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1114         unsigned long flags;
1115
1116         spin_lock_irqsave(&chip->lock, flags);
1117         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1118                                             CS4231_RECORD_PIO);
1119
1120
1121         chip->c_periods_sent = 0;
1122         spin_unlock_irqrestore(&chip->lock, flags);
1123
1124         return 0;
1125 }
1126
1127 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1128 {
1129         unsigned long flags;
1130         unsigned char res;
1131
1132         spin_lock_irqsave(&chip->lock, flags);
1133         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1134         spin_unlock_irqrestore(&chip->lock, flags);
1135
1136         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1137                 chip->capture_substream->runtime->overrange++;
1138 }
1139
1140 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
1141 {
1142         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1143                 snd_pcm_period_elapsed(chip->playback_substream);
1144                 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
1145                                             &chip->p_periods_sent);
1146         }
1147 }
1148
1149 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1150 {
1151         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1152                 snd_pcm_period_elapsed(chip->capture_substream);
1153                 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1154                                             &chip->c_periods_sent);
1155         }
1156 }
1157
1158 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
1159 {
1160         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1161         struct cs4231_dma_control *dma_cont = &chip->p_dma;
1162         size_t ptr;
1163
1164         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1165                 return 0;
1166         ptr = dma_cont->address(dma_cont);
1167         if (ptr != 0)
1168                 ptr -= substream->runtime->dma_addr;
1169
1170         return bytes_to_frames(substream->runtime, ptr);
1171 }
1172
1173 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
1174 {
1175         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1176         struct cs4231_dma_control *dma_cont = &chip->c_dma;
1177         size_t ptr;
1178
1179         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1180                 return 0;
1181         ptr = dma_cont->address(dma_cont);
1182         if (ptr != 0)
1183                 ptr -= substream->runtime->dma_addr;
1184
1185         return bytes_to_frames(substream->runtime, ptr);
1186 }
1187
1188 /*
1189
1190  */
1191
1192 static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1193 {
1194         unsigned long flags;
1195         int i, id, vers;
1196         unsigned char *ptr;
1197
1198         id = vers = 0;
1199         for (i = 0; i < 50; i++) {
1200                 mb();
1201                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1202                         udelay(2000);
1203                 else {
1204                         spin_lock_irqsave(&chip->lock, flags);
1205                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1206                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1207                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1208                         spin_unlock_irqrestore(&chip->lock, flags);
1209                         if (id == 0x0a)
1210                                 break;  /* this is valid value */
1211                 }
1212         }
1213         snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1214         if (id != 0x0a)
1215                 return -ENODEV; /* no valid device found */
1216
1217         spin_lock_irqsave(&chip->lock, flags);
1218
1219
1220         /* Reset DMA engine (sbus only).  */
1221         chip->p_dma.reset(chip);
1222
1223         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1224         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1225         mb();
1226
1227         spin_unlock_irqrestore(&chip->lock, flags);
1228
1229         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1230         chip->image[CS4231_IFACE_CTRL] =
1231                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1232         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1233         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1234         if (vers & 0x20)
1235                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1236
1237         ptr = (unsigned char *) &chip->image;
1238
1239         snd_cs4231_mce_down(chip);
1240
1241         spin_lock_irqsave(&chip->lock, flags);
1242
1243         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1244                 snd_cs4231_out(chip, i, *ptr++);
1245
1246         spin_unlock_irqrestore(&chip->lock, flags);
1247
1248         snd_cs4231_mce_up(chip);
1249
1250         snd_cs4231_mce_down(chip);
1251
1252         mdelay(2);
1253
1254         return 0;               /* all things are ok.. */
1255 }
1256
1257 static struct snd_pcm_hardware snd_cs4231_playback =
1258 {
1259         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1260                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1261         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1262                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1263                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1264                                  SNDRV_PCM_FMTBIT_S16_BE),
1265         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1266         .rate_min               = 5510,
1267         .rate_max               = 48000,
1268         .channels_min           = 1,
1269         .channels_max           = 2,
1270         .buffer_bytes_max       = (32*1024),
1271         .period_bytes_min       = 4096,
1272         .period_bytes_max       = (32*1024),
1273         .periods_min            = 1,
1274         .periods_max            = 1024,
1275 };
1276
1277 static struct snd_pcm_hardware snd_cs4231_capture =
1278 {
1279         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1280                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1281         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1282                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1283                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1284                                  SNDRV_PCM_FMTBIT_S16_BE),
1285         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1286         .rate_min               = 5510,
1287         .rate_max               = 48000,
1288         .channels_min           = 1,
1289         .channels_max           = 2,
1290         .buffer_bytes_max       = (32*1024),
1291         .period_bytes_min       = 4096,
1292         .period_bytes_max       = (32*1024),
1293         .periods_min            = 1,
1294         .periods_max            = 1024,
1295 };
1296
1297 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1298 {
1299         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1300         struct snd_pcm_runtime *runtime = substream->runtime;
1301         int err;
1302
1303         runtime->hw = snd_cs4231_playback;
1304
1305         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1306                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1307                 return err;
1308         }
1309         chip->playback_substream = substream;
1310         chip->p_periods_sent = 0;
1311         snd_pcm_set_sync(substream);
1312         snd_cs4231_xrate(runtime);
1313
1314         return 0;
1315 }
1316
1317 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1318 {
1319         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1320         struct snd_pcm_runtime *runtime = substream->runtime;
1321         int err;
1322
1323         runtime->hw = snd_cs4231_capture;
1324
1325         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1326                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1327                 return err;
1328         }
1329         chip->capture_substream = substream;
1330         chip->c_periods_sent = 0;
1331         snd_pcm_set_sync(substream);
1332         snd_cs4231_xrate(runtime);
1333
1334         return 0;
1335 }
1336
1337 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1338 {
1339         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1340
1341         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1342         chip->playback_substream = NULL;
1343
1344         return 0;
1345 }
1346
1347 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1348 {
1349         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1350
1351         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1352         chip->capture_substream = NULL;
1353
1354         return 0;
1355 }
1356
1357 /* XXX We can do some power-management, in particular on EBUS using
1358  * XXX the audio AUXIO register...
1359  */
1360
1361 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1362         .open           =       snd_cs4231_playback_open,
1363         .close          =       snd_cs4231_playback_close,
1364         .ioctl          =       snd_pcm_lib_ioctl,
1365         .hw_params      =       snd_cs4231_playback_hw_params,
1366         .hw_free        =       snd_cs4231_playback_hw_free,
1367         .prepare        =       snd_cs4231_playback_prepare,
1368         .trigger        =       snd_cs4231_trigger,
1369         .pointer        =       snd_cs4231_playback_pointer,
1370 };
1371
1372 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1373         .open           =       snd_cs4231_capture_open,
1374         .close          =       snd_cs4231_capture_close,
1375         .ioctl          =       snd_pcm_lib_ioctl,
1376         .hw_params      =       snd_cs4231_capture_hw_params,
1377         .hw_free        =       snd_cs4231_capture_hw_free,
1378         .prepare        =       snd_cs4231_capture_prepare,
1379         .trigger        =       snd_cs4231_trigger,
1380         .pointer        =       snd_cs4231_capture_pointer,
1381 };
1382
1383 static int __init snd_cs4231_pcm(struct snd_cs4231 *chip)
1384 {
1385         struct snd_pcm *pcm;
1386         int err;
1387
1388         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1389                 return err;
1390
1391         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1392         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1393
1394         /* global setup */
1395         pcm->private_data = chip;
1396         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1397         strcpy(pcm->name, "CS4231");
1398
1399         chip->p_dma.preallocate(chip, pcm);
1400
1401         chip->pcm = pcm;
1402
1403         return 0;
1404 }
1405
1406 static int __init snd_cs4231_timer(struct snd_cs4231 *chip)
1407 {
1408         struct snd_timer *timer;
1409         struct snd_timer_id tid;
1410         int err;
1411
1412         /* Timer initialization */
1413         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1414         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1415         tid.card = chip->card->number;
1416         tid.device = 0;
1417         tid.subdevice = 0;
1418         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1419                 return err;
1420         strcpy(timer->name, "CS4231");
1421         timer->private_data = chip;
1422         timer->hw = snd_cs4231_timer_table;
1423         chip->timer = timer;
1424
1425         return 0;
1426 }
1427
1428 /*
1429  *  MIXER part
1430  */
1431
1432 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1433                                struct snd_ctl_elem_info *uinfo)
1434 {
1435         static char *texts[4] = {
1436                 "Line", "CD", "Mic", "Mix"
1437         };
1438         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1439
1440         snd_assert(chip->card != NULL, return -EINVAL);
1441         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1442         uinfo->count = 2;
1443         uinfo->value.enumerated.items = 4;
1444         if (uinfo->value.enumerated.item > 3)
1445                 uinfo->value.enumerated.item = 3;
1446         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1447
1448         return 0;
1449 }
1450
1451 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1452                               struct snd_ctl_elem_value *ucontrol)
1453 {
1454         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1455         unsigned long flags;
1456
1457         spin_lock_irqsave(&chip->lock, flags);
1458         ucontrol->value.enumerated.item[0] =
1459                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1460         ucontrol->value.enumerated.item[1] =
1461                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1462         spin_unlock_irqrestore(&chip->lock, flags);
1463
1464         return 0;
1465 }
1466
1467 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1468                               struct snd_ctl_elem_value *ucontrol)
1469 {
1470         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1471         unsigned long flags;
1472         unsigned short left, right;
1473         int change;
1474
1475         if (ucontrol->value.enumerated.item[0] > 3 ||
1476             ucontrol->value.enumerated.item[1] > 3)
1477                 return -EINVAL;
1478         left = ucontrol->value.enumerated.item[0] << 6;
1479         right = ucontrol->value.enumerated.item[1] << 6;
1480
1481         spin_lock_irqsave(&chip->lock, flags);
1482
1483         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1484         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1485         change = left != chip->image[CS4231_LEFT_INPUT] ||
1486                  right != chip->image[CS4231_RIGHT_INPUT];
1487         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1488         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1489
1490         spin_unlock_irqrestore(&chip->lock, flags);
1491
1492         return change;
1493 }
1494
1495 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1496                                   struct snd_ctl_elem_info *uinfo)
1497 {
1498         int mask = (kcontrol->private_value >> 16) & 0xff;
1499
1500         uinfo->type = (mask == 1) ?
1501                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1502         uinfo->count = 1;
1503         uinfo->value.integer.min = 0;
1504         uinfo->value.integer.max = mask;
1505
1506         return 0;
1507 }
1508
1509 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1510                                  struct snd_ctl_elem_value *ucontrol)
1511 {
1512         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1513         unsigned long flags;
1514         int reg = kcontrol->private_value & 0xff;
1515         int shift = (kcontrol->private_value >> 8) & 0xff;
1516         int mask = (kcontrol->private_value >> 16) & 0xff;
1517         int invert = (kcontrol->private_value >> 24) & 0xff;
1518
1519         spin_lock_irqsave(&chip->lock, flags);
1520
1521         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1522
1523         spin_unlock_irqrestore(&chip->lock, flags);
1524
1525         if (invert)
1526                 ucontrol->value.integer.value[0] =
1527                         (mask - ucontrol->value.integer.value[0]);
1528
1529         return 0;
1530 }
1531
1532 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1533                                  struct snd_ctl_elem_value *ucontrol)
1534 {
1535         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1536         unsigned long flags;
1537         int reg = kcontrol->private_value & 0xff;
1538         int shift = (kcontrol->private_value >> 8) & 0xff;
1539         int mask = (kcontrol->private_value >> 16) & 0xff;
1540         int invert = (kcontrol->private_value >> 24) & 0xff;
1541         int change;
1542         unsigned short val;
1543
1544         val = (ucontrol->value.integer.value[0] & mask);
1545         if (invert)
1546                 val = mask - val;
1547         val <<= shift;
1548
1549         spin_lock_irqsave(&chip->lock, flags);
1550
1551         val = (chip->image[reg] & ~(mask << shift)) | val;
1552         change = val != chip->image[reg];
1553         snd_cs4231_out(chip, reg, val);
1554
1555         spin_unlock_irqrestore(&chip->lock, flags);
1556
1557         return change;
1558 }
1559
1560 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1561                                   struct snd_ctl_elem_info *uinfo)
1562 {
1563         int mask = (kcontrol->private_value >> 24) & 0xff;
1564
1565         uinfo->type = mask == 1 ?
1566                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1567         uinfo->count = 2;
1568         uinfo->value.integer.min = 0;
1569         uinfo->value.integer.max = mask;
1570
1571         return 0;
1572 }
1573
1574 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1575                                  struct snd_ctl_elem_value *ucontrol)
1576 {
1577         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1578         unsigned long flags;
1579         int left_reg = kcontrol->private_value & 0xff;
1580         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1581         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1582         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1583         int mask = (kcontrol->private_value >> 24) & 0xff;
1584         int invert = (kcontrol->private_value >> 22) & 1;
1585
1586         spin_lock_irqsave(&chip->lock, flags);
1587
1588         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1589         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1590
1591         spin_unlock_irqrestore(&chip->lock, flags);
1592
1593         if (invert) {
1594                 ucontrol->value.integer.value[0] =
1595                         (mask - ucontrol->value.integer.value[0]);
1596                 ucontrol->value.integer.value[1] =
1597                         (mask - ucontrol->value.integer.value[1]);
1598         }
1599
1600         return 0;
1601 }
1602
1603 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1604                                  struct snd_ctl_elem_value *ucontrol)
1605 {
1606         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1607         unsigned long flags;
1608         int left_reg = kcontrol->private_value & 0xff;
1609         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1610         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1611         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1612         int mask = (kcontrol->private_value >> 24) & 0xff;
1613         int invert = (kcontrol->private_value >> 22) & 1;
1614         int change;
1615         unsigned short val1, val2;
1616
1617         val1 = ucontrol->value.integer.value[0] & mask;
1618         val2 = ucontrol->value.integer.value[1] & mask;
1619         if (invert) {
1620                 val1 = mask - val1;
1621                 val2 = mask - val2;
1622         }
1623         val1 <<= shift_left;
1624         val2 <<= shift_right;
1625
1626         spin_lock_irqsave(&chip->lock, flags);
1627
1628         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1629         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1630         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1631         snd_cs4231_out(chip, left_reg, val1);
1632         snd_cs4231_out(chip, right_reg, val2);
1633
1634         spin_unlock_irqrestore(&chip->lock, flags);
1635
1636         return change;
1637 }
1638
1639 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1640 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1641   .info = snd_cs4231_info_single, \
1642   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1643   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1644
1645 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1646 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1647   .info = snd_cs4231_info_double, \
1648   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1649   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1650
1651 static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
1652 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1653 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1654 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1655 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1656 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1657 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1658 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1659 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1660 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1661 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1662 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1663 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1664 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1665 {
1666         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1667         .name   = "Capture Source",
1668         .info   = snd_cs4231_info_mux,
1669         .get    = snd_cs4231_get_mux,
1670         .put    = snd_cs4231_put_mux,
1671 },
1672 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1673 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1674 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1675 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1676 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1677 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1678 };
1679
1680 static int __init snd_cs4231_mixer(struct snd_cs4231 *chip)
1681 {
1682         struct snd_card *card;
1683         int err, idx;
1684
1685         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1686
1687         card = chip->card;
1688
1689         strcpy(card->mixername, chip->pcm->name);
1690
1691         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1692                 if ((err = snd_ctl_add(card,
1693                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1694                                                     chip))) < 0)
1695                         return err;
1696         }
1697         return 0;
1698 }
1699
1700 static int dev;
1701
1702 static int __init cs4231_attach_begin(struct snd_card **rcard)
1703 {
1704         struct snd_card *card;
1705
1706         *rcard = NULL;
1707
1708         if (dev >= SNDRV_CARDS)
1709                 return -ENODEV;
1710
1711         if (!enable[dev]) {
1712                 dev++;
1713                 return -ENOENT;
1714         }
1715
1716         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1717         if (card == NULL)
1718                 return -ENOMEM;
1719
1720         strcpy(card->driver, "CS4231");
1721         strcpy(card->shortname, "Sun CS4231");
1722
1723         *rcard = card;
1724         return 0;
1725 }
1726
1727 static int __init cs4231_attach_finish(struct snd_card *card, struct snd_cs4231 *chip)
1728 {
1729         int err;
1730
1731         if ((err = snd_cs4231_pcm(chip)) < 0)
1732                 goto out_err;
1733
1734         if ((err = snd_cs4231_mixer(chip)) < 0)
1735                 goto out_err;
1736
1737         if ((err = snd_cs4231_timer(chip)) < 0)
1738                 goto out_err;
1739
1740         if ((err = snd_card_register(card)) < 0)
1741                 goto out_err;
1742
1743         chip->next = cs4231_list;
1744         cs4231_list = chip;
1745
1746         dev++;
1747         return 0;
1748
1749 out_err:
1750         snd_card_free(card);
1751         return err;
1752 }
1753
1754 #ifdef SBUS_SUPPORT
1755
1756 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1757 {
1758         unsigned long flags;
1759         unsigned char status;
1760         u32 csr;
1761         struct snd_cs4231 *chip = dev_id;
1762
1763         /*This is IRQ is not raised by the cs4231*/
1764         if (!(__cs4231_readb(chip, CS4231P(chip, STATUS)) & CS4231_GLOBALIRQ))
1765                 return IRQ_NONE;
1766
1767         /* ACK the APC interrupt. */
1768         csr = sbus_readl(chip->port + APCCSR);
1769
1770         sbus_writel(csr, chip->port + APCCSR);
1771
1772         if ((csr & APC_PDMA_READY) &&
1773             (csr & APC_PLAY_INT) &&
1774             (csr & APC_XINT_PNVA) &&
1775             !(csr & APC_XINT_EMPT))
1776                         snd_cs4231_play_callback(chip);
1777
1778         if ((csr & APC_CDMA_READY) &&
1779             (csr & APC_CAPT_INT) &&
1780             (csr & APC_XINT_CNVA) &&
1781             !(csr & APC_XINT_EMPT))
1782                         snd_cs4231_capture_callback(chip);
1783
1784         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1785
1786         if (status & CS4231_TIMER_IRQ) {
1787                 if (chip->timer)
1788                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1789         }
1790
1791         if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1792                 snd_cs4231_overrange(chip);
1793
1794         /* ACK the CS4231 interrupt. */
1795         spin_lock_irqsave(&chip->lock, flags);
1796         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1797         spin_unlock_irqrestore(&chip->lock, flags);
1798
1799         return 0;
1800 }
1801
1802 /*
1803  * SBUS DMA routines
1804  */
1805
1806 static int sbus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
1807 {
1808         unsigned long flags;
1809         u32 test, csr;
1810         int err;
1811         struct sbus_dma_info *base = &dma_cont->sbus_info;
1812
1813         if (len >= (1 << 24))
1814                 return -EINVAL;
1815         spin_lock_irqsave(&base->lock, flags);
1816         csr = sbus_readl(base->regs + APCCSR);
1817         err = -EINVAL;
1818         test = APC_CDMA_READY;
1819         if ( base->dir == APC_PLAY )
1820                 test = APC_PDMA_READY;
1821         if (!(csr & test))
1822                 goto out;
1823         err = -EBUSY;
1824         csr = sbus_readl(base->regs + APCCSR);
1825         test = APC_XINT_CNVA;
1826         if ( base->dir == APC_PLAY )
1827                 test = APC_XINT_PNVA;
1828         if (!(csr & test))
1829                 goto out;
1830         err = 0;
1831         sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1832         sbus_writel(len, base->regs + base->dir + APCNC);
1833 out:
1834         spin_unlock_irqrestore(&base->lock, flags);
1835         return err;
1836 }
1837
1838 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1839 {
1840         unsigned long flags;
1841         u32 csr, test;
1842         struct sbus_dma_info *base = &dma_cont->sbus_info;
1843
1844         spin_lock_irqsave(&base->lock, flags);
1845         csr = sbus_readl(base->regs + APCCSR);
1846         test =  APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1847                 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1848                  APC_XINT_PENA;
1849         if ( base->dir == APC_RECORD )
1850                 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1851                         APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1852         csr |= test;
1853         sbus_writel(csr, base->regs + APCCSR);
1854         spin_unlock_irqrestore(&base->lock, flags);
1855 }
1856
1857 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1858 {
1859         unsigned long flags;
1860         u32 csr, shift;
1861         struct sbus_dma_info *base = &dma_cont->sbus_info;
1862
1863         spin_lock_irqsave(&base->lock, flags);
1864         if (!on) {
1865                 if (base->dir == APC_PLAY) {
1866                         sbus_writel(0, base->regs + base->dir + APCNVA);
1867                         sbus_writel(1, base->regs + base->dir + APCC);
1868                 }
1869                 else
1870                 {
1871                         sbus_writel(0, base->regs + base->dir + APCNC);
1872                         sbus_writel(0, base->regs + base->dir + APCVA);
1873                 }
1874         }
1875         udelay(600);
1876         csr = sbus_readl(base->regs + APCCSR);
1877         shift = 0;
1878         if ( base->dir == APC_PLAY )
1879                 shift = 1;
1880         if (on)
1881                 csr &= ~(APC_CPAUSE << shift);
1882         else
1883                 csr |= (APC_CPAUSE << shift);
1884         sbus_writel(csr, base->regs + APCCSR);
1885         if (on)
1886                 csr |= (APC_CDMA_READY << shift);
1887         else
1888                 csr &= ~(APC_CDMA_READY << shift);
1889         sbus_writel(csr, base->regs + APCCSR);
1890
1891         spin_unlock_irqrestore(&base->lock, flags);
1892 }
1893
1894 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1895 {
1896         struct sbus_dma_info *base = &dma_cont->sbus_info;
1897
1898         return sbus_readl(base->regs + base->dir + APCVA);
1899 }
1900
1901 static void sbus_dma_reset(struct snd_cs4231 *chip)
1902 {
1903         sbus_writel(APC_CHIP_RESET, chip->port + APCCSR);
1904         sbus_writel(0x00, chip->port + APCCSR);
1905         sbus_writel(sbus_readl(chip->port + APCCSR) | APC_CDC_RESET,
1906                     chip->port + APCCSR);
1907
1908         udelay(20);
1909
1910         sbus_writel(sbus_readl(chip->port + APCCSR) & ~APC_CDC_RESET,
1911                     chip->port + APCCSR);
1912         sbus_writel(sbus_readl(chip->port + APCCSR) | (APC_XINT_ENA |
1913                        APC_XINT_PENA |
1914                        APC_XINT_CENA),
1915                        chip->port + APCCSR);
1916 }
1917
1918 static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
1919 {
1920         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1921                                               snd_dma_sbus_data(chip->dev_u.sdev),
1922                                               64*1024, 128*1024);
1923 }
1924
1925 /*
1926  * Init and exit routines
1927  */
1928
1929 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1930 {
1931         if (chip->irq[0])
1932                 free_irq(chip->irq[0], chip);
1933
1934         if (chip->port)
1935                 sbus_iounmap(chip->port, chip->regs_size);
1936
1937         kfree(chip);
1938
1939         return 0;
1940 }
1941
1942 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1943 {
1944         struct snd_cs4231 *cp = device->device_data;
1945
1946         return snd_cs4231_sbus_free(cp);
1947 }
1948
1949 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1950         .dev_free       =       snd_cs4231_sbus_dev_free,
1951 };
1952
1953 static int __init snd_cs4231_sbus_create(struct snd_card *card,
1954                                          struct sbus_dev *sdev,
1955                                          int dev,
1956                                          struct snd_cs4231 **rchip)
1957 {
1958         struct snd_cs4231 *chip;
1959         int err;
1960
1961         *rchip = NULL;
1962         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1963         if (chip == NULL)
1964                 return -ENOMEM;
1965
1966         spin_lock_init(&chip->lock);
1967         spin_lock_init(&chip->c_dma.sbus_info.lock);
1968         spin_lock_init(&chip->p_dma.sbus_info.lock);
1969         mutex_init(&chip->mce_mutex);
1970         mutex_init(&chip->open_mutex);
1971         chip->card = card;
1972         chip->dev_u.sdev = sdev;
1973         chip->regs_size = sdev->reg_addrs[0].reg_size;
1974         memcpy(&chip->image, &snd_cs4231_original_image,
1975                sizeof(snd_cs4231_original_image));
1976
1977         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1978                                   chip->regs_size, "cs4231");
1979         if (!chip->port) {
1980                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1981                 return -EIO;
1982         }
1983
1984         chip->c_dma.sbus_info.regs = chip->port;
1985         chip->p_dma.sbus_info.regs = chip->port;
1986         chip->c_dma.sbus_info.dir = APC_RECORD;
1987         chip->p_dma.sbus_info.dir = APC_PLAY;
1988
1989         chip->p_dma.prepare = sbus_dma_prepare;
1990         chip->p_dma.enable = sbus_dma_enable;
1991         chip->p_dma.request = sbus_dma_request;
1992         chip->p_dma.address = sbus_dma_addr;
1993         chip->p_dma.reset = sbus_dma_reset;
1994         chip->p_dma.preallocate = sbus_dma_preallocate;
1995
1996         chip->c_dma.prepare = sbus_dma_prepare;
1997         chip->c_dma.enable = sbus_dma_enable;
1998         chip->c_dma.request = sbus_dma_request;
1999         chip->c_dma.address = sbus_dma_addr;
2000         chip->c_dma.reset = sbus_dma_reset;
2001         chip->c_dma.preallocate = sbus_dma_preallocate;
2002
2003         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
2004                         IRQF_SHARED, "cs4231", chip)) {
2005                 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
2006                             dev, sdev->irqs[0]);
2007                 snd_cs4231_sbus_free(chip);
2008                 return -EBUSY;
2009         }
2010         chip->irq[0] = sdev->irqs[0];
2011
2012         if (snd_cs4231_probe(chip) < 0) {
2013                 snd_cs4231_sbus_free(chip);
2014                 return -ENODEV;
2015         }
2016         snd_cs4231_init(chip);
2017
2018         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2019                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
2020                 snd_cs4231_sbus_free(chip);
2021                 return err;
2022         }
2023
2024         *rchip = chip;
2025         return 0;
2026 }
2027
2028 static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
2029 {
2030         struct resource *rp = &sdev->resource[0];
2031         struct snd_cs4231 *cp;
2032         struct snd_card *card;
2033         int err;
2034
2035         err = cs4231_attach_begin(&card);
2036         if (err)
2037                 return err;
2038
2039         sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
2040                 card->shortname,
2041                 rp->flags & 0xffL,
2042                 (unsigned long long)rp->start,
2043                 sdev->irqs[0]);
2044
2045         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2046                 snd_card_free(card);
2047                 return err;
2048         }
2049
2050         return cs4231_attach_finish(card, cp);
2051 }
2052 #endif
2053
2054 #ifdef EBUS_SUPPORT
2055
2056 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
2057 {
2058         struct snd_cs4231 *chip = cookie;
2059
2060         snd_cs4231_play_callback(chip);
2061 }
2062
2063 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
2064 {
2065         struct snd_cs4231 *chip = cookie;
2066
2067         snd_cs4231_capture_callback(chip);
2068 }
2069
2070 /*
2071  * EBUS DMA wrappers
2072  */
2073
2074 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
2075 {
2076         return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
2077 }
2078
2079 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
2080 {
2081         ebus_dma_enable(&dma_cont->ebus_info, on);
2082 }
2083
2084 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
2085 {
2086         ebus_dma_prepare(&dma_cont->ebus_info, dir);
2087 }
2088
2089 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
2090 {
2091         return ebus_dma_addr(&dma_cont->ebus_info);
2092 }
2093
2094 static void _ebus_dma_reset(struct snd_cs4231 *chip)
2095 {
2096         return;
2097 }
2098
2099 static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
2100 {
2101         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
2102                                       snd_dma_pci_data(chip->dev_u.pdev),
2103                                       64*1024, 128*1024);
2104 }
2105
2106 /*
2107  * Init and exit routines
2108  */
2109
2110 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
2111 {
2112         if (chip->c_dma.ebus_info.regs) {
2113                 ebus_dma_unregister(&chip->c_dma.ebus_info);
2114                 iounmap(chip->c_dma.ebus_info.regs);
2115         }
2116         if (chip->p_dma.ebus_info.regs) {
2117                 ebus_dma_unregister(&chip->p_dma.ebus_info);
2118                 iounmap(chip->p_dma.ebus_info.regs);
2119         }
2120
2121         if (chip->port)
2122                 iounmap(chip->port);
2123
2124         kfree(chip);
2125
2126         return 0;
2127 }
2128
2129 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
2130 {
2131         struct snd_cs4231 *cp = device->device_data;
2132
2133         return snd_cs4231_ebus_free(cp);
2134 }
2135
2136 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
2137         .dev_free       =       snd_cs4231_ebus_dev_free,
2138 };
2139
2140 static int __init snd_cs4231_ebus_create(struct snd_card *card,
2141                                          struct linux_ebus_device *edev,
2142                                          int dev,
2143                                          struct snd_cs4231 **rchip)
2144 {
2145         struct snd_cs4231 *chip;
2146         int err;
2147
2148         *rchip = NULL;
2149         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2150         if (chip == NULL)
2151                 return -ENOMEM;
2152
2153         spin_lock_init(&chip->lock);
2154         spin_lock_init(&chip->c_dma.ebus_info.lock);
2155         spin_lock_init(&chip->p_dma.ebus_info.lock);
2156         mutex_init(&chip->mce_mutex);
2157         mutex_init(&chip->open_mutex);
2158         chip->flags |= CS4231_FLAG_EBUS;
2159         chip->card = card;
2160         chip->dev_u.pdev = edev->bus->self;
2161         memcpy(&chip->image, &snd_cs4231_original_image,
2162                sizeof(snd_cs4231_original_image));
2163         strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
2164         chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2165         chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
2166         chip->c_dma.ebus_info.client_cookie = chip;
2167         chip->c_dma.ebus_info.irq = edev->irqs[0];
2168         strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
2169         chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2170         chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
2171         chip->p_dma.ebus_info.client_cookie = chip;
2172         chip->p_dma.ebus_info.irq = edev->irqs[1];
2173
2174         chip->p_dma.prepare = _ebus_dma_prepare;
2175         chip->p_dma.enable = _ebus_dma_enable;
2176         chip->p_dma.request = _ebus_dma_request;
2177         chip->p_dma.address = _ebus_dma_addr;
2178         chip->p_dma.reset = _ebus_dma_reset;
2179         chip->p_dma.preallocate = _ebus_dma_preallocate;
2180
2181         chip->c_dma.prepare = _ebus_dma_prepare;
2182         chip->c_dma.enable = _ebus_dma_enable;
2183         chip->c_dma.request = _ebus_dma_request;
2184         chip->c_dma.address = _ebus_dma_addr;
2185         chip->c_dma.reset = _ebus_dma_reset;
2186         chip->c_dma.preallocate = _ebus_dma_preallocate;
2187
2188         chip->port = ioremap(edev->resource[0].start, 0x10);
2189         chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
2190         chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
2191         if (!chip->port || !chip->p_dma.ebus_info.regs || !chip->c_dma.ebus_info.regs) {
2192                 snd_cs4231_ebus_free(chip);
2193                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2194                 return -EIO;
2195         }
2196
2197         if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2198                 snd_cs4231_ebus_free(chip);
2199                 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2200                 return -EBUSY;
2201         }
2202         if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2203                 snd_cs4231_ebus_free(chip);
2204                 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2205                 return -EBUSY;
2206         }
2207
2208         if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2209                 snd_cs4231_ebus_free(chip);
2210                 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2211                 return -EBUSY;
2212         }
2213         if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2214                 snd_cs4231_ebus_free(chip);
2215                 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2216                 return -EBUSY;
2217         }
2218
2219         if (snd_cs4231_probe(chip) < 0) {
2220                 snd_cs4231_ebus_free(chip);
2221                 return -ENODEV;
2222         }
2223         snd_cs4231_init(chip);
2224
2225         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2226                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2227                 snd_cs4231_ebus_free(chip);
2228                 return err;
2229         }
2230
2231         *rchip = chip;
2232         return 0;
2233 }
2234
2235 static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
2236 {
2237         struct snd_card *card;
2238         struct snd_cs4231 *chip;
2239         int err;
2240
2241         err = cs4231_attach_begin(&card);
2242         if (err)
2243                 return err;
2244
2245         sprintf(card->longname, "%s at 0x%lx, irq %d",
2246                 card->shortname,
2247                 edev->resource[0].start,
2248                 edev->irqs[0]);
2249
2250         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2251                 snd_card_free(card);
2252                 return err;
2253         }
2254
2255         return cs4231_attach_finish(card, chip);
2256 }
2257 #endif
2258
2259 static int __init cs4231_init(void)
2260 {
2261 #ifdef SBUS_SUPPORT
2262         struct sbus_bus *sbus;
2263         struct sbus_dev *sdev;
2264 #endif
2265 #ifdef EBUS_SUPPORT
2266         struct linux_ebus *ebus;
2267         struct linux_ebus_device *edev;
2268 #endif
2269         int found;
2270
2271         found = 0;
2272
2273 #ifdef SBUS_SUPPORT
2274         for_all_sbusdev(sdev, sbus) {
2275                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2276                         if (cs4231_sbus_attach(sdev) == 0)
2277                                 found++;
2278                 }
2279         }
2280 #endif
2281 #ifdef EBUS_SUPPORT
2282         for_each_ebus(ebus) {
2283                 for_each_ebusdev(edev, ebus) {
2284                         int match = 0;
2285
2286                         if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
2287                                 match = 1;
2288                         } else if (!strcmp(edev->prom_node->name, "audio")) {
2289                                 char *compat;
2290
2291                                 compat = of_get_property(edev->prom_node,
2292                                                          "compatible", NULL);
2293                                 if (compat && !strcmp(compat, "SUNW,CS4231"))
2294                                         match = 1;
2295                         }
2296
2297                         if (match &&
2298                             cs4231_ebus_attach(edev) == 0)
2299                                 found++;
2300                 }
2301         }
2302 #endif
2303
2304
2305         return (found > 0) ? 0 : -EIO;
2306 }
2307
2308 static void __exit cs4231_exit(void)
2309 {
2310         struct snd_cs4231 *p = cs4231_list;
2311
2312         while (p != NULL) {
2313                 struct snd_cs4231 *next = p->next;
2314
2315                 snd_card_free(p->card);
2316
2317                 p = next;
2318         }
2319
2320         cs4231_list = NULL;
2321 }
2322
2323 module_init(cs4231_init);
2324 module_exit(cs4231_exit);