2 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
17 * Boston, MA 02110-1301, USA.
20 #include <linux/dma-mapping.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/serial.h>
24 #include <linux/gpio.h>
25 #include <linux/dma-mapping.h>
26 #include <mach/hardware.h>
27 #include <mach/irqs.h>
28 #include <mach/common.h>
29 #include <mach/imx-uart.h>
30 #include <mach/mx3_camera.h>
34 static struct resource uart0[] = {
36 .start = UART1_BASE_ADDR,
37 .end = UART1_BASE_ADDR + 0x0B5,
38 .flags = IORESOURCE_MEM,
40 .start = MXC_INT_UART1,
42 .flags = IORESOURCE_IRQ,
46 struct platform_device mxc_uart_device0 = {
50 .num_resources = ARRAY_SIZE(uart0),
53 static struct resource uart1[] = {
55 .start = UART2_BASE_ADDR,
56 .end = UART2_BASE_ADDR + 0x0B5,
57 .flags = IORESOURCE_MEM,
59 .start = MXC_INT_UART2,
61 .flags = IORESOURCE_IRQ,
65 struct platform_device mxc_uart_device1 = {
69 .num_resources = ARRAY_SIZE(uart1),
72 static struct resource uart2[] = {
74 .start = UART3_BASE_ADDR,
75 .end = UART3_BASE_ADDR + 0x0B5,
76 .flags = IORESOURCE_MEM,
78 .start = MXC_INT_UART3,
80 .flags = IORESOURCE_IRQ,
84 struct platform_device mxc_uart_device2 = {
88 .num_resources = ARRAY_SIZE(uart2),
91 #ifdef CONFIG_ARCH_MX31
92 static struct resource uart3[] = {
94 .start = UART4_BASE_ADDR,
95 .end = UART4_BASE_ADDR + 0x0B5,
96 .flags = IORESOURCE_MEM,
98 .start = MXC_INT_UART4,
100 .flags = IORESOURCE_IRQ,
104 struct platform_device mxc_uart_device3 = {
108 .num_resources = ARRAY_SIZE(uart3),
111 static struct resource uart4[] = {
113 .start = UART5_BASE_ADDR,
114 .end = UART5_BASE_ADDR + 0x0B5,
115 .flags = IORESOURCE_MEM,
117 .start = MXC_INT_UART5,
118 .end = MXC_INT_UART5,
119 .flags = IORESOURCE_IRQ,
123 struct platform_device mxc_uart_device4 = {
127 .num_resources = ARRAY_SIZE(uart4),
129 #endif /* CONFIG_ARCH_MX31 */
131 /* GPIO port description */
132 static struct mxc_gpio_port imx_gpio_ports[] = {
134 .chip.label = "gpio-0",
135 .base = IO_ADDRESS(GPIO1_BASE_ADDR),
136 .irq = MXC_INT_GPIO1,
137 .virtual_irq_start = MXC_GPIO_IRQ_START,
140 .chip.label = "gpio-1",
141 .base = IO_ADDRESS(GPIO2_BASE_ADDR),
142 .irq = MXC_INT_GPIO2,
143 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
146 .chip.label = "gpio-2",
147 .base = IO_ADDRESS(GPIO3_BASE_ADDR),
148 .irq = MXC_INT_GPIO3,
149 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
153 int __init mxc_register_gpios(void)
155 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
158 static struct resource mxc_w1_master_resources[] = {
160 .start = OWIRE_BASE_ADDR,
161 .end = OWIRE_BASE_ADDR + SZ_4K - 1,
162 .flags = IORESOURCE_MEM,
166 struct platform_device mxc_w1_master_device = {
169 .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
170 .resource = mxc_w1_master_resources,
173 static struct resource mxc_nand_resources[] = {
175 .start = 0, /* runtime dependent */
177 .flags = IORESOURCE_MEM
179 .start = MXC_INT_NANDFC,
180 .end = MXC_INT_NANDFC,
181 .flags = IORESOURCE_IRQ
185 struct platform_device mxc_nand_device = {
188 .num_resources = ARRAY_SIZE(mxc_nand_resources),
189 .resource = mxc_nand_resources,
192 static struct resource mxc_i2c0_resources[] = {
194 .start = I2C_BASE_ADDR,
195 .end = I2C_BASE_ADDR + SZ_4K - 1,
196 .flags = IORESOURCE_MEM,
199 .start = MXC_INT_I2C,
201 .flags = IORESOURCE_IRQ,
205 struct platform_device mxc_i2c_device0 = {
208 .num_resources = ARRAY_SIZE(mxc_i2c0_resources),
209 .resource = mxc_i2c0_resources,
212 static struct resource mxc_i2c1_resources[] = {
214 .start = I2C2_BASE_ADDR,
215 .end = I2C2_BASE_ADDR + SZ_4K - 1,
216 .flags = IORESOURCE_MEM,
219 .start = MXC_INT_I2C2,
221 .flags = IORESOURCE_IRQ,
225 struct platform_device mxc_i2c_device1 = {
228 .num_resources = ARRAY_SIZE(mxc_i2c1_resources),
229 .resource = mxc_i2c1_resources,
232 static struct resource mxc_i2c2_resources[] = {
234 .start = I2C3_BASE_ADDR,
235 .end = I2C3_BASE_ADDR + SZ_4K - 1,
236 .flags = IORESOURCE_MEM,
239 .start = MXC_INT_I2C3,
241 .flags = IORESOURCE_IRQ,
245 struct platform_device mxc_i2c_device2 = {
248 .num_resources = ARRAY_SIZE(mxc_i2c2_resources),
249 .resource = mxc_i2c2_resources,
252 #ifdef CONFIG_ARCH_MX31
253 static struct resource mxcsdhc0_resources[] = {
255 .start = MMC_SDHC1_BASE_ADDR,
256 .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
257 .flags = IORESOURCE_MEM,
259 .start = MXC_INT_MMC_SDHC1,
260 .end = MXC_INT_MMC_SDHC1,
261 .flags = IORESOURCE_IRQ,
265 static struct resource mxcsdhc1_resources[] = {
267 .start = MMC_SDHC2_BASE_ADDR,
268 .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
269 .flags = IORESOURCE_MEM,
271 .start = MXC_INT_MMC_SDHC2,
272 .end = MXC_INT_MMC_SDHC2,
273 .flags = IORESOURCE_IRQ,
277 struct platform_device mxcsdhc_device0 = {
280 .num_resources = ARRAY_SIZE(mxcsdhc0_resources),
281 .resource = mxcsdhc0_resources,
284 struct platform_device mxcsdhc_device1 = {
287 .num_resources = ARRAY_SIZE(mxcsdhc1_resources),
288 .resource = mxcsdhc1_resources,
291 static struct resource rnga_resources[] = {
293 .start = RNGA_BASE_ADDR,
294 .end = RNGA_BASE_ADDR + 0x28,
295 .flags = IORESOURCE_MEM,
299 struct platform_device mxc_rnga_device = {
303 .resource = rnga_resources,
305 #endif /* CONFIG_ARCH_MX31 */
307 /* i.MX31 Image Processing Unit */
309 /* The resource order is important! */
310 static struct resource mx3_ipu_rsrc[] = {
312 .start = IPU_CTRL_BASE_ADDR,
313 .end = IPU_CTRL_BASE_ADDR + 0x5F,
314 .flags = IORESOURCE_MEM,
316 .start = IPU_CTRL_BASE_ADDR + 0x88,
317 .end = IPU_CTRL_BASE_ADDR + 0xB3,
318 .flags = IORESOURCE_MEM,
320 .start = MXC_INT_IPU_SYN,
321 .end = MXC_INT_IPU_SYN,
322 .flags = IORESOURCE_IRQ,
324 .start = MXC_INT_IPU_ERR,
325 .end = MXC_INT_IPU_ERR,
326 .flags = IORESOURCE_IRQ,
330 struct platform_device mx3_ipu = {
333 .num_resources = ARRAY_SIZE(mx3_ipu_rsrc),
334 .resource = mx3_ipu_rsrc,
337 static struct resource fb_resources[] = {
339 .start = IPU_CTRL_BASE_ADDR + 0xB4,
340 .end = IPU_CTRL_BASE_ADDR + 0x1BF,
341 .flags = IORESOURCE_MEM,
345 struct platform_device mx3_fb = {
346 .name = "mx3_sdc_fb",
348 .num_resources = ARRAY_SIZE(fb_resources),
349 .resource = fb_resources,
351 .coherent_dma_mask = DMA_BIT_MASK(32),
355 static struct resource camera_resources[] = {
357 .start = IPU_CTRL_BASE_ADDR + 0x60,
358 .end = IPU_CTRL_BASE_ADDR + 0x87,
359 .flags = IORESOURCE_MEM,
363 struct platform_device mx3_camera = {
364 .name = "mx3-camera",
366 .num_resources = ARRAY_SIZE(camera_resources),
367 .resource = camera_resources,
369 .coherent_dma_mask = DMA_BIT_MASK(32),
373 static struct resource otg_resources[] = {
375 .start = OTG_BASE_ADDR,
376 .end = OTG_BASE_ADDR + 0x1ff,
377 .flags = IORESOURCE_MEM,
379 .start = MXC_INT_USB3,
381 .flags = IORESOURCE_IRQ,
385 static u64 otg_dmamask = DMA_BIT_MASK(32);
387 /* OTG gadget device */
388 struct platform_device mxc_otg_udc_device = {
389 .name = "fsl-usb2-udc",
392 .dma_mask = &otg_dmamask,
393 .coherent_dma_mask = DMA_BIT_MASK(32),
395 .resource = otg_resources,
396 .num_resources = ARRAY_SIZE(otg_resources),
399 #ifdef CONFIG_ARCH_MX35
400 static struct resource mxc_fec_resources[] = {
402 .start = MXC_FEC_BASE_ADDR,
403 .end = MXC_FEC_BASE_ADDR + 0xfff,
404 .flags = IORESOURCE_MEM
406 .start = MXC_INT_FEC,
408 .flags = IORESOURCE_IRQ
412 struct platform_device mxc_fec_device = {
415 .num_resources = ARRAY_SIZE(mxc_fec_resources),
416 .resource = mxc_fec_resources,
420 static int mx3_devices_init(void)
423 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
424 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
425 mxc_register_device(&mxc_rnga_device, NULL);
428 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
429 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
435 subsys_initcall(mx3_devices_init);