Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6] / drivers / staging / vt6655 / upc.h
1 /*
2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3  * All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * File: upc.h
20  *
21  * Purpose: Macros to access device
22  *
23  * Author: Tevin Chen
24  *
25  * Date: Mar 17, 1997
26  *
27  */
28
29
30 #ifndef __UPC_H__
31 #define __UPC_H__
32
33 #if !defined(DEVICE_H)
34 #include "device.h"
35 #endif
36 #if !defined(__TTYPE_H__)
37 #include "ttype.h"
38 #endif
39
40 /*---------------------  Export Definitions -------------------------*/
41
42
43 //
44 //  For IO mapped
45 //
46
47 #ifdef IO_MAP
48
49 #define VNSvInPortB(dwIOAddress, pbyData) {                     \
50         *(pbyData) = inb(dwIOAddress);                              \
51 }
52
53
54 #define VNSvInPortW(dwIOAddress, pwData) {                      \
55             *(pwData) = inw(dwIOAddress);                           \
56 }
57
58 #define VNSvInPortD(dwIOAddress, pdwData) {                     \
59             *(pdwData) = inl(dwIOAddress);                          \
60 }
61
62
63 #define VNSvOutPortB(dwIOAddress, byData) {                     \
64         outb(byData, dwIOAddress);                              \
65 }
66
67
68 #define VNSvOutPortW(dwIOAddress, wData) {                      \
69         outw(wData, dwIOAddress);                               \
70 }
71
72 #define VNSvOutPortD(dwIOAddress, dwData) {                     \
73         outl(dwData, dwIOAddress);                              \
74 }
75
76 #else
77
78 //
79 //  For memory mapped IO
80 //
81
82
83 #define VNSvInPortB(dwIOAddress, pbyData) {                     \
84         volatile BYTE* pbyAddr = ((PBYTE)(dwIOAddress));            \
85         *(pbyData) = readb(pbyAddr);                           \
86 }
87
88
89 #define VNSvInPortW(dwIOAddress, pwData) {                      \
90         volatile WORD* pwAddr = ((PWORD)(dwIOAddress));             \
91         *(pwData) = readw(pwAddr);                             \
92 }
93
94 #define VNSvInPortD(dwIOAddress, pdwData) {                     \
95         volatile DWORD* pdwAddr = ((PDWORD)(dwIOAddress));          \
96         *(pdwData) = readl(pdwAddr);                           \
97 }
98
99
100 #define VNSvOutPortB(dwIOAddress, byData) {                     \
101     volatile BYTE* pbyAddr = ((PBYTE)(dwIOAddress));            \
102     writeb((BYTE)byData, pbyAddr);                                                      \
103 }
104
105
106 #define VNSvOutPortW(dwIOAddress, wData) {                      \
107     volatile WORD* pwAddr = ((PWORD)(dwIOAddress));             \
108     writew((WORD)wData, pwAddr);                                                        \
109 }
110
111 #define VNSvOutPortD(dwIOAddress, dwData) {                     \
112     volatile DWORD* pdwAddr = ((PDWORD)(dwIOAddress));          \
113     writel((DWORD)dwData, pdwAddr);                                         \
114 }
115
116 #endif
117
118
119 //
120 // ALWAYS IO-Mapped IO when in 16-bit/32-bit environment
121 //
122 #define PCBvInPortB(dwIOAddress, pbyData) {     \
123             *(pbyData) = inb(dwIOAddress);          \
124 }
125
126 #define PCBvInPortW(dwIOAddress, pwData) {      \
127             *(pwData) = inw(dwIOAddress);           \
128 }
129
130 #define PCBvInPortD(dwIOAddress, pdwData) {     \
131             *(pdwData) = inl(dwIOAddress);          \
132 }
133
134 #define PCBvOutPortB(dwIOAddress, byData) {     \
135         outb(byData, dwIOAddress);              \
136 }
137
138 #define PCBvOutPortW(dwIOAddress, wData) {      \
139         outw(wData, dwIOAddress);               \
140 }
141
142 #define PCBvOutPortD(dwIOAddress, dwData) {     \
143         outl(dwData, dwIOAddress);              \
144 }
145
146
147 #define PCAvDelayByIO(uDelayUnit) {             \
148     BYTE    byData;                             \
149     ULONG   ii;                                 \
150                                                 \
151     if (uDelayUnit <= 50) {                     \
152         udelay(uDelayUnit);                     \
153     }                                           \
154     else {                                      \
155         for (ii = 0; ii < (uDelayUnit); ii++)   \
156                      byData = inb(0x61);                                \
157     }                                           \
158 }
159
160
161 /*---------------------  Export Classes  ----------------------------*/
162
163 /*---------------------  Export Variables  --------------------------*/
164
165 /*---------------------  Export Functions  --------------------------*/
166
167
168
169
170 #endif // __UPC_H__
171