1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION);
63 static int debug = 16;
68 module_param(debug, int, 0);
69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
71 struct smsc911x_data {
76 /* used to decide which workarounds apply */
77 unsigned int generation;
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config;
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
91 struct phy_device *phy_dev;
92 struct mii_bus *mii_bus;
93 int phy_irq[PHY_MAX_ADDR];
94 unsigned int using_extphy;
99 unsigned int gpio_setting;
100 unsigned int gpio_orig_setting;
101 struct net_device *dev;
102 struct napi_struct napi;
104 unsigned int software_irq_signal;
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt[MIN_PACKET_SIZE];
109 char loopback_rx_pkt[MIN_PACKET_SIZE];
110 unsigned int resetcount;
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending;
115 unsigned int set_bits_mask;
116 unsigned int clear_bits_mask;
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
126 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
128 if (pdata->config.flags & SMSC911X_USE_32BIT)
129 return readl(pdata->ioaddr + reg);
131 if (pdata->config.flags & SMSC911X_USE_16BIT) {
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata->dev_lock, flags);
139 data = ((readw(pdata->ioaddr + reg) & 0xFFFF) |
140 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata->dev_lock, flags);
150 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
153 if (pdata->config.flags & SMSC911X_USE_32BIT) {
154 writel(val, pdata->ioaddr + reg);
158 if (pdata->config.flags & SMSC911X_USE_16BIT) {
161 /* these two 16-bit writes must be performed consecutively, so
162 * must not be interrupted by our own ISR (which would start
163 * another read operation) */
164 spin_lock_irqsave(&pdata->dev_lock, flags);
165 writew(val & 0xFFFF, pdata->ioaddr + reg);
166 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
167 spin_unlock_irqrestore(&pdata->dev_lock, flags);
174 /* Writes a packet to the TX_DATA_FIFO */
176 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
177 unsigned int wordcount)
179 if (pdata->config.flags & SMSC911X_USE_32BIT) {
180 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
184 if (pdata->config.flags & SMSC911X_USE_16BIT) {
186 smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
193 /* Reads a packet out of the RX_DATA_FIFO */
195 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
196 unsigned int wordcount)
198 if (pdata->config.flags & SMSC911X_USE_32BIT) {
199 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
203 if (pdata->config.flags & SMSC911X_USE_16BIT) {
205 *buf++ = smsc911x_reg_read(pdata, RX_DATA_FIFO);
212 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
213 * and smsc911x_mac_write, so assumes mac_lock is held */
214 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
219 SMSC_ASSERT_MAC_LOCK(pdata);
221 for (i = 0; i < 40; i++) {
222 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
223 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
226 SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. "
227 "MAC_CSR_CMD: 0x%08X", val);
231 /* Fetches a MAC register value. Assumes mac_lock is acquired */
232 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
236 SMSC_ASSERT_MAC_LOCK(pdata);
238 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
239 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
240 SMSC_WARNING(HW, "MAC busy at entry");
244 /* Send the MAC cmd */
245 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
246 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
248 /* Workaround for hardware read-after-write restriction */
249 temp = smsc911x_reg_read(pdata, BYTE_TEST);
251 /* Wait for the read to complete */
252 if (likely(smsc911x_mac_complete(pdata) == 0))
253 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
255 SMSC_WARNING(HW, "MAC busy after read");
259 /* Set a mac register, mac_lock must be acquired before calling */
260 static void smsc911x_mac_write(struct smsc911x_data *pdata,
261 unsigned int offset, u32 val)
265 SMSC_ASSERT_MAC_LOCK(pdata);
267 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
268 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
270 "smsc911x_mac_write failed, MAC busy at entry");
274 /* Send data to write */
275 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
277 /* Write the actual data */
278 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
279 MAC_CSR_CMD_CSR_BUSY_));
281 /* Workaround for hardware read-after-write restriction */
282 temp = smsc911x_reg_read(pdata, BYTE_TEST);
284 /* Wait for the write to complete */
285 if (likely(smsc911x_mac_complete(pdata) == 0))
289 "smsc911x_mac_write failed, MAC busy after write");
292 /* Get a phy register */
293 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
295 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
300 spin_lock_irqsave(&pdata->mac_lock, flags);
302 /* Confirm MII not busy */
303 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
305 "MII is busy in smsc911x_mii_read???");
310 /* Set the address, index & direction (read from PHY) */
311 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
312 smsc911x_mac_write(pdata, MII_ACC, addr);
314 /* Wait for read to complete w/ timeout */
315 for (i = 0; i < 100; i++)
316 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
317 reg = smsc911x_mac_read(pdata, MII_DATA);
321 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
325 spin_unlock_irqrestore(&pdata->mac_lock, flags);
329 /* Set a phy register */
330 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
333 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
338 spin_lock_irqsave(&pdata->mac_lock, flags);
340 /* Confirm MII not busy */
341 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
343 "MII is busy in smsc911x_mii_write???");
348 /* Put the data to write in the MAC */
349 smsc911x_mac_write(pdata, MII_DATA, val);
351 /* Set the address, index & direction (write to PHY) */
352 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
354 smsc911x_mac_write(pdata, MII_ACC, addr);
356 /* Wait for write to complete w/ timeout */
357 for (i = 0; i < 100; i++)
358 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
363 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
367 spin_unlock_irqrestore(&pdata->mac_lock, flags);
371 /* Switch to external phy. Assumes tx and rx are stopped. */
372 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
374 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
376 /* Disable phy clocks to the MAC */
377 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
378 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
379 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
380 udelay(10); /* Enough time for clocks to stop */
382 /* Switch to external phy */
383 hwcfg |= HW_CFG_EXT_PHY_EN_;
384 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
386 /* Enable phy clocks to the MAC */
387 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
388 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
389 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
390 udelay(10); /* Enough time for clocks to restart */
392 hwcfg |= HW_CFG_SMI_SEL_;
393 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
396 /* Autodetects and enables external phy if present on supported chips.
397 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
398 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
399 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
401 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
403 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
404 SMSC_TRACE(HW, "Forcing internal PHY");
405 pdata->using_extphy = 0;
406 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
407 SMSC_TRACE(HW, "Forcing external PHY");
408 smsc911x_phy_enable_external(pdata);
409 pdata->using_extphy = 1;
410 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
411 SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET set, using external PHY");
412 smsc911x_phy_enable_external(pdata);
413 pdata->using_extphy = 1;
415 SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET clear, using internal PHY");
416 pdata->using_extphy = 0;
420 /* Fetches a tx status out of the status fifo */
421 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
423 unsigned int result =
424 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
427 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
432 /* Fetches the next rx status */
433 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
435 unsigned int result =
436 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
439 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
444 #ifdef USE_PHY_WORK_AROUND
445 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
452 for (tries = 0; tries < 10; tries++) {
453 unsigned int txcmd_a;
454 unsigned int txcmd_b;
456 unsigned int pktlength;
459 /* Zero-out rx packet memory */
460 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
462 /* Write tx packet to 118 */
463 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
464 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
465 txcmd_a |= MIN_PACKET_SIZE;
467 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
469 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
470 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
472 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
473 wrsz = MIN_PACKET_SIZE + 3;
474 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
477 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
479 /* Wait till transmit is done */
483 status = smsc911x_tx_get_txstatus(pdata);
484 } while ((i--) && (!status));
487 SMSC_WARNING(HW, "Failed to transmit "
488 "during loopback test");
491 if (status & TX_STS_ES_) {
492 SMSC_WARNING(HW, "Transmit encountered "
493 "errors during loopback test");
497 /* Wait till receive is done */
501 status = smsc911x_rx_get_rxstatus(pdata);
502 } while ((i--) && (!status));
506 "Failed to receive during loopback test");
509 if (status & RX_STS_ES_) {
510 SMSC_WARNING(HW, "Receive encountered "
511 "errors during loopback test");
515 pktlength = ((status & 0x3FFF0000UL) >> 16);
516 bufp = (ulong)pdata->loopback_rx_pkt;
517 rdsz = pktlength + 3;
518 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
521 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
523 if (pktlength != (MIN_PACKET_SIZE + 4)) {
524 SMSC_WARNING(HW, "Unexpected packet size "
525 "during loop back test, size=%d, will retry",
530 for (j = 0; j < MIN_PACKET_SIZE; j++) {
531 if (pdata->loopback_tx_pkt[j]
532 != pdata->loopback_rx_pkt[j]) {
538 SMSC_TRACE(HW, "Successfully verified "
542 SMSC_WARNING(HW, "Data mismatch "
543 "during loop back test, will retry");
551 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
553 struct phy_device *phy_dev = pdata->phy_dev;
555 unsigned int i = 100000;
558 BUG_ON(!phy_dev->bus);
560 SMSC_TRACE(HW, "Performing PHY BCR Reset");
561 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
564 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
566 } while ((i--) && (temp & BMCR_RESET));
568 if (temp & BMCR_RESET) {
569 SMSC_WARNING(HW, "PHY reset failed to complete.");
572 /* Extra delay required because the phy may not be completed with
573 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
574 * enough delay but using 1ms here to be safe */
580 static int smsc911x_phy_loopbacktest(struct net_device *dev)
582 struct smsc911x_data *pdata = netdev_priv(dev);
583 struct phy_device *phy_dev = pdata->phy_dev;
588 /* Initialise tx packet using broadcast destination address */
589 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
591 /* Use incrementing source address */
592 for (i = 6; i < 12; i++)
593 pdata->loopback_tx_pkt[i] = (char)i;
595 /* Set length type field */
596 pdata->loopback_tx_pkt[12] = 0x00;
597 pdata->loopback_tx_pkt[13] = 0x00;
599 for (i = 14; i < MIN_PACKET_SIZE; i++)
600 pdata->loopback_tx_pkt[i] = (char)i;
602 val = smsc911x_reg_read(pdata, HW_CFG);
603 val &= HW_CFG_TX_FIF_SZ_;
605 smsc911x_reg_write(pdata, HW_CFG, val);
607 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
608 smsc911x_reg_write(pdata, RX_CFG,
609 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
611 for (i = 0; i < 10; i++) {
612 /* Set PHY to 10/FD, no ANEG, and loopback mode */
613 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
614 BMCR_LOOPBACK | BMCR_FULLDPLX);
616 /* Enable MAC tx/rx, FD */
617 spin_lock_irqsave(&pdata->mac_lock, flags);
618 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
619 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
620 spin_unlock_irqrestore(&pdata->mac_lock, flags);
622 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
629 spin_lock_irqsave(&pdata->mac_lock, flags);
630 smsc911x_mac_write(pdata, MAC_CR, 0);
631 spin_unlock_irqrestore(&pdata->mac_lock, flags);
633 smsc911x_phy_reset(pdata);
637 spin_lock_irqsave(&pdata->mac_lock, flags);
638 smsc911x_mac_write(pdata, MAC_CR, 0);
639 spin_unlock_irqrestore(&pdata->mac_lock, flags);
641 /* Cancel PHY loopback mode */
642 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
644 smsc911x_reg_write(pdata, TX_CFG, 0);
645 smsc911x_reg_write(pdata, RX_CFG, 0);
649 #endif /* USE_PHY_WORK_AROUND */
651 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
653 struct phy_device *phy_dev = pdata->phy_dev;
654 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
658 if (phy_dev->duplex == DUPLEX_FULL) {
659 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
660 u16 rmtadv = phy_read(phy_dev, MII_LPA);
661 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
663 if (cap & FLOW_CTRL_RX)
668 if (cap & FLOW_CTRL_TX)
673 SMSC_TRACE(HW, "rx pause %s, tx pause %s",
674 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
675 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
677 SMSC_TRACE(HW, "half duplex");
682 spin_lock_irqsave(&pdata->mac_lock, flags);
683 smsc911x_mac_write(pdata, FLOW, flow);
684 spin_unlock_irqrestore(&pdata->mac_lock, flags);
686 smsc911x_reg_write(pdata, AFC_CFG, afc);
689 /* Update link mode if anything has changed. Called periodically when the
690 * PHY is in polling mode, even if nothing has changed. */
691 static void smsc911x_phy_adjust_link(struct net_device *dev)
693 struct smsc911x_data *pdata = netdev_priv(dev);
694 struct phy_device *phy_dev = pdata->phy_dev;
698 if (phy_dev->duplex != pdata->last_duplex) {
700 SMSC_TRACE(HW, "duplex state has changed");
702 spin_lock_irqsave(&pdata->mac_lock, flags);
703 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
704 if (phy_dev->duplex) {
706 "configuring for full duplex mode");
707 mac_cr |= MAC_CR_FDPX_;
710 "configuring for half duplex mode");
711 mac_cr &= ~MAC_CR_FDPX_;
713 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
714 spin_unlock_irqrestore(&pdata->mac_lock, flags);
716 smsc911x_phy_update_flowcontrol(pdata);
717 pdata->last_duplex = phy_dev->duplex;
720 carrier = netif_carrier_ok(dev);
721 if (carrier != pdata->last_carrier) {
722 SMSC_TRACE(HW, "carrier state has changed");
724 SMSC_TRACE(HW, "configuring for carrier OK");
725 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
726 (!pdata->using_extphy)) {
727 /* Restore orginal GPIO configuration */
728 pdata->gpio_setting = pdata->gpio_orig_setting;
729 smsc911x_reg_write(pdata, GPIO_CFG,
730 pdata->gpio_setting);
733 SMSC_TRACE(HW, "configuring for no carrier");
734 /* Check global setting that LED1
735 * usage is 10/100 indicator */
736 pdata->gpio_setting = smsc911x_reg_read(pdata,
738 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_)
739 && (!pdata->using_extphy)) {
740 /* Force 10/100 LED off, after saving
741 * orginal GPIO configuration */
742 pdata->gpio_orig_setting = pdata->gpio_setting;
744 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
745 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
748 smsc911x_reg_write(pdata, GPIO_CFG,
749 pdata->gpio_setting);
752 pdata->last_carrier = carrier;
756 static int smsc911x_mii_probe(struct net_device *dev)
758 struct smsc911x_data *pdata = netdev_priv(dev);
759 struct phy_device *phydev = NULL;
762 /* find the first phy */
763 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
764 if (pdata->mii_bus->phy_map[phy_addr]) {
765 phydev = pdata->mii_bus->phy_map[phy_addr];
766 SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X",
767 phy_addr, phydev->addr, phydev->phy_id);
773 pr_err("%s: no PHY found\n", dev->name);
777 phydev = phy_connect(dev, dev_name(&phydev->dev),
778 &smsc911x_phy_adjust_link, 0, pdata->config.phy_interface);
780 if (IS_ERR(phydev)) {
781 pr_err("%s: Could not attach to PHY\n", dev->name);
782 return PTR_ERR(phydev);
785 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
786 dev->name, phydev->drv->name,
787 dev_name(&phydev->dev), phydev->irq);
789 /* mask with MAC supported features */
790 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
791 SUPPORTED_Asym_Pause);
792 phydev->advertising = phydev->supported;
794 pdata->phy_dev = phydev;
795 pdata->last_duplex = -1;
796 pdata->last_carrier = -1;
798 #ifdef USE_PHY_WORK_AROUND
799 if (smsc911x_phy_loopbacktest(dev) < 0) {
800 SMSC_WARNING(HW, "Failed Loop Back Test");
803 SMSC_TRACE(HW, "Passed Loop Back Test");
804 #endif /* USE_PHY_WORK_AROUND */
806 SMSC_TRACE(HW, "phy initialised succesfully");
810 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
811 struct net_device *dev)
813 struct smsc911x_data *pdata = netdev_priv(dev);
816 pdata->mii_bus = mdiobus_alloc();
817 if (!pdata->mii_bus) {
822 pdata->mii_bus->name = SMSC_MDIONAME;
823 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
824 pdata->mii_bus->priv = pdata;
825 pdata->mii_bus->read = smsc911x_mii_read;
826 pdata->mii_bus->write = smsc911x_mii_write;
827 pdata->mii_bus->irq = pdata->phy_irq;
828 for (i = 0; i < PHY_MAX_ADDR; ++i)
829 pdata->mii_bus->irq[i] = PHY_POLL;
831 pdata->mii_bus->parent = &pdev->dev;
833 switch (pdata->idrev & 0xFFFF0000) {
838 /* External PHY supported, try to autodetect */
839 smsc911x_phy_initialise_external(pdata);
842 SMSC_TRACE(HW, "External PHY is not supported, "
843 "using internal PHY");
844 pdata->using_extphy = 0;
848 if (!pdata->using_extphy) {
849 /* Mask all PHYs except ID 1 (internal) */
850 pdata->mii_bus->phy_mask = ~(1 << 1);
853 if (mdiobus_register(pdata->mii_bus)) {
854 SMSC_WARNING(PROBE, "Error registering mii bus");
855 goto err_out_free_bus_2;
858 if (smsc911x_mii_probe(dev) < 0) {
859 SMSC_WARNING(PROBE, "Error registering mii bus");
860 goto err_out_unregister_bus_3;
865 err_out_unregister_bus_3:
866 mdiobus_unregister(pdata->mii_bus);
868 mdiobus_free(pdata->mii_bus);
873 /* Gets the number of tx statuses in the fifo */
874 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
876 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
877 & TX_FIFO_INF_TSUSED_) >> 16;
880 /* Reads tx statuses and increments counters where necessary */
881 static void smsc911x_tx_update_txcounters(struct net_device *dev)
883 struct smsc911x_data *pdata = netdev_priv(dev);
884 unsigned int tx_stat;
886 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
887 if (unlikely(tx_stat & 0x80000000)) {
888 /* In this driver the packet tag is used as the packet
889 * length. Since a packet length can never reach the
890 * size of 0x8000, this bit is reserved. It is worth
891 * noting that the "reserved bit" in the warning above
892 * does not reference a hardware defined reserved bit
893 * but rather a driver defined one.
896 "Packet tag reserved bit is high");
898 if (unlikely(tx_stat & TX_STS_ES_)) {
899 dev->stats.tx_errors++;
901 dev->stats.tx_packets++;
902 dev->stats.tx_bytes += (tx_stat >> 16);
904 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
905 dev->stats.collisions += 16;
906 dev->stats.tx_aborted_errors += 1;
908 dev->stats.collisions +=
909 ((tx_stat >> 3) & 0xF);
911 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
912 dev->stats.tx_carrier_errors += 1;
913 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
914 dev->stats.collisions++;
915 dev->stats.tx_aborted_errors++;
921 /* Increments the Rx error counters */
923 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
927 if (unlikely(rxstat & RX_STS_ES_)) {
928 dev->stats.rx_errors++;
929 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
930 dev->stats.rx_crc_errors++;
934 if (likely(!crc_err)) {
935 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
936 (rxstat & RX_STS_LENGTH_ERR_)))
937 dev->stats.rx_length_errors++;
938 if (rxstat & RX_STS_MCAST_)
939 dev->stats.multicast++;
943 /* Quickly dumps bad packets */
945 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
947 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
949 if (likely(pktwords >= 4)) {
950 unsigned int timeout = 500;
952 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
955 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
956 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
958 if (unlikely(timeout == 0))
959 SMSC_WARNING(HW, "Timed out waiting for "
960 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
964 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
968 /* NAPI poll function */
969 static int smsc911x_poll(struct napi_struct *napi, int budget)
971 struct smsc911x_data *pdata =
972 container_of(napi, struct smsc911x_data, napi);
973 struct net_device *dev = pdata->dev;
976 while (likely(netif_running(dev)) && (npackets < budget)) {
977 unsigned int pktlength;
978 unsigned int pktwords;
980 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
984 /* We processed all packets available. Tell NAPI it can
985 * stop polling then re-enable rx interrupts */
986 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
988 temp = smsc911x_reg_read(pdata, INT_EN);
989 temp |= INT_EN_RSFL_EN_;
990 smsc911x_reg_write(pdata, INT_EN, temp);
994 /* Count packet for NAPI scheduling, even if it has an error.
995 * Error packets still require cycles to discard */
998 pktlength = ((rxstat & 0x3FFF0000) >> 16);
999 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1000 smsc911x_rx_counterrors(dev, rxstat);
1002 if (unlikely(rxstat & RX_STS_ES_)) {
1003 SMSC_WARNING(RX_ERR,
1004 "Discarding packet with error bit set");
1005 /* Packet has an error, discard it and continue with
1007 smsc911x_rx_fastforward(pdata, pktwords);
1008 dev->stats.rx_dropped++;
1012 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1013 if (unlikely(!skb)) {
1014 SMSC_WARNING(RX_ERR,
1015 "Unable to allocate skb for rx packet");
1016 /* Drop the packet and stop this polling iteration */
1017 smsc911x_rx_fastforward(pdata, pktwords);
1018 dev->stats.rx_dropped++;
1022 skb->data = skb->head;
1023 skb_reset_tail_pointer(skb);
1025 /* Align IP on 16B boundary */
1026 skb_reserve(skb, NET_IP_ALIGN);
1027 skb_put(skb, pktlength - 4);
1028 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1030 skb->protocol = eth_type_trans(skb, dev);
1031 skb->ip_summed = CHECKSUM_NONE;
1032 netif_receive_skb(skb);
1034 /* Update counters */
1035 dev->stats.rx_packets++;
1036 dev->stats.rx_bytes += (pktlength - 4);
1037 dev->last_rx = jiffies;
1040 /* Return total received packets */
1044 /* Returns hash bit number for given MAC address
1046 * 01 00 5E 00 00 01 -> returns bit number 31 */
1047 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1049 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1052 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1054 /* Performs the multicast & mac_cr update. This is called when
1055 * safe on the current hardware, and with the mac_lock held */
1056 unsigned int mac_cr;
1058 SMSC_ASSERT_MAC_LOCK(pdata);
1060 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1061 mac_cr |= pdata->set_bits_mask;
1062 mac_cr &= ~(pdata->clear_bits_mask);
1063 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1064 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1065 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1066 SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1067 mac_cr, pdata->hashhi, pdata->hashlo);
1070 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1072 unsigned int mac_cr;
1074 /* This function is only called for older LAN911x devices
1075 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1076 * be modified during Rx - newer devices immediately update the
1079 * This is called from interrupt context */
1081 spin_lock(&pdata->mac_lock);
1083 /* Check Rx has stopped */
1084 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1085 SMSC_WARNING(DRV, "Rx not stopped");
1087 /* Perform the update - safe to do now Rx has stopped */
1088 smsc911x_rx_multicast_update(pdata);
1091 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1092 mac_cr |= MAC_CR_RXEN_;
1093 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1095 pdata->multicast_update_pending = 0;
1097 spin_unlock(&pdata->mac_lock);
1100 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1102 unsigned int timeout;
1105 /* Reset the LAN911x */
1106 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1110 temp = smsc911x_reg_read(pdata, HW_CFG);
1111 } while ((--timeout) && (temp & HW_CFG_SRST_));
1113 if (unlikely(temp & HW_CFG_SRST_)) {
1114 SMSC_WARNING(DRV, "Failed to complete reset");
1120 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1122 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1124 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1125 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1126 (dev_addr[1] << 8) | dev_addr[0];
1128 SMSC_ASSERT_MAC_LOCK(pdata);
1130 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1131 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1134 static int smsc911x_open(struct net_device *dev)
1136 struct smsc911x_data *pdata = netdev_priv(dev);
1137 unsigned int timeout;
1139 unsigned int intcfg;
1141 /* if the phy is not yet registered, retry later*/
1142 if (!pdata->phy_dev) {
1143 SMSC_WARNING(HW, "phy_dev is NULL");
1147 if (!is_valid_ether_addr(dev->dev_addr)) {
1148 SMSC_WARNING(HW, "dev_addr is not a valid MAC address");
1149 return -EADDRNOTAVAIL;
1152 /* Reset the LAN911x */
1153 if (smsc911x_soft_reset(pdata)) {
1154 SMSC_WARNING(HW, "soft reset failed");
1158 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1159 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1161 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1163 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1168 if (unlikely(timeout == 0))
1170 "Timed out waiting for EEPROM busy bit to clear");
1172 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1174 /* The soft reset above cleared the device's MAC address,
1175 * restore it from local copy (set in probe) */
1176 spin_lock_irq(&pdata->mac_lock);
1177 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1178 spin_unlock_irq(&pdata->mac_lock);
1180 /* Initialise irqs, but leave all sources disabled */
1181 smsc911x_reg_write(pdata, INT_EN, 0);
1182 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1184 /* Set interrupt deassertion to 100uS */
1185 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1187 if (pdata->config.irq_polarity) {
1188 SMSC_TRACE(IFUP, "irq polarity: active high");
1189 intcfg |= INT_CFG_IRQ_POL_;
1191 SMSC_TRACE(IFUP, "irq polarity: active low");
1194 if (pdata->config.irq_type) {
1195 SMSC_TRACE(IFUP, "irq type: push-pull");
1196 intcfg |= INT_CFG_IRQ_TYPE_;
1198 SMSC_TRACE(IFUP, "irq type: open drain");
1201 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1203 SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq);
1204 pdata->software_irq_signal = 0;
1207 temp = smsc911x_reg_read(pdata, INT_EN);
1208 temp |= INT_EN_SW_INT_EN_;
1209 smsc911x_reg_write(pdata, INT_EN, temp);
1213 if (pdata->software_irq_signal)
1218 if (!pdata->software_irq_signal) {
1219 dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n",
1223 SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq);
1225 dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1226 (unsigned long)pdata->ioaddr, dev->irq);
1228 /* Reset the last known duplex and carrier */
1229 pdata->last_duplex = -1;
1230 pdata->last_carrier = -1;
1232 /* Bring the PHY up */
1233 phy_start(pdata->phy_dev);
1235 temp = smsc911x_reg_read(pdata, HW_CFG);
1236 /* Preserve TX FIFO size and external PHY configuration */
1237 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1239 smsc911x_reg_write(pdata, HW_CFG, temp);
1241 temp = smsc911x_reg_read(pdata, FIFO_INT);
1242 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1243 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1244 smsc911x_reg_write(pdata, FIFO_INT, temp);
1246 /* set RX Data offset to 2 bytes for alignment */
1247 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1249 /* enable NAPI polling before enabling RX interrupts */
1250 napi_enable(&pdata->napi);
1252 temp = smsc911x_reg_read(pdata, INT_EN);
1253 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1254 smsc911x_reg_write(pdata, INT_EN, temp);
1256 spin_lock_irq(&pdata->mac_lock);
1257 temp = smsc911x_mac_read(pdata, MAC_CR);
1258 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1259 smsc911x_mac_write(pdata, MAC_CR, temp);
1260 spin_unlock_irq(&pdata->mac_lock);
1262 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1264 netif_start_queue(dev);
1268 /* Entry point for stopping the interface */
1269 static int smsc911x_stop(struct net_device *dev)
1271 struct smsc911x_data *pdata = netdev_priv(dev);
1274 /* Disable all device interrupts */
1275 temp = smsc911x_reg_read(pdata, INT_CFG);
1276 temp &= ~INT_CFG_IRQ_EN_;
1277 smsc911x_reg_write(pdata, INT_CFG, temp);
1279 /* Stop Tx and Rx polling */
1280 netif_stop_queue(dev);
1281 napi_disable(&pdata->napi);
1283 /* At this point all Rx and Tx activity is stopped */
1284 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1285 smsc911x_tx_update_txcounters(dev);
1287 /* Bring the PHY down */
1289 phy_stop(pdata->phy_dev);
1291 SMSC_TRACE(IFDOWN, "Interface stopped");
1295 /* Entry point for transmitting a packet */
1296 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1298 struct smsc911x_data *pdata = netdev_priv(dev);
1299 unsigned int freespace;
1300 unsigned int tx_cmd_a;
1301 unsigned int tx_cmd_b;
1306 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1308 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1309 SMSC_WARNING(TX_ERR,
1310 "Tx data fifo low, space available: %d", freespace);
1312 /* Word alignment adjustment */
1313 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1314 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1315 tx_cmd_a |= (unsigned int)skb->len;
1317 tx_cmd_b = ((unsigned int)skb->len) << 16;
1318 tx_cmd_b |= (unsigned int)skb->len;
1320 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1321 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1323 bufp = (ulong)skb->data & (~0x3);
1324 wrsz = (u32)skb->len + 3;
1325 wrsz += (u32)((ulong)skb->data & 0x3);
1328 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1329 freespace -= (skb->len + 32);
1331 dev->trans_start = jiffies;
1333 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1334 smsc911x_tx_update_txcounters(dev);
1336 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1337 netif_stop_queue(dev);
1338 temp = smsc911x_reg_read(pdata, FIFO_INT);
1341 smsc911x_reg_write(pdata, FIFO_INT, temp);
1344 return NETDEV_TX_OK;
1347 /* Entry point for getting status counters */
1348 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1350 struct smsc911x_data *pdata = netdev_priv(dev);
1351 smsc911x_tx_update_txcounters(dev);
1352 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1356 /* Entry point for setting addressing modes */
1357 static void smsc911x_set_multicast_list(struct net_device *dev)
1359 struct smsc911x_data *pdata = netdev_priv(dev);
1360 unsigned long flags;
1362 if (dev->flags & IFF_PROMISC) {
1363 /* Enabling promiscuous mode */
1364 pdata->set_bits_mask = MAC_CR_PRMS_;
1365 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1368 } else if (dev->flags & IFF_ALLMULTI) {
1369 /* Enabling all multicast mode */
1370 pdata->set_bits_mask = MAC_CR_MCPAS_;
1371 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1374 } else if (dev->mc_count > 0) {
1375 /* Enabling specific multicast addresses */
1376 unsigned int hash_high = 0;
1377 unsigned int hash_low = 0;
1378 unsigned int count = 0;
1379 struct dev_mc_list *mc_list = dev->mc_list;
1381 pdata->set_bits_mask = MAC_CR_HPFILT_;
1382 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1386 if ((mc_list->dmi_addrlen) == ETH_ALEN) {
1387 unsigned int bitnum =
1388 smsc911x_hash(mc_list->dmi_addr);
1389 unsigned int mask = 0x01 << (bitnum & 0x1F);
1395 SMSC_WARNING(DRV, "dmi_addrlen != 6");
1397 mc_list = mc_list->next;
1399 if (count != (unsigned int)dev->mc_count)
1400 SMSC_WARNING(DRV, "mc_count != dev->mc_count");
1402 pdata->hashhi = hash_high;
1403 pdata->hashlo = hash_low;
1405 /* Enabling local MAC address only */
1406 pdata->set_bits_mask = 0;
1407 pdata->clear_bits_mask =
1408 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1413 spin_lock_irqsave(&pdata->mac_lock, flags);
1415 if (pdata->generation <= 1) {
1416 /* Older hardware revision - cannot change these flags while
1418 if (!pdata->multicast_update_pending) {
1420 SMSC_TRACE(HW, "scheduling mcast update");
1421 pdata->multicast_update_pending = 1;
1423 /* Request the hardware to stop, then perform the
1424 * update when we get an RX_STOP interrupt */
1425 temp = smsc911x_mac_read(pdata, MAC_CR);
1426 temp &= ~(MAC_CR_RXEN_);
1427 smsc911x_mac_write(pdata, MAC_CR, temp);
1429 /* There is another update pending, this should now
1430 * use the newer values */
1433 /* Newer hardware revision - can write immediately */
1434 smsc911x_rx_multicast_update(pdata);
1437 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1440 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1442 struct net_device *dev = dev_id;
1443 struct smsc911x_data *pdata = netdev_priv(dev);
1444 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1445 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1446 int serviced = IRQ_NONE;
1449 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1450 temp = smsc911x_reg_read(pdata, INT_EN);
1451 temp &= (~INT_EN_SW_INT_EN_);
1452 smsc911x_reg_write(pdata, INT_EN, temp);
1453 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1454 pdata->software_irq_signal = 1;
1456 serviced = IRQ_HANDLED;
1459 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1460 /* Called when there is a multicast update scheduled and
1461 * it is now safe to complete the update */
1462 SMSC_TRACE(INTR, "RX Stop interrupt");
1463 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1464 if (pdata->multicast_update_pending)
1465 smsc911x_rx_multicast_update_workaround(pdata);
1466 serviced = IRQ_HANDLED;
1469 if (intsts & inten & INT_STS_TDFA_) {
1470 temp = smsc911x_reg_read(pdata, FIFO_INT);
1471 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1472 smsc911x_reg_write(pdata, FIFO_INT, temp);
1473 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1474 netif_wake_queue(dev);
1475 serviced = IRQ_HANDLED;
1478 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1479 SMSC_TRACE(INTR, "RX Error interrupt");
1480 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1481 serviced = IRQ_HANDLED;
1484 if (likely(intsts & inten & INT_STS_RSFL_)) {
1485 if (likely(napi_schedule_prep(&pdata->napi))) {
1486 /* Disable Rx interrupts */
1487 temp = smsc911x_reg_read(pdata, INT_EN);
1488 temp &= (~INT_EN_RSFL_EN_);
1489 smsc911x_reg_write(pdata, INT_EN, temp);
1490 /* Schedule a NAPI poll */
1491 __napi_schedule(&pdata->napi);
1493 SMSC_WARNING(RX_ERR,
1494 "napi_schedule_prep failed");
1496 serviced = IRQ_HANDLED;
1502 #ifdef CONFIG_NET_POLL_CONTROLLER
1503 static void smsc911x_poll_controller(struct net_device *dev)
1505 disable_irq(dev->irq);
1506 smsc911x_irqhandler(0, dev);
1507 enable_irq(dev->irq);
1509 #endif /* CONFIG_NET_POLL_CONTROLLER */
1511 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1513 struct smsc911x_data *pdata = netdev_priv(dev);
1514 struct sockaddr *addr = p;
1516 /* On older hardware revisions we cannot change the mac address
1517 * registers while receiving data. Newer devices can safely change
1518 * this at any time. */
1519 if (pdata->generation <= 1 && netif_running(dev))
1522 if (!is_valid_ether_addr(addr->sa_data))
1523 return -EADDRNOTAVAIL;
1525 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1527 spin_lock_irq(&pdata->mac_lock);
1528 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1529 spin_unlock_irq(&pdata->mac_lock);
1531 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
1536 /* Standard ioctls for mii-tool */
1537 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1539 struct smsc911x_data *pdata = netdev_priv(dev);
1541 if (!netif_running(dev) || !pdata->phy_dev)
1544 return phy_mii_ioctl(pdata->phy_dev, if_mii(ifr), cmd);
1548 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1550 struct smsc911x_data *pdata = netdev_priv(dev);
1554 return phy_ethtool_gset(pdata->phy_dev, cmd);
1558 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1560 struct smsc911x_data *pdata = netdev_priv(dev);
1562 return phy_ethtool_sset(pdata->phy_dev, cmd);
1565 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1566 struct ethtool_drvinfo *info)
1568 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1569 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1570 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1571 sizeof(info->bus_info));
1574 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1576 struct smsc911x_data *pdata = netdev_priv(dev);
1578 return phy_start_aneg(pdata->phy_dev);
1581 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1583 struct smsc911x_data *pdata = netdev_priv(dev);
1584 return pdata->msg_enable;
1587 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1589 struct smsc911x_data *pdata = netdev_priv(dev);
1590 pdata->msg_enable = level;
1593 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1595 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1600 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1603 struct smsc911x_data *pdata = netdev_priv(dev);
1604 struct phy_device *phy_dev = pdata->phy_dev;
1605 unsigned long flags;
1610 regs->version = pdata->idrev;
1611 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1612 data[j++] = smsc911x_reg_read(pdata, i);
1614 for (i = MAC_CR; i <= WUCSR; i++) {
1615 spin_lock_irqsave(&pdata->mac_lock, flags);
1616 data[j++] = smsc911x_mac_read(pdata, i);
1617 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1620 for (i = 0; i <= 31; i++)
1621 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1624 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1626 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1627 temp &= ~GPIO_CFG_EEPR_EN_;
1628 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1632 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1637 SMSC_TRACE(DRV, "op 0x%08x", op);
1638 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1639 SMSC_WARNING(DRV, "Busy at start");
1643 e2cmd = op | E2P_CMD_EPC_BUSY_;
1644 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1648 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1649 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1652 SMSC_TRACE(DRV, "TIMED OUT");
1656 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1657 SMSC_TRACE(DRV, "Error occured during eeprom operation");
1664 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1665 u8 address, u8 *data)
1667 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1670 SMSC_TRACE(DRV, "address 0x%x", address);
1671 ret = smsc911x_eeprom_send_cmd(pdata, op);
1674 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1679 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1680 u8 address, u8 data)
1682 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1686 SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data);
1687 ret = smsc911x_eeprom_send_cmd(pdata, op);
1690 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1691 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1693 /* Workaround for hardware read-after-write restriction */
1694 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1696 ret = smsc911x_eeprom_send_cmd(pdata, op);
1702 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1704 return SMSC911X_EEPROM_SIZE;
1707 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1708 struct ethtool_eeprom *eeprom, u8 *data)
1710 struct smsc911x_data *pdata = netdev_priv(dev);
1711 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1715 smsc911x_eeprom_enable_access(pdata);
1717 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1718 for (i = 0; i < len; i++) {
1719 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1726 memcpy(data, &eeprom_data[eeprom->offset], len);
1731 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1732 struct ethtool_eeprom *eeprom, u8 *data)
1735 struct smsc911x_data *pdata = netdev_priv(dev);
1737 smsc911x_eeprom_enable_access(pdata);
1738 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1739 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1740 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1742 /* Single byte write, according to man page */
1748 static const struct ethtool_ops smsc911x_ethtool_ops = {
1749 .get_settings = smsc911x_ethtool_getsettings,
1750 .set_settings = smsc911x_ethtool_setsettings,
1751 .get_link = ethtool_op_get_link,
1752 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1753 .nway_reset = smsc911x_ethtool_nwayreset,
1754 .get_msglevel = smsc911x_ethtool_getmsglevel,
1755 .set_msglevel = smsc911x_ethtool_setmsglevel,
1756 .get_regs_len = smsc911x_ethtool_getregslen,
1757 .get_regs = smsc911x_ethtool_getregs,
1758 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1759 .get_eeprom = smsc911x_ethtool_get_eeprom,
1760 .set_eeprom = smsc911x_ethtool_set_eeprom,
1763 static const struct net_device_ops smsc911x_netdev_ops = {
1764 .ndo_open = smsc911x_open,
1765 .ndo_stop = smsc911x_stop,
1766 .ndo_start_xmit = smsc911x_hard_start_xmit,
1767 .ndo_get_stats = smsc911x_get_stats,
1768 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1769 .ndo_do_ioctl = smsc911x_do_ioctl,
1770 .ndo_validate_addr = eth_validate_addr,
1771 .ndo_set_mac_address = smsc911x_set_mac_address,
1772 #ifdef CONFIG_NET_POLL_CONTROLLER
1773 .ndo_poll_controller = smsc911x_poll_controller,
1777 /* copies the current mac address from hardware to dev->dev_addr */
1778 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1780 struct smsc911x_data *pdata = netdev_priv(dev);
1781 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1782 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1784 dev->dev_addr[0] = (u8)(mac_low32);
1785 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1786 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1787 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1788 dev->dev_addr[4] = (u8)(mac_high16);
1789 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1792 /* Initializing private device structures, only called from probe */
1793 static int __devinit smsc911x_init(struct net_device *dev)
1795 struct smsc911x_data *pdata = netdev_priv(dev);
1796 unsigned int byte_test;
1798 SMSC_TRACE(PROBE, "Driver Parameters:");
1799 SMSC_TRACE(PROBE, "LAN base: 0x%08lX",
1800 (unsigned long)pdata->ioaddr);
1801 SMSC_TRACE(PROBE, "IRQ: %d", dev->irq);
1802 SMSC_TRACE(PROBE, "PHY will be autodetected.");
1804 spin_lock_init(&pdata->dev_lock);
1806 if (pdata->ioaddr == 0) {
1807 SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000");
1811 /* Check byte ordering */
1812 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1813 SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test);
1814 if (byte_test == 0x43218765) {
1815 SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, "
1816 "applying WORD_SWAP");
1817 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1819 /* 1 dummy read of BYTE_TEST is needed after a write to
1820 * WORD_SWAP before its contents are valid */
1821 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1823 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1826 if (byte_test != 0x87654321) {
1827 SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test);
1828 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1830 "top 16 bits equal to bottom 16 bits");
1831 SMSC_TRACE(PROBE, "This may mean the chip is set "
1832 "for 32 bit while the bus is reading 16 bit");
1837 /* Default generation to zero (all workarounds apply) */
1838 pdata->generation = 0;
1840 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1841 switch (pdata->idrev & 0xFFFF0000) {
1846 /* LAN911[5678] family */
1847 pdata->generation = pdata->idrev & 0x0000FFFF;
1854 /* LAN921[5678] family */
1855 pdata->generation = 3;
1862 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1863 pdata->generation = 4;
1867 SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X",
1872 SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d",
1873 pdata->idrev, pdata->generation);
1875 if (pdata->generation == 0)
1877 "This driver is not intended for this chip revision");
1879 /* workaround for platforms without an eeprom, where the mac address
1880 * is stored elsewhere and set by the bootloader. This saves the
1881 * mac address before resetting the device */
1882 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS)
1883 smsc911x_read_mac_address(dev);
1885 /* Reset the LAN911x */
1886 if (smsc911x_soft_reset(pdata))
1889 /* Disable all interrupt sources until we bring the device up */
1890 smsc911x_reg_write(pdata, INT_EN, 0);
1893 dev->flags |= IFF_MULTICAST;
1894 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1895 dev->netdev_ops = &smsc911x_netdev_ops;
1896 dev->ethtool_ops = &smsc911x_ethtool_ops;
1901 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1903 struct net_device *dev;
1904 struct smsc911x_data *pdata;
1905 struct resource *res;
1907 dev = platform_get_drvdata(pdev);
1909 pdata = netdev_priv(dev);
1911 BUG_ON(!pdata->ioaddr);
1912 BUG_ON(!pdata->phy_dev);
1914 SMSC_TRACE(IFDOWN, "Stopping driver.");
1916 phy_disconnect(pdata->phy_dev);
1917 pdata->phy_dev = NULL;
1918 mdiobus_unregister(pdata->mii_bus);
1919 mdiobus_free(pdata->mii_bus);
1921 platform_set_drvdata(pdev, NULL);
1922 unregister_netdev(dev);
1923 free_irq(dev->irq, dev);
1924 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1927 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1929 release_mem_region(res->start, res->end - res->start);
1931 iounmap(pdata->ioaddr);
1938 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1940 struct net_device *dev;
1941 struct smsc911x_data *pdata;
1942 struct smsc911x_platform_config *config = pdev->dev.platform_data;
1943 struct resource *res, *irq_res;
1944 unsigned int intcfg = 0;
1945 int res_size, irq_flags;
1948 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION);
1950 /* platform data specifies irq & dynamic bus configuration */
1951 if (!pdev->dev.platform_data) {
1952 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME);
1957 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1960 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1962 pr_warning("%s: Could not allocate resource.\n",
1967 res_size = res->end - res->start;
1969 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1971 pr_warning("%s: Could not allocate irq resource.\n",
1977 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
1982 dev = alloc_etherdev(sizeof(struct smsc911x_data));
1984 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME);
1986 goto out_release_io_1;
1989 SET_NETDEV_DEV(dev, &pdev->dev);
1991 pdata = netdev_priv(dev);
1993 dev->irq = irq_res->start;
1994 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
1995 pdata->ioaddr = ioremap_nocache(res->start, res_size);
1997 /* copy config parameters across to pdata */
1998 memcpy(&pdata->config, config, sizeof(pdata->config));
2001 pdata->msg_enable = ((1 << debug) - 1);
2003 if (pdata->ioaddr == NULL) {
2005 "Error smsc911x base address invalid");
2007 goto out_free_netdev_2;
2010 retval = smsc911x_init(dev);
2012 goto out_unmap_io_3;
2014 /* configure irq polarity and type before connecting isr */
2015 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2016 intcfg |= INT_CFG_IRQ_POL_;
2018 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2019 intcfg |= INT_CFG_IRQ_TYPE_;
2021 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2023 /* Ensure interrupts are globally disabled before connecting ISR */
2024 smsc911x_reg_write(pdata, INT_EN, 0);
2025 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2027 retval = request_irq(dev->irq, smsc911x_irqhandler,
2028 irq_flags | IRQF_SHARED, dev->name, dev);
2031 "Unable to claim requested irq: %d", dev->irq);
2032 goto out_unmap_io_3;
2035 platform_set_drvdata(pdev, dev);
2037 retval = register_netdev(dev);
2040 "Error %i registering device", retval);
2041 goto out_unset_drvdata_4;
2043 SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name);
2046 spin_lock_init(&pdata->mac_lock);
2048 retval = smsc911x_mii_init(pdev, dev);
2051 "Error %i initialising mii", retval);
2052 goto out_unregister_netdev_5;
2055 spin_lock_irq(&pdata->mac_lock);
2057 /* Check if mac address has been specified when bringing interface up */
2058 if (is_valid_ether_addr(dev->dev_addr)) {
2059 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2060 SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
2062 /* Try reading mac address from device. if EEPROM is present
2063 * it will already have been set */
2064 smsc911x_read_mac_address(dev);
2066 if (is_valid_ether_addr(dev->dev_addr)) {
2067 /* eeprom values are valid so use them */
2069 "Mac Address is read from LAN911x EEPROM");
2071 /* eeprom values are invalid, generate random MAC */
2072 random_ether_addr(dev->dev_addr);
2073 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2075 "MAC Address is set to random_ether_addr");
2079 spin_unlock_irq(&pdata->mac_lock);
2081 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
2085 out_unregister_netdev_5:
2086 unregister_netdev(dev);
2087 out_unset_drvdata_4:
2088 platform_set_drvdata(pdev, NULL);
2089 free_irq(dev->irq, dev);
2091 iounmap(pdata->ioaddr);
2095 release_mem_region(res->start, res->end - res->start);
2100 static struct platform_driver smsc911x_driver = {
2101 .probe = smsc911x_drv_probe,
2102 .remove = smsc911x_drv_remove,
2104 .name = SMSC_CHIPNAME,
2108 /* Entry point for loading the module */
2109 static int __init smsc911x_init_module(void)
2111 return platform_driver_register(&smsc911x_driver);
2114 /* entry point for unloading the module */
2115 static void __exit smsc911x_cleanup_module(void)
2117 platform_driver_unregister(&smsc911x_driver);
2120 module_init(smsc911x_init_module);
2121 module_exit(smsc911x_cleanup_module);