2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
11 #include <linux/threads.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
15 #include <asm/pgtable.h>
17 #include <asm/cache.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/setup.h>
23 * References to members of the new_cpu_data structure.
26 #define X86 new_cpu_data+CPUINFO_x86
27 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
28 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
29 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
30 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
31 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
32 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
33 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
36 * This is how much memory *in addition to the memory covered up to
37 * and including _end* we need mapped initially.
39 * - one bit for each possible page, but only in low memory, which means
40 * 2^32/4096/8 = 128K worst case (4G/4G split.)
41 * - enough space to map all low memory, which means
42 * (2^32/4096) / 1024 pages (worst case, non PAE)
43 * (2^32/4096) / 512 + 4 pages (worst case for PAE)
44 * - a few pages for allocator use before the kernel pagetable has
47 * Modulo rounding, each megabyte assigned here requires a kilobyte of
48 * memory, which is currently unreclaimed.
50 * This should be a multiple of a page.
52 LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
55 * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate
56 * pagetables from above the 16MB DMA limit, so we'll have to set
57 * up pagetables 16MB more (worst-case):
59 #ifdef CONFIG_DEBUG_PAGEALLOC
60 LOW_PAGES = LOW_PAGES + 0x1000000
64 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
66 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
68 BOOTBITMAP_SIZE = LOW_PAGES / 8
71 INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
74 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
75 * %esi points to the real-mode code as a 32-bit pointer.
76 * CS and DS must be 4 GB flat segments, but we don't depend on
77 * any particular GDT layout, because we load our own as soon as we
80 .section .text.head,"ax",@progbits
84 * Set segments to known values.
87 lgdt boot_gdt_descr - __PAGE_OFFSET
88 movl $(__BOOT_DS),%eax
95 * Clear BSS first so that there are no surprises...
96 * No need to cld as DF is already clear from cld above...
99 movl $__bss_start - __PAGE_OFFSET,%edi
100 movl $__bss_stop - __PAGE_OFFSET,%ecx
105 * Copy bootup parameters out of the way.
106 * Note: %esi still has the pointer to the real-mode data.
107 * With the kexec as boot loader, parameter segment might be loaded beyond
108 * kernel image and might not even be addressable by early boot page tables.
109 * (kexec on panic case). Hence copy out the parameters before initializing
112 movl $(boot_params - __PAGE_OFFSET),%edi
113 movl $(PARAM_SIZE/4),%ecx
117 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
119 jnz 2f # New command line protocol
120 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
122 movzwl OLD_CL_OFFSET,%esi
123 addl $(OLD_CL_BASE_ADDR),%esi
125 movl $(boot_command_line - __PAGE_OFFSET),%edi
126 movl $(COMMAND_LINE_SIZE/4),%ecx
132 * Initialize page tables. This creates a PDE and a set of page
133 * tables, which are located immediately beyond _end. The variable
134 * init_pg_tables_end is set up to point to the first "safe" location.
135 * Mappings are created both at virtual address 0 (identity mapping)
136 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
138 * Warning: don't use %esi or the stack in this code. However, %esp
139 * can be used as a GPR if you really need it...
141 page_pde_offset = (__PAGE_OFFSET >> 20);
143 movl $(pg0 - __PAGE_OFFSET), %edi
144 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
145 movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
147 leal 0x007(%edi),%ecx /* Create PDE entry */
148 movl %ecx,(%edx) /* Store identity PDE entry */
149 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
156 /* End condition: we must map up to and including INIT_MAP_BEYOND_END */
157 /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
158 leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
161 movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
163 xorl %ebx,%ebx /* This is the boot CPU (BSP) */
166 * Non-boot CPU entry point; entered from trampoline.S
167 * We can't lgdt here, because lgdt itself uses a data segment, but
168 * we know the trampoline has already loaded the boot_gdt for us.
170 * If cpu hotplug is not supported then this code can go in init section
171 * which will be freed later
174 #ifndef CONFIG_HOTPLUG_CPU
175 .section .init.text,"ax",@progbits
178 /* Do an early initialization of the fixmap area */
179 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
180 movl $(swapper_pg_pmd - __PAGE_OFFSET), %eax
181 addl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
182 movl %eax, 4092(%edx)
185 ENTRY(startup_32_smp)
187 movl $(__BOOT_DS),%eax
194 * New page tables may be in 4Mbyte page mode and may
195 * be using the global pages.
197 * NOTE! If we are on a 486 we may have no cr4 at all!
198 * So we do not try to touch it unless we really have
199 * some bits in it to set. This won't work if the BSP
200 * implements cr4 but this AP does not -- very unlikely
201 * but be warned! The same applies to the pse feature
202 * if not equally supported. --macro
204 * NOTE! We have to correct for the fact that we're
205 * not yet offset PAGE_OFFSET..
207 #define cr4_bits mmu_cr4_features-__PAGE_OFFSET
211 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
215 btl $5, %eax # check if PAE is enabled
218 /* Check if extended functions are implemented */
219 movl $0x80000000, %eax
221 cmpl $0x80000000, %eax
223 mov $0x80000001, %eax
225 /* Execute Disable bit supported? */
229 /* Setup EFER (Extended Feature Enable Register) */
230 movl $0xc0000080, %ecx
234 /* Make changes effective */
238 /* This is a secondary processor (AP) */
242 #endif /* CONFIG_SMP */
248 movl $swapper_pg_dir-__PAGE_OFFSET,%eax
249 movl %eax,%cr3 /* set the page table pointer.. */
252 movl %eax,%cr0 /* ..and set paging (PG) bit */
253 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
255 /* Set up the stack pointer */
259 * Initialize eflags. Some BIOS's leave bits like NT set. This would
260 * confuse the debugger if this code is traced.
261 * XXX - best to initialize before switching to protected mode.
268 jz 1f /* Initial CPU cleans BSS */
271 #endif /* CONFIG_SMP */
274 * start system 32-bit setup. We need to re-do some of the things done
275 * in 16-bit mode for the "real" operations.
281 movl $-1,X86_CPUID # -1 for no CPUID initially
283 /* check if it is 486 or 386. */
285 * XXX - this does a lot of unnecessary setup. Alignment checks don't
286 * apply at our cpl of 0 and the stack ought to be aligned already, and
287 * we don't need to preserve eflags.
290 movb $3,X86 # at least 386
292 popl %eax # get EFLAGS
293 movl %eax,%ecx # save original EFLAGS
294 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
295 pushl %eax # copy to EFLAGS
297 pushfl # get new EFLAGS
298 popl %eax # put it in eax
299 xorl %ecx,%eax # change in flags
300 pushl %ecx # restore original EFLAGS
302 testl $0x40000,%eax # check if AC bit changed
305 movb $4,X86 # at least 486
306 testl $0x200000,%eax # check if ID bit changed
309 /* get vendor info */
310 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
312 movl %eax,X86_CPUID # save CPUID level
313 movl %ebx,X86_VENDOR_ID # lo 4 chars
314 movl %edx,X86_VENDOR_ID+4 # next 4 chars
315 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
317 orl %eax,%eax # do we have processor info as well?
320 movl $1,%eax # Use the CPUID instruction to get CPU type
322 movb %al,%cl # save reg for future use
323 andb $0x0f,%ah # mask processor family
325 andb $0xf0,%al # mask model
328 andb $0x0f,%cl # mask mask revision
330 movl %edx,X86_CAPABILITY
332 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
335 is386: movl $2,%ecx # set MP
337 andl $0x80000011,%eax # Save PG,PE,ET
344 ljmp $(__KERNEL_CS),$1f
345 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
346 movl %eax,%ss # after changing gdt.
347 movl %eax,%fs # gets reset once there's real percpu
349 movl $(__USER_DS),%eax # DS/ES contains default USER segment
353 xorl %eax,%eax # Clear GS and LDT
357 cld # gcc2 wants the direction flag cleared at all times
358 pushl $0 # fake return address for unwinder
362 cmpb $0,%cl # the first CPU calls start_kernel
364 movl $(__KERNEL_PERCPU), %eax
365 movl %eax,%fs # set this cpu's percpu
366 jmp initialize_secondary # all other CPUs call initialize_secondary
368 #endif /* CONFIG_SMP */
372 * We depend on ET to be correct. This checks for 287/387.
375 movb $0,X86_HARD_MATH
381 movl %cr0,%eax /* no coprocessor: have to set bits */
382 xorl $4,%eax /* set EM */
386 1: movb $1,X86_HARD_MATH
387 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
393 * sets up a idt with 256 entries pointing to
394 * ignore_int, interrupt gates. It doesn't actually load
395 * idt - that can be done only after paging has been enabled
396 * and the kernel moved to PAGE_OFFSET. Interrupts
397 * are enabled elsewhere, when we can be relatively
398 * sure everything is ok.
400 * Warning: %esi is live across this function.
404 movl $(__KERNEL_CS << 16),%eax
405 movw %dx,%ax /* selector = 0x0010 = cs */
406 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
417 .macro set_early_handler handler,trapno
419 movl $(__KERNEL_CS << 16),%eax
421 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
423 movl %eax,8*\trapno(%edi)
424 movl %edx,8*\trapno+4(%edi)
427 set_early_handler handler=early_divide_err,trapno=0
428 set_early_handler handler=early_illegal_opcode,trapno=6
429 set_early_handler handler=early_protection_fault,trapno=13
430 set_early_handler handler=early_page_fault,trapno=14
436 pushl $0 /* fake errcode */
439 early_illegal_opcode:
441 pushl $0 /* fake errcode */
444 early_protection_fault:
456 movl $(__KERNEL_DS),%eax
459 cmpl $2,early_recursion_flag
461 incl early_recursion_flag
464 pushl %edx /* trapno */
466 #ifdef CONFIG_EARLY_PRINTK
476 /* This is the default interrupt "handler" :-) */
486 movl $(__KERNEL_DS),%eax
489 cmpl $2,early_recursion_flag
491 incl early_recursion_flag
497 #ifdef CONFIG_EARLY_PRINTK
513 * Real beginning of normal "text" segment
521 .section ".bss.page_aligned","wa"
523 ENTRY(swapper_pg_dir)
525 ENTRY(swapper_pg_pmd)
527 ENTRY(empty_zero_page)
531 * This starts the data section.
535 .long init_thread_union+THREAD_SIZE
540 early_recursion_flag:
544 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
548 /* fault info: */ "BUG: Int %d: CR2 %p\n" \
549 /* pusha regs: */ " EDI %p ESI %p EBP %p ESP %p\n" \
550 " EBX %p EDX %p ECX %p EAX %p\n" \
551 /* fault frame: */ " err %p EIP %p CS %p flg %p\n" \
553 "Stack: %p %p %p %p %p %p %p %p\n" \
554 " %p %p %p %p %p %p %p %p\n" \
555 " %p %p %p %p %p %p %p %p\n"
557 #include "../../x86/xen/xen-head.S"
560 * The IDT and GDT 'descriptors' are a strange 48-bit object
561 * only used by the lidt and lgdt instructions. They are not
562 * like usual segment descriptors - they consist of a 16-bit
563 * segment size, and 32-bit linear address value:
566 .globl boot_gdt_descr
570 # early boot GDT descriptor (must use 1:1 address mapping)
571 .word 0 # 32 bit align gdt_desc.address
574 .long boot_gdt - __PAGE_OFFSET
576 .word 0 # 32-bit align idt_desc.address
578 .word IDT_ENTRIES*8-1 # idt contains 256 entries
581 # boot GDT descriptor (later on used by CPU#0):
582 .word 0 # 32 bit align gdt_desc.address
583 ENTRY(early_gdt_descr)
584 .word GDT_ENTRIES*8-1
585 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
588 * The boot_gdt must mirror the equivalent in setup.S and is
589 * used only for booting.
591 .align L1_CACHE_BYTES
593 .fill GDT_ENTRY_BOOT_CS,8,0
594 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
595 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */