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   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com)
   5  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   6  *    and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com)
   7  *
   8  *    This program is free software; you can redistribute it and/or modify
   9  *    it under the terms of the GNU General Public License as published by
  10  *    the Free Software Foundation; either version 2 of the License, or
  11  *    (at your option) any later version.
  12  *
  13  *    This program is distributed in the hope that it will be useful,
  14  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *    GNU General Public License for more details.
  17  *
  18  *    You should have received a copy of the GNU General Public License
  19  *    along with this program; if not, write to the Free Software
  20  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22 */
  23
  24 /*
  25  *                      NOTES ABOUT THIS DRIVER
  26  *
  27  * This Linux driver supports:
  28  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
  29  *   AverTVHD MCE A180 (NXT2004)
  30  *   ATI HDTV Wonder (NXT2004)
  31  *
  32  * This driver needs external firmware. Please use the command
  33  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
  34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
  35  * download/extract the appropriate firmware, and then copy it to
  36  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  37  * (depending on configuration of firmware hotplug).
  38  */
  39 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
  40 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
  41 #define CRC_CCIT_MASK 0x1021
  42
  43 #include <linux/kernel.h>
  44 #include <linux/init.h>
  45 #include <linux/module.h>
  46 #include <linux/moduleparam.h>
  47 #include <linux/slab.h>
  48 #include <linux/string.h>
  49
  50 #include "dvb_frontend.h"
  51 #include "dvb-pll.h"
  52 #include "nxt200x.h"
  53
  54 struct nxt200x_state {
  55
  56         struct i2c_adapter* i2c;
  57         struct dvb_frontend_ops ops;
  58         const struct nxt200x_config* config;
  59         struct dvb_frontend frontend;
  60
  61         /* demodulator private data */
  62         nxt_chip_type demod_chip;
  63         u8 initialised:1;
  64 };
  65
  66 static int debug;
  67 #define dprintk(args...) \
  68         do { \
  69                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
  70         } while (0)
  71
  72 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  73 {
  74         int err;
  75         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  76
  77         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  78                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  79                         __FUNCTION__, addr, err);
  80                 return -EREMOTEIO;
  81         }
  82         return 0;
  83 }
  84
  85 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
  86 {
  87         int err;
  88         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  89
  90         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  91                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
  92                         __FUNCTION__, addr, err);
  93                 return -EREMOTEIO;
  94         }
  95         return 0;
  96 }
  97
  98 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
  99 {
 100         u8 buf2 [len+1];
 101         int err;
 102         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
 103
 104         buf2[0] = reg;
 105         memcpy(&buf2[1], buf, len);
 106
 107         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 108                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
 109                         __FUNCTION__, state->config->demod_address, err);
 110                 return -EREMOTEIO;
 111         }
 112         return 0;
 113 }
 114
 115 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
 116 {
 117         u8 reg2 [] = { reg };
 118
 119         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 120                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 121
 122         int err;
 123
 124         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 125                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
 126                         __FUNCTION__, state->config->demod_address, err);
 127                 return -EREMOTEIO;
 128         }
 129         return 0;
 130 }
 131
 132 static u16 nxt200x_crc(u16 crc, u8 c)
 133 {
 134         u8 i;
 135         u16 input = (u16) c & 0xFF;
 136
 137         input<<=8;
 138         for(i=0; i<8; i++) {
 139                 if((crc^input) & 0x8000)
 140                         crc=(crc<<1)^CRC_CCIT_MASK;
 141                 else
 142                         crc<<=1;
 143                 input<<=1;
 144         }
 145         return crc;
 146 }
 147
 148 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 149 {
 150         u8 attr, len2, buf;
 151         dprintk("%s\n", __FUNCTION__);
 152
 153         /* set mutli register register */
 154         nxt200x_writebytes(state, 0x35, &reg, 1);
 155
 156         /* send the actual data */
 157         nxt200x_writebytes(state, 0x36, data, len);
 158
 159         switch (state->demod_chip) {
 160                 case NXT2002:
 161                         len2 = len;
 162                         buf = 0x02;
 163                         break;
 164                 case NXT2004:
 165                         /* probably not right, but gives correct values */
 166                         attr = 0x02;
 167                         if (reg & 0x80) {
 168                                 attr = attr << 1;
 169                                 if (reg & 0x04)
 170                                         attr = attr >> 1;
 171                         }
 172                         /* set write bit */
 173                         len2 = ((attr << 4) | 0x10) | len;
 174                         buf = 0x80;
 175                         break;
 176                 default:
 177                         return -EINVAL;
 178                         break;
 179         }
 180
 181         /* set multi register length */
 182         nxt200x_writebytes(state, 0x34, &len2, 1);
 183
 184         /* toggle the multireg write bit */
 185         nxt200x_writebytes(state, 0x21, &buf, 1);
 186
 187         nxt200x_readbytes(state, 0x21, &buf, 1);
 188
 189         switch (state->demod_chip) {
 190                 case NXT2002:
 191                         if ((buf & 0x02) == 0)
 192                                 return 0;
 193                         break;
 194                 case NXT2004:
 195                         if (buf == 0)
 196                                 return 0;
 197                         break;
 198                 default:
 199                         return -EINVAL;
 200                         break;
 201         }
 202
 203         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
 204
 205         return 0;
 206 }
 207
 208 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 209 {
 210         int i;
 211         u8 buf, len2, attr;
 212         dprintk("%s\n", __FUNCTION__);
 213
 214         /* set mutli register register */
 215         nxt200x_writebytes(state, 0x35, &reg, 1);
 216
 217         switch (state->demod_chip) {
 218                 case NXT2002:
 219                         /* set multi register length */
 220                         len2 = len & 0x80;
 221                         nxt200x_writebytes(state, 0x34, &len2, 1);
 222
 223                         /* read the actual data */
 224                         nxt200x_readbytes(state, reg, data, len);
 225                         return 0;
 226                         break;
 227                 case NXT2004:
 228                         /* probably not right, but gives correct values */
 229                         attr = 0x02;
 230                         if (reg & 0x80) {
 231                                 attr = attr << 1;
 232                                 if (reg & 0x04)
 233                                         attr = attr >> 1;
 234                         }
 235
 236                         /* set multi register length */
 237                         len2 = (attr << 4) | len;
 238                         nxt200x_writebytes(state, 0x34, &len2, 1);
 239
 240                         /* toggle the multireg bit*/
 241                         buf = 0x80;
 242                         nxt200x_writebytes(state, 0x21, &buf, 1);
 243
 244                         /* read the actual data */
 245                         for(i = 0; i < len; i++) {
 246                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 247                         }
 248                         return 0;
 249                         break;
 250                 default:
 251                         return -EINVAL;
 252                         break;
 253         }
 254 }
 255
 256 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 257 {
 258         u8 buf, stopval, counter = 0;
 259         dprintk("%s\n", __FUNCTION__);
 260
 261         /* set correct stop value */
 262         switch (state->demod_chip) {
 263                 case NXT2002:
 264                         stopval = 0x40;
 265                         break;
 266                 case NXT2004:
 267                         stopval = 0x10;
 268                         break;
 269                 default:
 270                         stopval = 0;
 271                         break;
 272         }
 273
 274         buf = 0x80;
 275         nxt200x_writebytes(state, 0x22, &buf, 1);
 276
 277         while (counter < 20) {
 278                 nxt200x_readbytes(state, 0x31, &buf, 1);
 279                 if (buf & stopval)
 280                         return;
 281                 msleep(10);
 282                 counter++;
 283         }
 284
 285         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 286         return;
 287 }
 288
 289 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 290 {
 291         u8 buf;
 292         dprintk("%s\n", __FUNCTION__);
 293
 294         buf = 0x00;
 295         nxt200x_writebytes(state, 0x22, &buf, 1);
 296 }
 297
 298 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 299 {
 300         u8 buf[9];
 301         u8 counter = 0;
 302         dprintk("%s\n", __FUNCTION__);
 303
 304         buf[0] = 0x00;
 305         nxt200x_writebytes(state, 0x2b, buf, 1);
 306         buf[0] = 0x70;
 307         nxt200x_writebytes(state, 0x34, buf, 1);
 308         buf[0] = 0x04;
 309         nxt200x_writebytes(state, 0x35, buf, 1);
 310         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 311         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 312         nxt200x_writebytes(state, 0x36, buf, 9);
 313         buf[0] = 0x80;
 314         nxt200x_writebytes(state, 0x21, buf, 1);
 315
 316         while (counter < 20) {
 317                 nxt200x_readbytes(state, 0x21, buf, 1);
 318                 if (buf[0] == 0)
 319                         return;
 320                 msleep(10);
 321                 counter++;
 322         }
 323
 324         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
 325
 326         return;
 327 }
 328
 329 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 330 {
 331         u8 buf, count = 0;
 332
 333         dprintk("%s\n", __FUNCTION__);
 334
 335         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[0], data[1], data[2], data[3]);
 336
 337         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 338          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 339         switch (state->demod_chip) {
 340                 case NXT2004:
 341                         if (i2c_writebytes(state, state->config->pll_address, data, 4))
 342                                 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
 343                         /* wait until we have a lock */
 344                         while (count < 20) {
 345                                 i2c_readbytes(state, state->config->pll_address, &buf, 1);
 346                                 if (buf & 0x40)
 347                                         return 0;
 348                                 msleep(100);
 349                                 count++;
 350                         }
 351                         printk("nxt2004: timeout waiting for tuner lock\n");
 352                         break;
 353                 case NXT2002:
 354                         /* set the i2c transfer speed to the tuner */
 355                         buf = 0x03;
 356                         nxt200x_writebytes(state, 0x20, &buf, 1);
 357
 358                         /* setup to transfer 4 bytes via i2c */
 359                         buf = 0x04;
 360                         nxt200x_writebytes(state, 0x34, &buf, 1);
 361
 362                         /* write actual tuner bytes */
 363                         nxt200x_writebytes(state, 0x36, data, 4);
 364
 365                         /* set tuner i2c address */
 366                         buf = state->config->pll_address;
 367                         nxt200x_writebytes(state, 0x35, &buf, 1);
 368
 369                         /* write UC Opmode to begin transfer */
 370                         buf = 0x80;
 371                         nxt200x_writebytes(state, 0x21, &buf, 1);
 372
 373                         while (count < 20) {
 374                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 375                                 if ((buf & 0x80)== 0x00)
 376                                         return 0;
 377                                 msleep(100);
 378                                 count++;
 379                         }
 380                         printk("nxt2002: timeout error writing tuner\n");
 381                         break;
 382                 default:
 383                         return -EINVAL;
 384                         break;
 385         }
 386         return 0;
 387 }
 388
 389 static void nxt200x_agc_reset(struct nxt200x_state* state)
 390 {
 391         u8 buf;
 392         dprintk("%s\n", __FUNCTION__);
 393
 394         switch (state->demod_chip) {
 395                 case NXT2002:
 396                         buf = 0x08;
 397                         nxt200x_writebytes(state, 0x08, &buf, 1);
 398                         buf = 0x00;
 399                         nxt200x_writebytes(state, 0x08, &buf, 1);
 400                         break;
 401                 case NXT2004:
 402                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 403                         buf = 0x08;
 404                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 405                         buf = 0x00;
 406                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 407                         break;
 408                 default:
 409                         break;
 410         }
 411         return;
 412 }
 413
 414 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 415 {
 416
 417         struct nxt200x_state* state = fe->demodulator_priv;
 418         u8 buf[3], written = 0, chunkpos = 0;
 419         u16 rambase, position, crc = 0;
 420
 421         dprintk("%s\n", __FUNCTION__);
 422         dprintk("Firmware is %zu bytes\n", fw->size);
 423
 424         /* Get the RAM base for this nxt2002 */
 425         nxt200x_readbytes(state, 0x10, buf, 1);
 426
 427         if (buf[0] & 0x10)
 428                 rambase = 0x1000;
 429         else
 430                 rambase = 0x0000;
 431
 432         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 433
 434         /* Hold the micro in reset while loading firmware */
 435         buf[0] = 0x80;
 436         nxt200x_writebytes(state, 0x2B, buf, 1);
 437
 438         for (position = 0; position < fw->size; position++) {
 439                 if (written == 0) {
 440                         crc = 0;
 441                         chunkpos = 0x28;
 442                         buf[0] = ((rambase + position) >> 8);
 443                         buf[1] = (rambase + position) & 0xFF;
 444                         buf[2] = 0x81;
 445                         /* write starting address */
 446                         nxt200x_writebytes(state, 0x29, buf, 3);
 447                 }
 448                 written++;
 449                 chunkpos++;
 450
 451                 if ((written % 4) == 0)
 452                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 453
 454                 crc = nxt200x_crc(crc, fw->data[position]);
 455
 456                 if ((written == 255) || (position+1 == fw->size)) {
 457                         /* write remaining bytes of firmware */
 458                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 459                                 &fw->data[position-(written %4) + 1],
 460                                 written %4);
 461                         buf[0] = crc << 8;
 462                         buf[1] = crc & 0xFF;
 463
 464                         /* write crc */
 465                         nxt200x_writebytes(state, 0x2C, buf, 2);
 466
 467                         /* do a read to stop things */
 468                         nxt200x_readbytes(state, 0x2A, buf, 1);
 469
 470                         /* set transfer mode to complete */
 471                         buf[0] = 0x80;
 472                         nxt200x_writebytes(state, 0x2B, buf, 1);
 473
 474                         written = 0;
 475                 }
 476         }
 477
 478         return 0;
 479 };
 480
 481 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 482 {
 483
 484         struct nxt200x_state* state = fe->demodulator_priv;
 485         u8 buf[3];
 486         u16 rambase, position, crc=0;
 487
 488         dprintk("%s\n", __FUNCTION__);
 489         dprintk("Firmware is %zu bytes\n", fw->size);
 490
 491         /* set rambase */
 492         rambase = 0x1000;
 493
 494         /* hold the micro in reset while loading firmware */
 495         buf[0] = 0x80;
 496         nxt200x_writebytes(state, 0x2B, buf,1);
 497
 498         /* calculate firmware CRC */
 499         for (position = 0; position < fw->size; position++) {
 500                 crc = nxt200x_crc(crc, fw->data[position]);
 501         }
 502
 503         buf[0] = rambase >> 8;
 504         buf[1] = rambase & 0xFF;
 505         buf[2] = 0x81;
 506         /* write starting address */
 507         nxt200x_writebytes(state,0x29,buf,3);
 508
 509         for (position = 0; position < fw->size;) {
 510                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 511                         fw->size-position > 255 ? 255 : fw->size-position);
 512                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 513         }
 514         buf[0] = crc >> 8;
 515         buf[1] = crc & 0xFF;
 516
 517         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 518
 519         /* write crc */
 520         nxt200x_writebytes(state, 0x2C, buf,2);
 521
 522         /* do a read to stop things */
 523         nxt200x_readbytes(state, 0x2C, buf, 1);
 524
 525         /* set transfer mode to complete */
 526         buf[0] = 0x80;
 527         nxt200x_writebytes(state, 0x2B, buf,1);
 528
 529         return 0;
 530 };
 531
 532 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
 533                                              struct dvb_frontend_parameters *p)
 534 {
 535         struct nxt200x_state* state = fe->demodulator_priv;
 536         u8 buf[4];
 537
 538         /* stop the micro first */
 539         nxt200x_microcontroller_stop(state);
 540
 541         if (state->demod_chip == NXT2004) {
 542                 /* make sure demod is set to digital */
 543                 buf[0] = 0x04;
 544                 nxt200x_writebytes(state, 0x14, buf, 1);
 545                 buf[0] = 0x00;
 546                 nxt200x_writebytes(state, 0x17, buf, 1);
 547         }
 548
 549         /* get tuning information */
 550         dvb_pll_configure(state->config->pll_desc, buf, p->frequency, 0);
 551
 552         /* set additional params */
 553         switch (p->u.vsb.modulation) {
 554                 case QAM_64:
 555                 case QAM_256:
 556                         /* Set punctured clock for QAM */
 557                         /* This is just a guess since I am unable to test it */
 558                         if (state->config->set_ts_params)
 559                                 state->config->set_ts_params(fe, 1);
 560
 561                         /* set input */
 562                         if (state->config->set_pll_input)
 563                                 state->config->set_pll_input(buf, 1);
 564                         break;
 565                 case VSB_8:
 566                         /* Set non-punctured clock for VSB */
 567                         if (state->config->set_ts_params)
 568                                 state->config->set_ts_params(fe, 0);
 569
 570                         /* set input */
 571                         if (state->config->set_pll_input)
 572                                 state->config->set_pll_input(buf, 0);
 573                         break;
 574                 default:
 575                         return -EINVAL;
 576                         break;
 577         }
 578
 579         /* write frequency information */
 580         nxt200x_writetuner(state, buf);
 581
 582         /* reset the agc now that tuning has been completed */
 583         nxt200x_agc_reset(state);
 584
 585         /* set target power level */
 586         switch (p->u.vsb.modulation) {
 587                 case QAM_64:
 588                 case QAM_256:
 589                         buf[0] = 0x74;
 590                         break;
 591                 case VSB_8:
 592                         buf[0] = 0x70;
 593                         break;
 594                 default:
 595                         return -EINVAL;
 596                         break;
 597         }
 598         nxt200x_writebytes(state, 0x42, buf, 1);
 599
 600         /* configure sdm */
 601         switch (state->demod_chip) {
 602                 case NXT2002:
 603                         buf[0] = 0x87;
 604                         break;
 605                 case NXT2004:
 606                         buf[0] = 0x07;
 607                         break;
 608                 default:
 609                         return -EINVAL;
 610                         break;
 611         }
 612         nxt200x_writebytes(state, 0x57, buf, 1);
 613
 614         /* write sdm1 input */
 615         buf[0] = 0x10;
 616         buf[1] = 0x00;
 617         nxt200x_writebytes(state, 0x58, buf, 2);
 618
 619         /* write sdmx input */
 620         switch (p->u.vsb.modulation) {
 621                 case QAM_64:
 622                                 buf[0] = 0x68;
 623                                 break;
 624                 case QAM_256:
 625                                 buf[0] = 0x64;
 626                                 break;
 627                 case VSB_8:
 628                                 buf[0] = 0x60;
 629                                 break;
 630                 default:
 631                                 return -EINVAL;
 632                                 break;
 633         }
 634         buf[1] = 0x00;
 635         nxt200x_writebytes(state, 0x5C, buf, 2);
 636
 637         /* write adc power lpf fc */
 638         buf[0] = 0x05;
 639         nxt200x_writebytes(state, 0x43, buf, 1);
 640
 641         if (state->demod_chip == NXT2004) {
 642                 /* write ??? */
 643                 buf[0] = 0x00;
 644                 buf[1] = 0x00;
 645                 nxt200x_writebytes(state, 0x46, buf, 2);
 646         }
 647
 648         /* write accumulator2 input */
 649         buf[0] = 0x80;
 650         buf[1] = 0x00;
 651         nxt200x_writebytes(state, 0x4B, buf, 2);
 652
 653         /* write kg1 */
 654         buf[0] = 0x00;
 655         nxt200x_writebytes(state, 0x4D, buf, 1);
 656
 657         /* write sdm12 lpf fc */
 658         buf[0] = 0x44;
 659         nxt200x_writebytes(state, 0x55, buf, 1);
 660
 661         /* write agc control reg */
 662         buf[0] = 0x04;
 663         nxt200x_writebytes(state, 0x41, buf, 1);
 664
 665         if (state->demod_chip == NXT2004) {
 666                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 667                 buf[0] = 0x24;
 668                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 669
 670                 /* soft reset? */
 671                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 672                 buf[0] = 0x10;
 673                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 674                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 675                 buf[0] = 0x00;
 676                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 677
 678                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 679                 buf[0] = 0x04;
 680                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 681                 buf[0] = 0x00;
 682                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 683                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 684                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 685                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 686                 buf[0] = 0x11;
 687                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 688                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 689                 buf[0] = 0x44;
 690                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 691         }
 692
 693         /* write agc ucgp0 */
 694         switch (p->u.vsb.modulation) {
 695                 case QAM_64:
 696                                 buf[0] = 0x02;
 697                                 break;
 698                 case QAM_256:
 699                                 buf[0] = 0x03;
 700                                 break;
 701                 case VSB_8:
 702                                 buf[0] = 0x00;
 703                                 break;
 704                 default:
 705                                 return -EINVAL;
 706                                 break;
 707         }
 708         nxt200x_writebytes(state, 0x30, buf, 1);
 709
 710         /* write agc control reg */
 711         buf[0] = 0x00;
 712         nxt200x_writebytes(state, 0x41, buf, 1);
 713
 714         /* write accumulator2 input */
 715         buf[0] = 0x80;
 716         buf[1] = 0x00;
 717         nxt200x_writebytes(state, 0x49, buf,2);
 718         nxt200x_writebytes(state, 0x4B, buf,2);
 719
 720         /* write agc control reg */
 721         buf[0] = 0x04;
 722         nxt200x_writebytes(state, 0x41, buf, 1);
 723
 724         nxt200x_microcontroller_start(state);
 725
 726         if (state->demod_chip == NXT2004) {
 727                 nxt2004_microcontroller_init(state);
 728
 729                 /* ???? */
 730                 buf[0] = 0xF0;
 731                 buf[1] = 0x00;
 732                 nxt200x_writebytes(state, 0x5C, buf, 2);
 733         }
 734
 735         /* adjacent channel detection should be done here, but I don't
 736         have any stations with this need so I cannot test it */
 737
 738         return 0;
 739 }
 740
 741 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 742 {
 743         struct nxt200x_state* state = fe->demodulator_priv;
 744         u8 lock;
 745         nxt200x_readbytes(state, 0x31, &lock, 1);
 746
 747         *status = 0;
 748         if (lock & 0x20) {
 749                 *status |= FE_HAS_SIGNAL;
 750                 *status |= FE_HAS_CARRIER;
 751                 *status |= FE_HAS_VITERBI;
 752                 *status |= FE_HAS_SYNC;
 753                 *status |= FE_HAS_LOCK;
 754         }
 755         return 0;
 756 }
 757
 758 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 759 {
 760         struct nxt200x_state* state = fe->demodulator_priv;
 761         u8 b[3];
 762
 763         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 764
 765         *ber = ((b[0] << 8) + b[1]) * 8;
 766
 767         return 0;
 768 }
 769
 770 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 771 {
 772         struct nxt200x_state* state = fe->demodulator_priv;
 773         u8 b[2];
 774         u16 temp = 0;
 775
 776         /* setup to read cluster variance */
 777         b[0] = 0x00;
 778         nxt200x_writebytes(state, 0xA1, b, 1);
 779
 780         /* get multreg val */
 781         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 782
 783         temp = (b[0] << 8) | b[1];
 784         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 785
 786         return 0;
 787 }
 788
 789 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 790 {
 791
 792         struct nxt200x_state* state = fe->demodulator_priv;
 793         u8 b[2];
 794         u16 temp = 0, temp2;
 795         u32 snrdb = 0;
 796
 797         /* setup to read cluster variance */
 798         b[0] = 0x00;
 799         nxt200x_writebytes(state, 0xA1, b, 1);
 800
 801         /* get multreg val from 0xA6 */
 802         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 803
 804         temp = (b[0] << 8) | b[1];
 805         temp2 = 0x7FFF - temp;
 806
 807         /* snr will be in db */
 808         if (temp2 > 0x7F00)
 809                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 810         else if (temp2 > 0x7EC0)
 811                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 812         else if (temp2 > 0x7C00)
 813                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 814         else
 815                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 816
 817         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 818         *snr = snrdb * (0xFFFF/32000);
 819
 820         return 0;
 821 }
 822
 823 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 824 {
 825         struct nxt200x_state* state = fe->demodulator_priv;
 826         u8 b[3];
 827
 828         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 829         *ucblocks = b[2];
 830
 831         return 0;
 832 }
 833
 834 static int nxt200x_sleep(struct dvb_frontend* fe)
 835 {
 836         return 0;
 837 }
 838
 839 static int nxt2002_init(struct dvb_frontend* fe)
 840 {
 841         struct nxt200x_state* state = fe->demodulator_priv;
 842         const struct firmware *fw;
 843         int ret;
 844         u8 buf[2];
 845
 846         /* request the firmware, this will block until someone uploads it */
 847         printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
 848         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
 849         printk("nxt2002: Waiting for firmware upload(2)...\n");
 850         if (ret) {
 851                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
 852                 return ret;
 853         }
 854
 855         ret = nxt2002_load_firmware(fe, fw);
 856         if (ret) {
 857                 printk("nxt2002: Writing firmware to device failed\n");
 858                 release_firmware(fw);
 859                 return ret;
 860         }
 861         printk("nxt2002: Firmware upload complete\n");
 862
 863         /* Put the micro into reset */
 864         nxt200x_microcontroller_stop(state);
 865
 866         /* ensure transfer is complete */
 867         buf[0]=0x00;
 868         nxt200x_writebytes(state, 0x2B, buf, 1);
 869
 870         /* Put the micro into reset for real this time */
 871         nxt200x_microcontroller_stop(state);
 872
 873         /* soft reset everything (agc,frontend,eq,fec)*/
 874         buf[0] = 0x0F;
 875         nxt200x_writebytes(state, 0x08, buf, 1);
 876         buf[0] = 0x00;
 877         nxt200x_writebytes(state, 0x08, buf, 1);
 878
 879         /* write agc sdm configure */
 880         buf[0] = 0xF1;
 881         nxt200x_writebytes(state, 0x57, buf, 1);
 882
 883         /* write mod output format */
 884         buf[0] = 0x20;
 885         nxt200x_writebytes(state, 0x09, buf, 1);
 886
 887         /* write fec mpeg mode */
 888         buf[0] = 0x7E;
 889         buf[1] = 0x00;
 890         nxt200x_writebytes(state, 0xE9, buf, 2);
 891
 892         /* write mux selection */
 893         buf[0] = 0x00;
 894         nxt200x_writebytes(state, 0xCC, buf, 1);
 895
 896         return 0;
 897 }
 898
 899 static int nxt2004_init(struct dvb_frontend* fe)
 900 {
 901         struct nxt200x_state* state = fe->demodulator_priv;
 902         const struct firmware *fw;
 903         int ret;
 904         u8 buf[3];
 905
 906         /* ??? */
 907         buf[0]=0x00;
 908         nxt200x_writebytes(state, 0x1E, buf, 1);
 909
 910         /* request the firmware, this will block until someone uploads it */
 911         printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
 912         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
 913         printk("nxt2004: Waiting for firmware upload(2)...\n");
 914         if (ret) {
 915                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
 916                 return ret;
 917         }
 918
 919         ret = nxt2004_load_firmware(fe, fw);
 920         if (ret) {
 921                 printk("nxt2004: Writing firmware to device failed\n");
 922                 release_firmware(fw);
 923                 return ret;
 924         }
 925         printk("nxt2004: Firmware upload complete\n");
 926
 927         /* ensure transfer is complete */
 928         buf[0] = 0x01;
 929         nxt200x_writebytes(state, 0x19, buf, 1);
 930
 931         nxt2004_microcontroller_init(state);
 932         nxt200x_microcontroller_stop(state);
 933         nxt200x_microcontroller_stop(state);
 934         nxt2004_microcontroller_init(state);
 935         nxt200x_microcontroller_stop(state);
 936
 937         /* soft reset everything (agc,frontend,eq,fec)*/
 938         buf[0] = 0xFF;
 939         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 940         buf[0] = 0x00;
 941         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 942
 943         /* write agc sdm configure */
 944         buf[0] = 0xD7;
 945         nxt200x_writebytes(state, 0x57, buf, 1);
 946
 947         /* ???*/
 948         buf[0] = 0x07;
 949         buf[1] = 0xfe;
 950         nxt200x_writebytes(state, 0x35, buf, 2);
 951         buf[0] = 0x12;
 952         nxt200x_writebytes(state, 0x34, buf, 1);
 953         buf[0] = 0x80;
 954         nxt200x_writebytes(state, 0x21, buf, 1);
 955
 956         /* ???*/
 957         buf[0] = 0x21;
 958         nxt200x_writebytes(state, 0x0A, buf, 1);
 959
 960         /* ???*/
 961         buf[0] = 0x01;
 962         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 963
 964         /* write fec mpeg mode */
 965         buf[0] = 0x7E;
 966         buf[1] = 0x00;
 967         nxt200x_writebytes(state, 0xE9, buf, 2);
 968
 969         /* write mux selection */
 970         buf[0] = 0x00;
 971         nxt200x_writebytes(state, 0xCC, buf, 1);
 972
 973         /* ???*/
 974         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 975         buf[0] = 0x00;
 976         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 977
 978         /* soft reset? */
 979         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 980         buf[0] = 0x10;
 981         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 982         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 983         buf[0] = 0x00;
 984         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 985
 986         /* ???*/
 987         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 988         buf[0] = 0x01;
 989         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 990         buf[0] = 0x70;
 991         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 992         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
 993         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 994
 995         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 996         buf[0] = 0x11;
 997         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 998         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 999         buf[0] = 0x40;
1000         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1001
1002         nxt200x_readbytes(state, 0x10, buf, 1);
1003         buf[0] = 0x10;
1004         nxt200x_writebytes(state, 0x10, buf, 1);
1005         nxt200x_readbytes(state, 0x0A, buf, 1);
1006         buf[0] = 0x21;
1007         nxt200x_writebytes(state, 0x0A, buf, 1);
1008
1009         nxt2004_microcontroller_init(state);
1010
1011         buf[0] = 0x21;
1012         nxt200x_writebytes(state, 0x0A, buf, 1);
1013         buf[0] = 0x7E;
1014         nxt200x_writebytes(state, 0xE9, buf, 1);
1015         buf[0] = 0x00;
1016         nxt200x_writebytes(state, 0xEA, buf, 1);
1017
1018         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1019         buf[0] = 0x00;
1020         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1021         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1022         buf[0] = 0x00;
1023         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1024
1025         /* soft reset? */
1026         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1027         buf[0] = 0x10;
1028         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1029         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1030         buf[0] = 0x00;
1031         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1032
1033         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1034         buf[0] = 0x04;
1035         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1036         buf[0] = 0x00;
1037         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1038         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1039         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1040
1041         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1042         buf[0] = 0x11;
1043         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1044
1045         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1046         buf[0] = 0x44;
1047         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1048
1049         /* initialize tuner */
1050         nxt200x_readbytes(state, 0x10, buf, 1);
1051         buf[0] = 0x12;
1052         nxt200x_writebytes(state, 0x10, buf, 1);
1053         buf[0] = 0x04;
1054         nxt200x_writebytes(state, 0x13, buf, 1);
1055         buf[0] = 0x00;
1056         nxt200x_writebytes(state, 0x16, buf, 1);
1057         buf[0] = 0x04;
1058         nxt200x_writebytes(state, 0x14, buf, 1);
1059         buf[0] = 0x00;
1060         nxt200x_writebytes(state, 0x14, buf, 1);
1061         nxt200x_writebytes(state, 0x17, buf, 1);
1062         nxt200x_writebytes(state, 0x14, buf, 1);
1063         nxt200x_writebytes(state, 0x17, buf, 1);
1064
1065         return 0;
1066 }
1067
1068 static int nxt200x_init(struct dvb_frontend* fe)
1069 {
1070         struct nxt200x_state* state = fe->demodulator_priv;
1071         int ret = 0;
1072
1073         if (!state->initialised) {
1074                 switch (state->demod_chip) {
1075                         case NXT2002:
1076                                 ret = nxt2002_init(fe);
1077                                 break;
1078                         case NXT2004:
1079                                 ret = nxt2004_init(fe);
1080                                 break;
1081                         default:
1082                                 return -EINVAL;
1083                                 break;
1084                 }
1085                 state->initialised = 1;
1086         }
1087         return ret;
1088 }
1089
1090 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1091 {
1092         fesettings->min_delay_ms = 500;
1093         fesettings->step_size = 0;
1094         fesettings->max_drift = 0;
1095         return 0;
1096 }
1097
1098 static void nxt200x_release(struct dvb_frontend* fe)
1099 {
1100         struct nxt200x_state* state = fe->demodulator_priv;
1101         kfree(state);
1102 }
1103
1104 static struct dvb_frontend_ops nxt200x_ops;
1105
1106 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1107                                    struct i2c_adapter* i2c)
1108 {
1109         struct nxt200x_state* state = NULL;
1110         u8 buf [] = {0,0,0,0,0};
1111
1112         /* allocate memory for the internal state */
1113         state = (struct nxt200x_state*) kmalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1114         if (state == NULL)
1115                 goto error;
1116         memset(state,0,sizeof(*state));
1117
1118         /* setup the state */
1119         state->config = config;
1120         state->i2c = i2c;
1121         memcpy(&state->ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1122         state->initialised = 0;
1123
1124         /* read card id */
1125         nxt200x_readbytes(state, 0x00, buf, 5);
1126         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1127                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1128
1129         /* set demod chip */
1130         switch (buf[0]) {
1131                 case 0x04:
1132                         state->demod_chip = NXT2002;
1133                         printk("nxt200x: NXT2002 Detected\n");
1134                         break;
1135                 case 0x05:
1136                         state->demod_chip = NXT2004;
1137                         printk("nxt200x: NXT2004 Detected\n");
1138                         break;
1139                 default:
1140                         goto error;
1141         }
1142
1143         /* make sure demod chip is supported */
1144         switch (state->demod_chip) {
1145                 case NXT2002:
1146                         if (buf[0] != 0x04) goto error;         /* device id */
1147                         if (buf[1] != 0x02) goto error;         /* fab id */
1148                         if (buf[2] != 0x11) goto error;         /* month */
1149                         if (buf[3] != 0x20) goto error;         /* year msb */
1150                         if (buf[4] != 0x00) goto error;         /* year lsb */
1151                         break;
1152                 case NXT2004:
1153                         if (buf[0] != 0x05) goto error;         /* device id */
1154                         break;
1155                 default:
1156                         goto error;
1157         }
1158
1159         /* create dvb_frontend */
1160         state->frontend.ops = &state->ops;
1161         state->frontend.demodulator_priv = state;
1162         return &state->frontend;
1163
1164 error:
1165         kfree(state);
1166         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1167                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1168         return NULL;
1169 }
1170
1171 static struct dvb_frontend_ops nxt200x_ops = {
1172
1173         .info = {
1174                 .name = "Nextwave NXT200X VSB/QAM frontend",
1175                 .type = FE_ATSC,
1176                 .frequency_min =  54000000,
1177                 .frequency_max = 860000000,
1178                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1179                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1180                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1181                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1182         },
1183
1184         .release = nxt200x_release,
1185
1186         .init = nxt200x_init,
1187         .sleep = nxt200x_sleep,
1188
1189         .set_frontend = nxt200x_setup_frontend_parameters,
1190         .get_tune_settings = nxt200x_get_tune_settings,
1191
1192         .read_status = nxt200x_read_status,
1193         .read_ber = nxt200x_read_ber,
1194         .read_signal_strength = nxt200x_read_signal_strength,
1195         .read_snr = nxt200x_read_snr,
1196         .read_ucblocks = nxt200x_read_ucblocks,
1197 };
1198
1199 module_param(debug, int, 0644);
1200 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1201
1202 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1203 MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob");
1204 MODULE_LICENSE("GPL");
1205
1206 EXPORT_SYMBOL(nxt200x_attach);
1207