2 * Lite5200 board Device Tree Source
4 * Copyright 2006 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
15 compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx";
27 d-cache-line-size = <20>;
28 i-cache-line-size = <20>;
29 d-cache-size = <4000>; // L1, 16K
30 i-cache-size = <4000>; // L1, 16K
31 timebase-frequency = <0>; // from bootloader
32 bus-frequency = <0>; // from bootloader
33 clock-frequency = <0>; // from bootloader
39 device_type = "memory";
40 reg = <00000000 04000000>; // 64MB
44 #interrupt-cells = <3>;
46 ranges = <0 f0000000 f0010000>;
47 reg = <f0000000 00010000>;
48 bus-frequency = <0>; // from bootloader
51 compatible = "mpc5200-cdm\0mpc52xx-cdm";
56 // 5200 interrupts are encoded into two levels;
57 linux,phandle = <500>;
59 #interrupt-cells = <3>;
60 device_type = "interrupt-controller";
61 compatible = "mpc5200-pic\0mpc52xx-pic";
66 gpt@600 { // General Purpose Timer
67 compatible = "mpc5200-gpt\0mpc52xx-gpt";
71 interrupt-parent = <500>;
74 gpt@610 { // General Purpose Timer
75 compatible = "mpc5200-gpt\0mpc52xx-gpt";
79 interrupt-parent = <500>;
82 gpt@620 { // General Purpose Timer
83 compatible = "mpc5200-gpt\0mpc52xx-gpt";
87 interrupt-parent = <500>;
90 gpt@630 { // General Purpose Timer
91 compatible = "mpc5200-gpt\0mpc52xx-gpt";
95 interrupt-parent = <500>;
98 gpt@640 { // General Purpose Timer
99 compatible = "mpc5200-gpt\0mpc52xx-gpt";
102 interrupts = <1 d 0>;
103 interrupt-parent = <500>;
106 gpt@650 { // General Purpose Timer
107 compatible = "mpc5200-gpt\0mpc52xx-gpt";
110 interrupts = <1 e 0>;
111 interrupt-parent = <500>;
114 gpt@660 { // General Purpose Timer
115 compatible = "mpc5200-gpt\0mpc52xx-gpt";
118 interrupts = <1 f 0>;
119 interrupt-parent = <500>;
122 gpt@670 { // General Purpose Timer
123 compatible = "mpc5200-gpt\0mpc52xx-gpt";
126 interrupts = <1 10 0>;
127 interrupt-parent = <500>;
130 rtc@800 { // Real time clock
131 compatible = "mpc5200-rtc\0mpc52xx-rtc";
134 interrupts = <1 5 0 1 6 0>;
135 interrupt-parent = <500>;
139 device_type = "mscan";
140 compatible = "mpc5200-mscan\0mpc52xx-mscan";
141 interrupts = <2 11 0>;
142 interrupt-parent = <500>;
147 device_type = "mscan";
148 compatible = "mpc5200-mscan\0mpc52xx-mscan";
149 interrupts = <1 12 0>;
150 interrupt-parent = <500>;
155 compatible = "mpc5200-gpio\0mpc52xx-gpio";
157 interrupts = <1 7 0>;
158 interrupt-parent = <500>;
162 compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup";
164 interrupts = <1 8 0 0 3 0>;
165 interrupt-parent = <500>;
169 #interrupt-cells = <1>;
171 #address-cells = <3>;
173 compatible = "mpc5200-pci\0mpc52xx-pci";
175 interrupt-map-mask = <f800 0 0 7>;
176 interrupt-map = <c000 0 0 1 500 0 0 3
179 c000 0 0 4 500 0 0 3>;
180 clock-frequency = <0>; // From boot loader
181 interrupts = <2 8 0 2 9 0 2 a 0>;
182 interrupt-parent = <500>;
184 ranges = <42000000 0 80000000 80000000 0 20000000
185 02000000 0 a0000000 a0000000 0 10000000
186 01000000 0 00000000 b0000000 0 01000000>;
191 compatible = "mpc5200-spi\0mpc52xx-spi";
193 interrupts = <2 d 0 2 e 0>;
194 interrupt-parent = <500>;
198 device_type = "usb-ohci-be";
199 compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be";
201 interrupts = <2 6 0>;
202 interrupt-parent = <500>;
206 device_type = "dma-controller";
207 compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm";
209 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
210 3 4 0 3 5 0 3 6 0 3 7 0
211 3 8 0 3 9 0 3 a 0 3 b 0
212 3 c 0 3 d 0 3 e 0 3 f 0>;
213 interrupt-parent = <500>;
217 compatible = "mpc5200-xlb\0mpc52xx-xlb";
221 serial@2000 { // PSC1
222 device_type = "serial";
223 compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
224 port-number = <0>; // Logical port assignment
226 interrupts = <2 1 0>;
227 interrupt-parent = <500>;
230 // PSC2 in spi mode example
233 compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi";
235 interrupts = <2 2 0>;
236 interrupt-parent = <500>;
239 // PSC3 in CODEC mode example
242 compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s";
244 interrupts = <2 3 0>;
245 interrupt-parent = <500>;
249 //serial@2600 { // PSC4
250 // device_type = "serial";
251 // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
253 // interrupts = <2 b 0>;
254 // interrupt-parent = <500>;
258 //serial@2800 { // PSC5
259 // device_type = "serial";
260 // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
262 // interrupts = <2 c 0>;
263 // interrupt-parent = <500>;
266 // PSC6 in AC97 mode example
268 device_type = "ac97";
269 compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97";
271 interrupts = <2 4 0>;
272 interrupt-parent = <500>;
276 device_type = "network";
277 compatible = "mpc5200-fec\0mpc52xx-fec";
279 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
280 interrupts = <2 5 0>;
281 interrupt-parent = <500>;
286 compatible = "mpc5200-ata\0mpc52xx-ata";
288 interrupts = <2 7 0>;
289 interrupt-parent = <500>;
294 compatible = "mpc5200-i2c\0mpc52xx-i2c";
296 interrupts = <2 f 0>;
297 interrupt-parent = <500>;
302 compatible = "mpc5200-i2c\0mpc52xx-i2c";
304 interrupts = <2 10 0>;
305 interrupt-parent = <500>;
308 device_type = "sram";
309 compatible = "mpc5200-sram\0mpc52xx-sram\0sram";