6 * PDC return values ...
7 * All PDC calls return a subset of these errors.
10 #define PDC_WARN 3 /* Call completed with a warning */
11 #define PDC_REQ_ERR_1 2 /* See above */
12 #define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
13 #define PDC_OK 0 /* Call completed successfully */
14 #define PDC_BAD_PROC -1 /* Called non-existent procedure*/
15 #define PDC_BAD_OPTION -2 /* Called with non-existent option */
16 #define PDC_ERROR -3 /* Call could not complete without an error */
17 #define PDC_NE_MOD -5 /* Module not found */
18 #define PDC_NE_CELL_MOD -7 /* Cell module not found */
19 #define PDC_INVALID_ARG -10 /* Called with an invalid argument */
20 #define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
21 #define PDC_NOT_NARROW -17 /* Narrow mode not supported */
28 #define PDC_POW_FAIL 1 /* perform a power-fail */
29 #define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
31 #define PDC_CHASSIS 2 /* PDC-chassis functions */
32 #define PDC_CHASSIS_DISP 0 /* update chassis display */
33 #define PDC_CHASSIS_WARN 1 /* return chassis warnings */
34 #define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
35 #define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
37 #define PDC_PIM 3 /* Get PIM data */
38 #define PDC_PIM_HPMC 0 /* Transfer HPMC data */
39 #define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
40 #define PDC_PIM_LPMC 2 /* Transfer HPMC data */
41 #define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
42 #define PDC_PIM_TOC 4 /* Transfer TOC data */
44 #define PDC_MODEL 4 /* PDC model information call */
45 #define PDC_MODEL_INFO 0 /* returns information */
46 #define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
47 #define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
48 #define PDC_MODEL_SYSMODEL 3 /* return system model info */
49 #define PDC_MODEL_ENSPEC 4 /* enable specific option */
50 #define PDC_MODEL_DISPEC 5 /* disable specific option */
51 #define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
52 #define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
53 #define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
54 #define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
56 #define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
57 #define PA90_INSTRUCTION_SET 0x8
59 #define PDC_CACHE 5 /* return/set cache (& TLB) info*/
60 #define PDC_CACHE_INFO 0 /* returns information */
61 #define PDC_CACHE_SET_COH 1 /* set coherence state */
62 #define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
64 #define PDC_HPA 6 /* return HPA of processor */
65 #define PDC_HPA_PROCESSOR 0
66 #define PDC_HPA_MODULES 1
68 #define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
69 #define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
71 #define PDC_IODC 8 /* talk to IODC */
72 #define PDC_IODC_READ 0 /* read IODC entry point */
73 /* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
74 #define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
75 /* 1, 2 obsolete - HVERSION dependent*/
76 #define PDC_IODC_RI_INIT 3 /* Initialize module */
77 #define PDC_IODC_RI_IO 4 /* Module input/output */
78 #define PDC_IODC_RI_SPA 5 /* Module input/output */
79 #define PDC_IODC_RI_CONFIG 6 /* Module input/output */
80 /* 7 obsolete - HVERSION dependent */
81 #define PDC_IODC_RI_TEST 8 /* Module input/output */
82 #define PDC_IODC_RI_TLB 9 /* Module input/output */
83 #define PDC_IODC_NINIT 2 /* non-destructive init */
84 #define PDC_IODC_DINIT 3 /* destructive init */
85 #define PDC_IODC_MEMERR 4 /* check for memory errors */
86 #define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
87 #define PDC_IODC_BUS_ERROR -4 /* bus error return value */
88 #define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
89 #define PDC_IODC_COUNT -6 /* count is too small */
91 #define PDC_TOD 9 /* time-of-day clock (TOD) */
92 #define PDC_TOD_READ 0 /* read TOD */
93 #define PDC_TOD_WRITE 1 /* write TOD */
94 #define PDC_TOD_ITIMER 2 /* calibrate Interval Timer (CR16) */
96 #define PDC_STABLE 10 /* stable storage (sprockets) */
97 #define PDC_STABLE_READ 0
98 #define PDC_STABLE_WRITE 1
99 #define PDC_STABLE_RETURN_SIZE 2
100 #define PDC_STABLE_VERIFY_CONTENTS 3
101 #define PDC_STABLE_INITIALIZE 4
103 #define PDC_NVOLATILE 11 /* often not implemented */
105 #define PDC_ADD_VALID 12 /* Memory validation PDC call */
106 #define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
108 #define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
110 #define PDC_PROC 16 /* (sprockets) */
112 #define PDC_CONFIG 16 /* (sprockets) */
113 #define PDC_CONFIG_DECONFIG 0
114 #define PDC_CONFIG_DRECONFIG 1
115 #define PDC_CONFIG_DRETURN_CONFIG 2
117 #define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
118 #define PDC_BTLB_INFO 0 /* returns parameter */
119 #define PDC_BTLB_INSERT 1 /* insert BTLB entry */
120 #define PDC_BTLB_PURGE 2 /* purge BTLB entries */
121 #define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
123 #define PDC_TLB 19 /* manage hardware TLB miss handling */
124 #define PDC_TLB_INFO 0 /* returns parameter */
125 #define PDC_TLB_SETUP 1 /* set up miss handling */
127 #define PDC_MEM 20 /* Manage memory */
128 #define PDC_MEM_MEMINFO 0
129 #define PDC_MEM_ADD_PAGE 1
130 #define PDC_MEM_CLEAR_PDT 2
131 #define PDC_MEM_READ_PDT 3
132 #define PDC_MEM_RESET_CLEAR 4
133 #define PDC_MEM_GOODMEM 5
134 #define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
135 #define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
136 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
137 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
138 #define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
140 #define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
141 #define PDC_MEM_RET_DUPLICATE_ENTRY 4
142 #define PDC_MEM_RET_BUF_SIZE_SMALL 1
143 #define PDC_MEM_RET_PDT_FULL -11
144 #define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
147 # ifndef __ASSEMBLY__
149 unsigned long long baseAddr;
151 unsigned int reserved;
153 # endif /* __ASSEMBLY__ */
154 #endif /* __KERNEL__ */
156 #define PDC_PSW 21 /* Get/Set default System Mask */
157 #define PDC_PSW_MASK 0 /* Return mask */
158 #define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
159 #define PDC_PSW_SET_DEFAULTS 2 /* Set default */
160 #define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
161 #define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
163 #define PDC_SYSTEM_MAP 22 /* find system modules */
164 #define PDC_FIND_MODULE 0
165 #define PDC_FIND_ADDRESS 1
166 #define PDC_TRANSLATE_PATH 2
168 #define PDC_SOFT_POWER 23 /* soft power switch */
169 #define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
170 #define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
173 /* HVERSION dependent */
175 /* The PDC_MEM_MAP calls */
176 #define PDC_MEM_MAP 128 /* on s700: return page info */
177 #define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
179 #define PDC_EEPROM 129 /* EEPROM access */
180 #define PDC_EEPROM_READ_WORD 0
181 #define PDC_EEPROM_WRITE_WORD 1
182 #define PDC_EEPROM_READ_BYTE 2
183 #define PDC_EEPROM_WRITE_BYTE 3
184 #define PDC_EEPROM_EEPROM_PASSWORD -1000
186 #define PDC_NVM 130 /* NVM (non-volatile memory) access */
187 #define PDC_NVM_READ_WORD 0
188 #define PDC_NVM_WRITE_WORD 1
189 #define PDC_NVM_READ_BYTE 2
190 #define PDC_NVM_WRITE_BYTE 3
192 #define PDC_SEED_ERROR 132 /* (sprockets) */
194 #define PDC_IO 135 /* log error info, reset IO system */
195 #define PDC_IO_READ_AND_CLEAR_ERRORS 0
196 #define PDC_IO_RESET 1
197 #define PDC_IO_RESET_DEVICES 2
198 /* sets bits 6&7 (little endian) of the HcControl Register */
199 #define PDC_IO_USB_SUSPEND 0xC000000000000000
200 #define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
201 #define PDC_IO_NO_SUSPEND -6 /* return value */
203 #define PDC_BROADCAST_RESET 136 /* reset all processors */
204 #define PDC_DO_RESET 0 /* option: perform a broadcast reset */
205 #define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
206 #define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
207 #define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
209 #define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
210 #define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
212 #define PDC_LAN_STATION_ID_SIZE 6
214 #define PDC_CHECK_RANGES 139 /* (sprockets) */
216 #define PDC_NV_SECTIONS 141 /* (sprockets) */
218 #define PDC_PERFORMANCE 142 /* performance monitoring */
220 #define PDC_SYSTEM_INFO 143 /* system information */
221 #define PDC_SYSINFO_RETURN_INFO_SIZE 0
222 #define PDC_SYSINFO_RRETURN_SYS_INFO 1
223 #define PDC_SYSINFO_RRETURN_ERRORS 2
224 #define PDC_SYSINFO_RRETURN_WARNINGS 3
225 #define PDC_SYSINFO_RETURN_REVISIONS 4
226 #define PDC_SYSINFO_RRETURN_DIAGNOSE 5
227 #define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
229 #define PDC_RDR 144 /* (sprockets) */
230 #define PDC_RDR_READ_BUFFER 0
231 #define PDC_RDR_READ_SINGLE 1
232 #define PDC_RDR_WRITE_SINGLE 2
234 #define PDC_INTRIGUE 145 /* (sprockets) */
235 #define PDC_INTRIGUE_WRITE_BUFFER 0
236 #define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
237 #define PDC_INTRIGUE_START_CPU_COUNTERS 2
238 #define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
240 #define PDC_STI 146 /* STI access */
241 /* same as PDC_PCI_XXX values (see below) */
243 /* Legacy PDC definitions for same stuff */
244 #define PDC_PCI_INDEX 147
245 #define PDC_PCI_INTERFACE_INFO 0
246 #define PDC_PCI_SLOT_INFO 1
247 #define PDC_PCI_INFLIGHT_BYTES 2
248 #define PDC_PCI_READ_CONFIG 3
249 #define PDC_PCI_WRITE_CONFIG 4
250 #define PDC_PCI_READ_PCI_IO 5
251 #define PDC_PCI_WRITE_PCI_IO 6
252 #define PDC_PCI_READ_CONFIG_DELAY 7
253 #define PDC_PCI_UPDATE_CONFIG_DELAY 8
254 #define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
255 #define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
256 #define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
257 #define PDC_PCI_PCI_RESERVED 12
258 #define PDC_PCI_PCI_INT_ROUTE_SIZE 13
259 #define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
260 #define PDC_PCI_PCI_INT_ROUTE 14
261 #define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
262 #define PDC_PCI_READ_MON_TYPE 15
263 #define PDC_PCI_WRITE_MON_TYPE 16
266 /* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
267 #define PDC_INITIATOR 163
268 #define PDC_GET_INITIATOR 0
269 #define PDC_SET_INITIATOR 1
270 #define PDC_DELETE_INITIATOR 2
271 #define PDC_RETURN_TABLE_SIZE 3
272 #define PDC_RETURN_TABLE 4
274 #define PDC_LINK 165 /* (sprockets) */
275 #define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
276 #define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
279 /* constants for OS (NVM...) */
280 #define OS_ID_NONE 0 /* Undefined OS ID */
281 #define OS_ID_HPUX 1 /* HP-UX OS */
282 #define OS_ID_MPEXL 2 /* MPE XL OS */
283 #define OS_ID_OSF 3 /* OSF OS */
284 #define OS_ID_HPRT 4 /* HP-RT OS */
285 #define OS_ID_NOVEL 5 /* NOVELL OS */
286 #define OS_ID_LINUX 6 /* Linux */
289 /* constants for PDC_CHASSIS */
300 #include <linux/types.h>
301 #endif /* __ASSEMBLY__ */
304 # ifndef __ASSEMBLY__
308 /* Values for pdc_type */
309 #define PDC_TYPE_ILLEGAL -1
310 #define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
311 #define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
312 #define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
314 struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
315 unsigned long actcnt; /* actual number of bytes returned */
316 unsigned long maxcnt; /* maximum number of bytes that could be returned */
319 struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
320 unsigned long ccr_functional;
321 unsigned long ccr_present;
322 unsigned long revision;
326 struct pdc_model { /* for PDC_MODEL */
327 unsigned long hversion;
328 unsigned long sversion;
330 unsigned long boot_id;
332 unsigned long sw_cap;
333 unsigned long arch_rev;
334 unsigned long pot_key;
335 unsigned long curr_key;
338 /* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
340 #define PDC_MODEL_IOPDIR_FDC (1 << 2) /* see sba_iommu.c */
341 #define PDC_MODEL_NVA_MASK (3 << 4)
342 #define PDC_MODEL_NVA_SUPPORTED (0 << 4)
343 #define PDC_MODEL_NVA_SLOW (1 << 4)
344 #define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
346 struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
351 cc_alias: 4, /* alias boundaries for virtual addresses */
352 cc_block: 4, /* to determine most efficient stride */
353 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
354 cc_shift: 2, /* how much to shift cc_block left */
355 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
356 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
357 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
358 cc_pad1 : 10, /* reserved */
359 cc_hv : 3; /* hversion dependent */
362 struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
363 unsigned long tc_pad0:12, /* reserved */
367 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
369 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
370 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
371 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
372 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
375 struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
377 unsigned long ic_size; /* size in bytes */
378 struct pdc_cache_cf ic_conf; /* configuration */
379 unsigned long ic_base; /* base-addr */
380 unsigned long ic_stride;
381 unsigned long ic_count;
382 unsigned long ic_loop;
384 unsigned long dc_size; /* size in bytes */
385 struct pdc_cache_cf dc_conf; /* configuration */
386 unsigned long dc_base; /* base-addr */
387 unsigned long dc_stride;
388 unsigned long dc_count;
389 unsigned long dc_loop;
390 /* Instruction-TLB */
391 unsigned long it_size; /* number of entries in I-TLB */
392 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
393 unsigned long it_sp_base;
394 unsigned long it_sp_stride;
395 unsigned long it_sp_count;
396 unsigned long it_off_base;
397 unsigned long it_off_stride;
398 unsigned long it_off_count;
399 unsigned long it_loop;
401 unsigned long dt_size; /* number of entries in D-TLB */
402 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
403 unsigned long dt_sp_base;
404 unsigned long dt_sp_stride;
405 unsigned long dt_sp_count;
406 unsigned long dt_off_base;
407 unsigned long dt_off_stride;
408 unsigned long dt_off_count;
409 unsigned long dt_loop;
413 /* If you start using the next struct, you'll have to adjust it to
414 * work with 64-bit firmware I think -PB
416 struct pdc_iodc { /* PDC_IODC */
417 unsigned char hversion_model;
418 unsigned char hversion;
421 unsigned int sversion_rev:4;
422 unsigned int sversion_model:19;
423 unsigned int sversion_opt:8;
426 unsigned char features;
428 unsigned int checksum:16;
429 unsigned int length:16;
430 unsigned int pad[15];
431 } __attribute__((aligned(8))) ;
435 /* no BLTBs in pa2.0 processors */
436 struct pdc_btlb_info_range {
443 struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
444 unsigned int min_size; /* minimum size of BTLB in pages */
445 unsigned int max_size; /* maximum size of BTLB in pages */
446 struct pdc_btlb_info_range fixed_range_info;
447 struct pdc_btlb_info_range variable_range_info;
450 #endif /* !CONFIG_PA20 */
453 struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
454 unsigned long entries_returned;
455 unsigned long entries_total;
458 struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
461 unsigned int reserved;
463 #endif /* CONFIG_64BIT */
465 struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
466 unsigned long mod_addr;
467 unsigned long mod_pgs;
468 unsigned long add_addrs;
471 struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
472 unsigned long mod_addr;
473 unsigned long mod_pgs;
476 struct pdc_initiator { /* PDC_INITIATOR */
483 struct hardware_path {
484 char flags; /* see bit definitions below */
485 char bc[6]; /* Bus Converter routing info to a specific */
486 /* I/O adaptor (< 0 means none, > 63 resvd) */
487 char mod; /* fixed field of specified module */
491 * Device path specifications used by PDC.
493 struct pdc_module_path {
494 struct hardware_path path;
495 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
499 /* Only used on some pre-PA2.0 boxes */
500 struct pdc_memory_map { /* PDC_MEMORY_MAP */
501 unsigned long hpa; /* mod's register set address */
502 unsigned long more_pgs; /* number of additional I/O pgs */
507 unsigned long tod_sec;
508 unsigned long tod_usec;
511 /* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
513 struct pdc_hpmc_pim_11 { /* PDC_PIM */
528 __u32 responder_addr;
529 __u32 requestor_addr;
535 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
537 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
538 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
540 * Note also that there are unarchitected results available, which
541 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
542 * the firmware is probably the best way of printing hversion dependent
546 struct pdc_hpmc_pim_20 { /* PDC_PIM */
560 __u64 responder_addr;
561 __u64 requestor_addr;
565 # endif /* __ASSEMBLY__ */
566 #endif /* __KERNEL__ */
568 /* flags of the device_path (see below) */
569 #define PF_AUTOBOOT 0x80
570 #define PF_AUTOSEARCH 0x40
571 #define PF_TIMER 0x0F
575 struct device_path { /* page 1-69 */
576 unsigned char flags; /* flags see above! */
577 unsigned char bc[6]; /* bus converter routing info */
579 unsigned int layers[6];/* device-specific layer-info */
580 } __attribute__((aligned(8))) ;
583 struct device_path dp; /* see above */
584 /* struct iomod *hpa; */
585 unsigned int hpa; /* HPA base address */
587 unsigned int spa; /* SPA base address */
588 /* int (*iodc_io)(struct iomod*, ...); */
589 unsigned int iodc_io; /* device entry point */
590 short pad; /* reserved */
591 unsigned short cl_class;/* see below */
592 } __attribute__((aligned(8))) ;
594 #endif /* __ASSEMBLY__ */
597 * page 3-33 of IO-Firmware ARS
598 * IODC ENTRY_INIT(Search first) RET[1]
600 #define CL_NULL 0 /* invalid */
601 #define CL_RANDOM 1 /* random access (as disk) */
602 #define CL_SEQU 2 /* sequential access (as tape) */
603 #define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
604 #define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
605 #define CL_DISPL 9 /* half-duplex console (display) */
606 #define CL_FC 10 /* FiberChannel access media */
609 /* FIXME: DEVCLASS_* duplicates CL_* (above). Delete DEVCLASS_*? */
610 #define DEVCLASS_RANDOM 1
611 #define DEVCLASS_SEQU 2
612 #define DEVCLASS_DUPLEX 7
613 #define DEVCLASS_KEYBD 8
614 #define DEVCLASS_DISP 9
617 /* IODC ENTRY_INIT() */
618 #define ENTRY_INIT_SRCH_FRST 2
619 #define ENTRY_INIT_SRCH_NEXT 3
620 #define ENTRY_INIT_MOD_DEV 4
621 #define ENTRY_INIT_DEV 5
622 #define ENTRY_INIT_MOD 6
623 #define ENTRY_INIT_MSG 9
625 /* IODC ENTRY_IO() */
626 #define ENTRY_IO_BOOTIN 0
627 #define ENTRY_IO_BOOTOUT 1
628 #define ENTRY_IO_CIN 2
629 #define ENTRY_IO_COUT 3
630 #define ENTRY_IO_CLOSE 4
631 #define ENTRY_IO_GETMSG 9
632 #define ENTRY_IO_BBLOCK_IN 16
633 #define ENTRY_IO_BBLOCK_OUT 17
635 /* IODC ENTRY_SPA() */
637 /* IODC ENTRY_CONFIG() */
639 /* IODC ENTRY_TEST() */
641 /* IODC ENTRY_TLB() */
644 /* DEFINITION OF THE ZERO-PAGE (PAG0) */
645 /* based on work by Jason Eckhardt (jason@equator.com) */
649 #define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
652 /* [0x000] initialize vectors (VEC) */
653 unsigned int vec_special; /* must be zero */
654 /* int (*vec_pow_fail)(void);*/
655 unsigned int vec_pow_fail; /* power failure handler */
656 /* int (*vec_toc)(void); */
657 unsigned int vec_toc;
658 unsigned int vec_toclen;
659 /* int (*vec_rendz)(void); */
660 unsigned int vec_rendz;
661 int vec_pow_fail_flen;
664 /* [0x040] reserved processor dependent */
667 /* [0x200] reserved */
670 /* [0x350] memory configuration (MC) */
671 int memc_cont; /* contiguous mem size (bytes) */
672 int memc_phsize; /* physical memory size */
673 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
674 unsigned int mem_pdc_hi; /* used for 64-bit */
676 /* [0x360] various parameters for the boot-CPU */
677 /* unsigned int *mem_booterr[8]; */
678 unsigned int mem_booterr[8]; /* ptr to boot errors */
679 unsigned int mem_free; /* first location, where OS can be loaded */
680 /* struct iomod *mem_hpa; */
681 unsigned int mem_hpa; /* HPA of the boot-CPU */
682 /* int (*mem_pdc)(int, ...); */
683 unsigned int mem_pdc; /* PDC entry point */
684 unsigned int mem_10msec; /* number of clock ticks in 10msec */
686 /* [0x390] initial memory module (IMM) */
687 /* struct iomod *imm_hpa; */
688 unsigned int imm_hpa; /* HPA of the IMM */
689 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
690 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
691 unsigned int imm_max_mem; /* bytes of mem in IMM */
693 /* [0x3A0] boot console, display device and keyboard */
694 struct pz_device mem_cons; /* description of console device */
695 struct pz_device mem_boot; /* description of boot device */
696 struct pz_device mem_kbd; /* description of keyboard device */
698 /* [0x430] reserved */
701 /* [0x600] processor dependent */
703 __u32 proc_sti; /* pointer to STI ROM */
707 #endif /* __ASSEMBLY__ */
709 /* Page Zero constant offsets used by the HPMC handler */
711 #define BOOT_CONSOLE_HPA_OFFSET 0x3c0
712 #define BOOT_CONSOLE_SPA_OFFSET 0x3c4
713 #define BOOT_CONSOLE_PATH_OFFSET 0x3a8
717 void pdc_console_init(void); /* in pdc_console.c */
718 void pdc_console_restart(void);
720 void setup_pdc(void); /* in inventory.c */
722 /* wrapper-functions from pdc.c */
724 int pdc_add_valid(unsigned long address);
725 int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
726 int pdc_chassis_disp(unsigned long disp);
727 int pdc_chassis_warn(unsigned long *warn);
728 int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
729 int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
730 void *iodc_data, unsigned int iodc_data_size);
731 int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
732 struct pdc_module_path *mod_path, long mod_index);
733 int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
734 long mod_index, long addr_index);
735 int pdc_model_info(struct pdc_model *model);
736 int pdc_model_sysmodel(char *name);
737 int pdc_model_cpuid(unsigned long *cpu_id);
738 int pdc_model_versions(unsigned long *versions, int id);
739 int pdc_model_capabilities(unsigned long *capabilities);
740 int pdc_cache_info(struct pdc_cache_info *cache);
741 int pdc_spaceid_bits(unsigned long *space_bits);
743 int pdc_btlb_info(struct pdc_btlb_info *btlb);
744 int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
745 #endif /* !CONFIG_PA20 */
746 int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
748 int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
749 int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
750 int pdc_stable_get_size(unsigned long *size);
751 int pdc_stable_verify_contents(void);
752 int pdc_stable_initialize(void);
754 int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
755 int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
757 int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
758 int pdc_tod_read(struct pdc_tod *tod);
759 int pdc_tod_set(unsigned long sec, unsigned long usec);
762 int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
763 struct pdc_memory_table *tbl, unsigned long entries);
766 void set_firmware_width(void);
767 int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
768 int pdc_do_reset(void);
769 int pdc_soft_power_info(unsigned long *power_reg);
770 int pdc_soft_power_button(int sw_control);
771 void pdc_io_reset(void);
772 void pdc_io_reset_devices(void);
773 int pdc_iodc_getc(void);
774 void pdc_iodc_putc(unsigned char c);
775 void pdc_iodc_outc(unsigned char c);
776 void pdc_printf(const char *fmt, ...);
778 void pdc_emergency_unlock(void);
779 int pdc_sti_call(unsigned long func, unsigned long flags,
780 unsigned long inptr, unsigned long outputr,
781 unsigned long glob_cfg);
783 static inline char * os_id_to_string(u16 os_id) {
785 case OS_ID_NONE: return "No OS";
786 case OS_ID_HPUX: return "HP-UX";
787 case OS_ID_MPEXL: return "MPE-iX";
788 case OS_ID_OSF: return "OSF";
789 case OS_ID_HPRT: return "HP-RT";
790 case OS_ID_NOVEL: return "Novell Netware";
791 case OS_ID_LINUX: return "Linux";
792 default: return "Unknown";
795 # endif /* __ASSEMBLY__ */
796 #endif /* __KERNEL__ */
798 #endif /* _PARISC_PDC_H */