2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
63 /* debounce timing parameters in msecs { interval, duration, timeout } */
64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
68 static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71 static unsigned int ata_dev_set_AN(struct ata_device *dev, u8 enable);
72 static void ata_dev_xfermask(struct ata_device *dev);
73 static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
75 unsigned int ata_print_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
88 int atapi_passthru16 = 1;
89 module_param(atapi_passthru16, int, 0444);
90 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
93 module_param_named(fua, libata_fua, int, 0444);
94 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
96 static int ata_ignore_hpa = 0;
97 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
98 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
100 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
101 module_param(ata_probe_timeout, int, 0444);
102 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
104 int libata_noacpi = 1;
105 module_param_named(noacpi, libata_noacpi, int, 0444);
106 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
108 MODULE_AUTHOR("Jeff Garzik");
109 MODULE_DESCRIPTION("Library module for ATA devices");
110 MODULE_LICENSE("GPL");
111 MODULE_VERSION(DRV_VERSION);
115 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
116 * @tf: Taskfile to convert
117 * @pmp: Port multiplier port
118 * @is_cmd: This FIS is for command
119 * @fis: Buffer into which data will output
121 * Converts a standard ATA taskfile to a Serial ATA
122 * FIS structure (Register - Host to Device).
125 * Inherited from caller.
127 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
129 fis[0] = 0x27; /* Register - Host to Device FIS */
130 fis[1] = pmp & 0xf; /* Port multiplier number*/
132 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
134 fis[2] = tf->command;
135 fis[3] = tf->feature;
142 fis[8] = tf->hob_lbal;
143 fis[9] = tf->hob_lbam;
144 fis[10] = tf->hob_lbah;
145 fis[11] = tf->hob_feature;
148 fis[13] = tf->hob_nsect;
159 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
160 * @fis: Buffer from which data will be input
161 * @tf: Taskfile to output
163 * Converts a serial ATA FIS structure to a standard ATA taskfile.
166 * Inherited from caller.
169 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
171 tf->command = fis[2]; /* status */
172 tf->feature = fis[3]; /* error */
179 tf->hob_lbal = fis[8];
180 tf->hob_lbam = fis[9];
181 tf->hob_lbah = fis[10];
184 tf->hob_nsect = fis[13];
187 static const u8 ata_rw_cmds[] = {
191 ATA_CMD_READ_MULTI_EXT,
192 ATA_CMD_WRITE_MULTI_EXT,
196 ATA_CMD_WRITE_MULTI_FUA_EXT,
200 ATA_CMD_PIO_READ_EXT,
201 ATA_CMD_PIO_WRITE_EXT,
214 ATA_CMD_WRITE_FUA_EXT
218 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
219 * @tf: command to examine and configure
220 * @dev: device tf belongs to
222 * Examine the device configuration and tf->flags to calculate
223 * the proper read/write commands and protocol to use.
228 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
232 int index, fua, lba48, write;
234 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
235 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
236 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
238 if (dev->flags & ATA_DFLAG_PIO) {
239 tf->protocol = ATA_PROT_PIO;
240 index = dev->multi_count ? 0 : 8;
241 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
242 /* Unable to use DMA due to host limitation */
243 tf->protocol = ATA_PROT_PIO;
244 index = dev->multi_count ? 0 : 8;
246 tf->protocol = ATA_PROT_DMA;
250 cmd = ata_rw_cmds[index + fua + lba48 + write];
259 * ata_tf_read_block - Read block address from ATA taskfile
260 * @tf: ATA taskfile of interest
261 * @dev: ATA device @tf belongs to
266 * Read block address from @tf. This function can handle all
267 * three address formats - LBA, LBA48 and CHS. tf->protocol and
268 * flags select the address format to use.
271 * Block address read from @tf.
273 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
277 if (tf->flags & ATA_TFLAG_LBA) {
278 if (tf->flags & ATA_TFLAG_LBA48) {
279 block |= (u64)tf->hob_lbah << 40;
280 block |= (u64)tf->hob_lbam << 32;
281 block |= tf->hob_lbal << 24;
283 block |= (tf->device & 0xf) << 24;
285 block |= tf->lbah << 16;
286 block |= tf->lbam << 8;
291 cyl = tf->lbam | (tf->lbah << 8);
292 head = tf->device & 0xf;
295 block = (cyl * dev->heads + head) * dev->sectors + sect;
302 * ata_build_rw_tf - Build ATA taskfile for given read/write request
303 * @tf: Target ATA taskfile
304 * @dev: ATA device @tf belongs to
305 * @block: Block address
306 * @n_block: Number of blocks
307 * @tf_flags: RW/FUA etc...
313 * Build ATA taskfile @tf for read/write request described by
314 * @block, @n_block, @tf_flags and @tag on @dev.
318 * 0 on success, -ERANGE if the request is too large for @dev,
319 * -EINVAL if the request is invalid.
321 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
322 u64 block, u32 n_block, unsigned int tf_flags,
325 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
326 tf->flags |= tf_flags;
328 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
330 if (!lba_48_ok(block, n_block))
333 tf->protocol = ATA_PROT_NCQ;
334 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
336 if (tf->flags & ATA_TFLAG_WRITE)
337 tf->command = ATA_CMD_FPDMA_WRITE;
339 tf->command = ATA_CMD_FPDMA_READ;
341 tf->nsect = tag << 3;
342 tf->hob_feature = (n_block >> 8) & 0xff;
343 tf->feature = n_block & 0xff;
345 tf->hob_lbah = (block >> 40) & 0xff;
346 tf->hob_lbam = (block >> 32) & 0xff;
347 tf->hob_lbal = (block >> 24) & 0xff;
348 tf->lbah = (block >> 16) & 0xff;
349 tf->lbam = (block >> 8) & 0xff;
350 tf->lbal = block & 0xff;
353 if (tf->flags & ATA_TFLAG_FUA)
354 tf->device |= 1 << 7;
355 } else if (dev->flags & ATA_DFLAG_LBA) {
356 tf->flags |= ATA_TFLAG_LBA;
358 if (lba_28_ok(block, n_block)) {
360 tf->device |= (block >> 24) & 0xf;
361 } else if (lba_48_ok(block, n_block)) {
362 if (!(dev->flags & ATA_DFLAG_LBA48))
366 tf->flags |= ATA_TFLAG_LBA48;
368 tf->hob_nsect = (n_block >> 8) & 0xff;
370 tf->hob_lbah = (block >> 40) & 0xff;
371 tf->hob_lbam = (block >> 32) & 0xff;
372 tf->hob_lbal = (block >> 24) & 0xff;
374 /* request too large even for LBA48 */
377 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
380 tf->nsect = n_block & 0xff;
382 tf->lbah = (block >> 16) & 0xff;
383 tf->lbam = (block >> 8) & 0xff;
384 tf->lbal = block & 0xff;
386 tf->device |= ATA_LBA;
389 u32 sect, head, cyl, track;
391 /* The request -may- be too large for CHS addressing. */
392 if (!lba_28_ok(block, n_block))
395 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
398 /* Convert LBA to CHS */
399 track = (u32)block / dev->sectors;
400 cyl = track / dev->heads;
401 head = track % dev->heads;
402 sect = (u32)block % dev->sectors + 1;
404 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
405 (u32)block, track, cyl, head, sect);
407 /* Check whether the converted CHS can fit.
411 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
414 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
425 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
426 * @pio_mask: pio_mask
427 * @mwdma_mask: mwdma_mask
428 * @udma_mask: udma_mask
430 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
431 * unsigned int xfer_mask.
439 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
440 unsigned int mwdma_mask,
441 unsigned int udma_mask)
443 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
444 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
445 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
449 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
450 * @xfer_mask: xfer_mask to unpack
451 * @pio_mask: resulting pio_mask
452 * @mwdma_mask: resulting mwdma_mask
453 * @udma_mask: resulting udma_mask
455 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
456 * Any NULL distination masks will be ignored.
458 static void ata_unpack_xfermask(unsigned int xfer_mask,
459 unsigned int *pio_mask,
460 unsigned int *mwdma_mask,
461 unsigned int *udma_mask)
464 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
466 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
468 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
471 static const struct ata_xfer_ent {
475 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
476 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
477 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
482 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
483 * @xfer_mask: xfer_mask of interest
485 * Return matching XFER_* value for @xfer_mask. Only the highest
486 * bit of @xfer_mask is considered.
492 * Matching XFER_* value, 0 if no match found.
494 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
496 int highbit = fls(xfer_mask) - 1;
497 const struct ata_xfer_ent *ent;
499 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
500 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
501 return ent->base + highbit - ent->shift;
506 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
507 * @xfer_mode: XFER_* of interest
509 * Return matching xfer_mask for @xfer_mode.
515 * Matching xfer_mask, 0 if no match found.
517 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
519 const struct ata_xfer_ent *ent;
521 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
522 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
523 return 1 << (ent->shift + xfer_mode - ent->base);
528 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
529 * @xfer_mode: XFER_* of interest
531 * Return matching xfer_shift for @xfer_mode.
537 * Matching xfer_shift, -1 if no match found.
539 static int ata_xfer_mode2shift(unsigned int xfer_mode)
541 const struct ata_xfer_ent *ent;
543 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
544 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
550 * ata_mode_string - convert xfer_mask to string
551 * @xfer_mask: mask of bits supported; only highest bit counts.
553 * Determine string which represents the highest speed
554 * (highest bit in @modemask).
560 * Constant C string representing highest speed listed in
561 * @mode_mask, or the constant C string "<n/a>".
563 static const char *ata_mode_string(unsigned int xfer_mask)
565 static const char * const xfer_mode_str[] = {
589 highbit = fls(xfer_mask) - 1;
590 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
591 return xfer_mode_str[highbit];
595 static const char *sata_spd_string(unsigned int spd)
597 static const char * const spd_str[] = {
602 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
604 return spd_str[spd - 1];
607 void ata_dev_disable(struct ata_device *dev)
609 if (ata_dev_enabled(dev)) {
610 if (ata_msg_drv(dev->link->ap))
611 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
612 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
619 * ata_devchk - PATA device presence detection
620 * @ap: ATA channel to examine
621 * @device: Device to examine (starting at zero)
623 * This technique was originally described in
624 * Hale Landis's ATADRVR (www.ata-atapi.com), and
625 * later found its way into the ATA/ATAPI spec.
627 * Write a pattern to the ATA shadow registers,
628 * and if a device is present, it will respond by
629 * correctly storing and echoing back the
630 * ATA shadow register contents.
636 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
638 struct ata_ioports *ioaddr = &ap->ioaddr;
641 ap->ops->dev_select(ap, device);
643 iowrite8(0x55, ioaddr->nsect_addr);
644 iowrite8(0xaa, ioaddr->lbal_addr);
646 iowrite8(0xaa, ioaddr->nsect_addr);
647 iowrite8(0x55, ioaddr->lbal_addr);
649 iowrite8(0x55, ioaddr->nsect_addr);
650 iowrite8(0xaa, ioaddr->lbal_addr);
652 nsect = ioread8(ioaddr->nsect_addr);
653 lbal = ioread8(ioaddr->lbal_addr);
655 if ((nsect == 0x55) && (lbal == 0xaa))
656 return 1; /* we found a device */
658 return 0; /* nothing found */
662 * ata_dev_classify - determine device type based on ATA-spec signature
663 * @tf: ATA taskfile register set for device to be identified
665 * Determine from taskfile register contents whether a device is
666 * ATA or ATAPI, as per "Signature and persistence" section
667 * of ATA/PI spec (volume 1, sect 5.14).
673 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
674 * the event of failure.
677 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
679 /* Apple's open source Darwin code hints that some devices only
680 * put a proper signature into the LBA mid/high registers,
681 * So, we only check those. It's sufficient for uniqueness.
684 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
685 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
686 DPRINTK("found ATA device by sig\n");
690 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
691 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
692 DPRINTK("found ATAPI device by sig\n");
693 return ATA_DEV_ATAPI;
696 DPRINTK("unknown device\n");
697 return ATA_DEV_UNKNOWN;
701 * ata_dev_try_classify - Parse returned ATA device signature
702 * @dev: ATA device to classify (starting at zero)
703 * @present: device seems present
704 * @r_err: Value of error register on completion
706 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
707 * an ATA/ATAPI-defined set of values is placed in the ATA
708 * shadow registers, indicating the results of device detection
711 * Select the ATA device, and read the values from the ATA shadow
712 * registers. Then parse according to the Error register value,
713 * and the spec-defined values examined by ata_dev_classify().
719 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
721 unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
724 struct ata_port *ap = dev->link->ap;
725 struct ata_taskfile tf;
729 ap->ops->dev_select(ap, dev->devno);
731 memset(&tf, 0, sizeof(tf));
733 ap->ops->tf_read(ap, &tf);
738 /* see if device passed diags: if master then continue and warn later */
739 if (err == 0 && dev->devno == 0)
740 /* diagnostic fail : do nothing _YET_ */
741 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
744 else if ((dev->devno == 0) && (err == 0x81))
749 /* determine if device is ATA or ATAPI */
750 class = ata_dev_classify(&tf);
752 if (class == ATA_DEV_UNKNOWN) {
753 /* If the device failed diagnostic, it's likely to
754 * have reported incorrect device signature too.
755 * Assume ATA device if the device seems present but
756 * device signature is invalid with diagnostic
759 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
762 class = ATA_DEV_NONE;
763 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
764 class = ATA_DEV_NONE;
770 * ata_id_string - Convert IDENTIFY DEVICE page into string
771 * @id: IDENTIFY DEVICE results we will examine
772 * @s: string into which data is output
773 * @ofs: offset into identify device page
774 * @len: length of string to return. must be an even number.
776 * The strings in the IDENTIFY DEVICE page are broken up into
777 * 16-bit chunks. Run through the string, and output each
778 * 8-bit chunk linearly, regardless of platform.
784 void ata_id_string(const u16 *id, unsigned char *s,
785 unsigned int ofs, unsigned int len)
804 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
805 * @id: IDENTIFY DEVICE results we will examine
806 * @s: string into which data is output
807 * @ofs: offset into identify device page
808 * @len: length of string to return. must be an odd number.
810 * This function is identical to ata_id_string except that it
811 * trims trailing spaces and terminates the resulting string with
812 * null. @len must be actual maximum length (even number) + 1.
817 void ata_id_c_string(const u16 *id, unsigned char *s,
818 unsigned int ofs, unsigned int len)
824 ata_id_string(id, s, ofs, len - 1);
826 p = s + strnlen(s, len - 1);
827 while (p > s && p[-1] == ' ')
832 static u64 ata_id_n_sectors(const u16 *id)
834 if (ata_id_has_lba(id)) {
835 if (ata_id_has_lba48(id))
836 return ata_id_u64(id, 100);
838 return ata_id_u32(id, 60);
840 if (ata_id_current_chs_valid(id))
841 return ata_id_u32(id, 57);
843 return id[1] * id[3] * id[6];
847 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
851 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
852 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
853 sectors |= (tf->hob_lbal & 0xff) << 24;
854 sectors |= (tf->lbah & 0xff) << 16;
855 sectors |= (tf->lbam & 0xff) << 8;
856 sectors |= (tf->lbal & 0xff);
861 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
865 sectors |= (tf->device & 0x0f) << 24;
866 sectors |= (tf->lbah & 0xff) << 16;
867 sectors |= (tf->lbam & 0xff) << 8;
868 sectors |= (tf->lbal & 0xff);
874 * ata_read_native_max_address - Read native max address
875 * @dev: target device
876 * @max_sectors: out parameter for the result native max address
878 * Perform an LBA48 or LBA28 native size query upon the device in
882 * 0 on success, -EACCES if command is aborted by the drive.
883 * -EIO on other errors.
885 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
887 unsigned int err_mask;
888 struct ata_taskfile tf;
889 int lba48 = ata_id_has_lba48(dev->id);
891 ata_tf_init(dev, &tf);
893 /* always clear all address registers */
894 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
897 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
898 tf.flags |= ATA_TFLAG_LBA48;
900 tf.command = ATA_CMD_READ_NATIVE_MAX;
902 tf.protocol |= ATA_PROT_NODATA;
903 tf.device |= ATA_LBA;
905 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
907 ata_dev_printk(dev, KERN_WARNING, "failed to read native "
908 "max address (err_mask=0x%x)\n", err_mask);
909 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
915 *max_sectors = ata_tf_to_lba48(&tf);
917 *max_sectors = ata_tf_to_lba(&tf);
923 * ata_set_max_sectors - Set max sectors
924 * @dev: target device
925 * @new_sectors: new max sectors value to set for the device
927 * Set max sectors of @dev to @new_sectors.
930 * 0 on success, -EACCES if command is aborted or denied (due to
931 * previous non-volatile SET_MAX) by the drive. -EIO on other
934 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
936 unsigned int err_mask;
937 struct ata_taskfile tf;
938 int lba48 = ata_id_has_lba48(dev->id);
942 ata_tf_init(dev, &tf);
944 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
947 tf.command = ATA_CMD_SET_MAX_EXT;
948 tf.flags |= ATA_TFLAG_LBA48;
950 tf.hob_lbal = (new_sectors >> 24) & 0xff;
951 tf.hob_lbam = (new_sectors >> 32) & 0xff;
952 tf.hob_lbah = (new_sectors >> 40) & 0xff;
954 tf.command = ATA_CMD_SET_MAX;
956 tf.protocol |= ATA_PROT_NODATA;
957 tf.device |= ATA_LBA;
959 tf.lbal = (new_sectors >> 0) & 0xff;
960 tf.lbam = (new_sectors >> 8) & 0xff;
961 tf.lbah = (new_sectors >> 16) & 0xff;
963 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
965 ata_dev_printk(dev, KERN_WARNING, "failed to set "
966 "max address (err_mask=0x%x)\n", err_mask);
967 if (err_mask == AC_ERR_DEV &&
968 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
977 * ata_hpa_resize - Resize a device with an HPA set
978 * @dev: Device to resize
980 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
981 * it if required to the full size of the media. The caller must check
982 * the drive has the HPA feature set enabled.
985 * 0 on success, -errno on failure.
987 static int ata_hpa_resize(struct ata_device *dev)
989 struct ata_eh_context *ehc = &dev->link->eh_context;
990 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
991 u64 sectors = ata_id_n_sectors(dev->id);
995 /* do we need to do it? */
996 if (dev->class != ATA_DEV_ATA ||
997 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
998 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
1001 /* read native max address */
1002 rc = ata_read_native_max_address(dev, &native_sectors);
1004 /* If HPA isn't going to be unlocked, skip HPA
1005 * resizing from the next try.
1007 if (!ata_ignore_hpa) {
1008 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1009 "broken, will skip HPA handling\n");
1010 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1012 /* we can continue if device aborted the command */
1020 /* nothing to do? */
1021 if (native_sectors <= sectors || !ata_ignore_hpa) {
1022 if (!print_info || native_sectors == sectors)
1025 if (native_sectors > sectors)
1026 ata_dev_printk(dev, KERN_INFO,
1027 "HPA detected: current %llu, native %llu\n",
1028 (unsigned long long)sectors,
1029 (unsigned long long)native_sectors);
1030 else if (native_sectors < sectors)
1031 ata_dev_printk(dev, KERN_WARNING,
1032 "native sectors (%llu) is smaller than "
1034 (unsigned long long)native_sectors,
1035 (unsigned long long)sectors);
1039 /* let's unlock HPA */
1040 rc = ata_set_max_sectors(dev, native_sectors);
1041 if (rc == -EACCES) {
1042 /* if device aborted the command, skip HPA resizing */
1043 ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
1044 "(%llu -> %llu), skipping HPA handling\n",
1045 (unsigned long long)sectors,
1046 (unsigned long long)native_sectors);
1047 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1052 /* re-read IDENTIFY data */
1053 rc = ata_dev_reread_id(dev, 0);
1055 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
1056 "data after HPA resizing\n");
1061 u64 new_sectors = ata_id_n_sectors(dev->id);
1062 ata_dev_printk(dev, KERN_INFO,
1063 "HPA unlocked: %llu -> %llu, native %llu\n",
1064 (unsigned long long)sectors,
1065 (unsigned long long)new_sectors,
1066 (unsigned long long)native_sectors);
1073 * ata_id_to_dma_mode - Identify DMA mode from id block
1074 * @dev: device to identify
1075 * @unknown: mode to assume if we cannot tell
1077 * Set up the timing values for the device based upon the identify
1078 * reported values for the DMA mode. This function is used by drivers
1079 * which rely upon firmware configured modes, but wish to report the
1080 * mode correctly when possible.
1082 * In addition we emit similarly formatted messages to the default
1083 * ata_dev_set_mode handler, in order to provide consistency of
1087 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
1092 /* Pack the DMA modes */
1093 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
1094 if (dev->id[53] & 0x04)
1095 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
1097 /* Select the mode in use */
1098 mode = ata_xfer_mask2mode(mask);
1101 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1102 ata_mode_string(mask));
1104 /* SWDMA perhaps ? */
1106 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
1109 /* Configure the device reporting */
1110 dev->xfer_mode = mode;
1111 dev->xfer_shift = ata_xfer_mode2shift(mode);
1115 * ata_noop_dev_select - Select device 0/1 on ATA bus
1116 * @ap: ATA channel to manipulate
1117 * @device: ATA device (numbered from zero) to select
1119 * This function performs no actual function.
1121 * May be used as the dev_select() entry in ata_port_operations.
1126 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
1132 * ata_std_dev_select - Select device 0/1 on ATA bus
1133 * @ap: ATA channel to manipulate
1134 * @device: ATA device (numbered from zero) to select
1136 * Use the method defined in the ATA specification to
1137 * make either device 0, or device 1, active on the
1138 * ATA channel. Works with both PIO and MMIO.
1140 * May be used as the dev_select() entry in ata_port_operations.
1146 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1151 tmp = ATA_DEVICE_OBS;
1153 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1155 iowrite8(tmp, ap->ioaddr.device_addr);
1156 ata_pause(ap); /* needed; also flushes, for mmio */
1160 * ata_dev_select - Select device 0/1 on ATA bus
1161 * @ap: ATA channel to manipulate
1162 * @device: ATA device (numbered from zero) to select
1163 * @wait: non-zero to wait for Status register BSY bit to clear
1164 * @can_sleep: non-zero if context allows sleeping
1166 * Use the method defined in the ATA specification to
1167 * make either device 0, or device 1, active on the
1170 * This is a high-level version of ata_std_dev_select(),
1171 * which additionally provides the services of inserting
1172 * the proper pauses and status polling, where needed.
1178 void ata_dev_select(struct ata_port *ap, unsigned int device,
1179 unsigned int wait, unsigned int can_sleep)
1181 if (ata_msg_probe(ap))
1182 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1183 "device %u, wait %u\n", device, wait);
1188 ap->ops->dev_select(ap, device);
1191 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
1198 * ata_dump_id - IDENTIFY DEVICE info debugging output
1199 * @id: IDENTIFY DEVICE page to dump
1201 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1208 static inline void ata_dump_id(const u16 *id)
1210 DPRINTK("49==0x%04x "
1220 DPRINTK("80==0x%04x "
1230 DPRINTK("88==0x%04x "
1237 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1238 * @id: IDENTIFY data to compute xfer mask from
1240 * Compute the xfermask for this device. This is not as trivial
1241 * as it seems if we must consider early devices correctly.
1243 * FIXME: pre IDE drive timing (do we care ?).
1251 static unsigned int ata_id_xfermask(const u16 *id)
1253 unsigned int pio_mask, mwdma_mask, udma_mask;
1255 /* Usual case. Word 53 indicates word 64 is valid */
1256 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1257 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1261 /* If word 64 isn't valid then Word 51 high byte holds
1262 * the PIO timing number for the maximum. Turn it into
1265 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1266 if (mode < 5) /* Valid PIO range */
1267 pio_mask = (2 << mode) - 1;
1271 /* But wait.. there's more. Design your standards by
1272 * committee and you too can get a free iordy field to
1273 * process. However its the speeds not the modes that
1274 * are supported... Note drivers using the timing API
1275 * will get this right anyway
1279 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1281 if (ata_id_is_cfa(id)) {
1283 * Process compact flash extended modes
1285 int pio = id[163] & 0x7;
1286 int dma = (id[163] >> 3) & 7;
1289 pio_mask |= (1 << 5);
1291 pio_mask |= (1 << 6);
1293 mwdma_mask |= (1 << 3);
1295 mwdma_mask |= (1 << 4);
1299 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1300 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1302 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1306 * ata_port_queue_task - Queue port_task
1307 * @ap: The ata_port to queue port_task for
1308 * @fn: workqueue function to be scheduled
1309 * @data: data for @fn to use
1310 * @delay: delay time for workqueue function
1312 * Schedule @fn(@data) for execution after @delay jiffies using
1313 * port_task. There is one port_task per port and it's the
1314 * user(low level driver)'s responsibility to make sure that only
1315 * one task is active at any given time.
1317 * libata core layer takes care of synchronization between
1318 * port_task and EH. ata_port_queue_task() may be ignored for EH
1322 * Inherited from caller.
1324 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1325 unsigned long delay)
1327 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1328 ap->port_task_data = data;
1330 /* may fail if ata_port_flush_task() in progress */
1331 queue_delayed_work(ata_wq, &ap->port_task, delay);
1335 * ata_port_flush_task - Flush port_task
1336 * @ap: The ata_port to flush port_task for
1338 * After this function completes, port_task is guranteed not to
1339 * be running or scheduled.
1342 * Kernel thread context (may sleep)
1344 void ata_port_flush_task(struct ata_port *ap)
1348 cancel_rearming_delayed_work(&ap->port_task);
1350 if (ata_msg_ctl(ap))
1351 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1354 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1356 struct completion *waiting = qc->private_data;
1362 * ata_exec_internal_sg - execute libata internal command
1363 * @dev: Device to which the command is sent
1364 * @tf: Taskfile registers for the command and the result
1365 * @cdb: CDB for packet command
1366 * @dma_dir: Data tranfer direction of the command
1367 * @sg: sg list for the data buffer of the command
1368 * @n_elem: Number of sg entries
1370 * Executes libata internal command with timeout. @tf contains
1371 * command on entry and result on return. Timeout and error
1372 * conditions are reported via return value. No recovery action
1373 * is taken after a command times out. It's caller's duty to
1374 * clean up after timeout.
1377 * None. Should be called with kernel context, might sleep.
1380 * Zero on success, AC_ERR_* mask on failure
1382 unsigned ata_exec_internal_sg(struct ata_device *dev,
1383 struct ata_taskfile *tf, const u8 *cdb,
1384 int dma_dir, struct scatterlist *sg,
1385 unsigned int n_elem)
1387 struct ata_link *link = dev->link;
1388 struct ata_port *ap = link->ap;
1389 u8 command = tf->command;
1390 struct ata_queued_cmd *qc;
1391 unsigned int tag, preempted_tag;
1392 u32 preempted_sactive, preempted_qc_active;
1393 DECLARE_COMPLETION_ONSTACK(wait);
1394 unsigned long flags;
1395 unsigned int err_mask;
1398 spin_lock_irqsave(ap->lock, flags);
1400 /* no internal command while frozen */
1401 if (ap->pflags & ATA_PFLAG_FROZEN) {
1402 spin_unlock_irqrestore(ap->lock, flags);
1403 return AC_ERR_SYSTEM;
1406 /* initialize internal qc */
1408 /* XXX: Tag 0 is used for drivers with legacy EH as some
1409 * drivers choke if any other tag is given. This breaks
1410 * ata_tag_internal() test for those drivers. Don't use new
1411 * EH stuff without converting to it.
1413 if (ap->ops->error_handler)
1414 tag = ATA_TAG_INTERNAL;
1418 if (test_and_set_bit(tag, &ap->qc_allocated))
1420 qc = __ata_qc_from_tag(ap, tag);
1428 preempted_tag = link->active_tag;
1429 preempted_sactive = link->sactive;
1430 preempted_qc_active = ap->qc_active;
1431 link->active_tag = ATA_TAG_POISON;
1435 /* prepare & issue qc */
1438 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1439 qc->flags |= ATA_QCFLAG_RESULT_TF;
1440 qc->dma_dir = dma_dir;
1441 if (dma_dir != DMA_NONE) {
1442 unsigned int i, buflen = 0;
1444 for (i = 0; i < n_elem; i++)
1445 buflen += sg[i].length;
1447 ata_sg_init(qc, sg, n_elem);
1448 qc->nbytes = buflen;
1451 qc->private_data = &wait;
1452 qc->complete_fn = ata_qc_complete_internal;
1456 spin_unlock_irqrestore(ap->lock, flags);
1458 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1460 ata_port_flush_task(ap);
1463 spin_lock_irqsave(ap->lock, flags);
1465 /* We're racing with irq here. If we lose, the
1466 * following test prevents us from completing the qc
1467 * twice. If we win, the port is frozen and will be
1468 * cleaned up by ->post_internal_cmd().
1470 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1471 qc->err_mask |= AC_ERR_TIMEOUT;
1473 if (ap->ops->error_handler)
1474 ata_port_freeze(ap);
1476 ata_qc_complete(qc);
1478 if (ata_msg_warn(ap))
1479 ata_dev_printk(dev, KERN_WARNING,
1480 "qc timeout (cmd 0x%x)\n", command);
1483 spin_unlock_irqrestore(ap->lock, flags);
1486 /* do post_internal_cmd */
1487 if (ap->ops->post_internal_cmd)
1488 ap->ops->post_internal_cmd(qc);
1490 /* perform minimal error analysis */
1491 if (qc->flags & ATA_QCFLAG_FAILED) {
1492 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1493 qc->err_mask |= AC_ERR_DEV;
1496 qc->err_mask |= AC_ERR_OTHER;
1498 if (qc->err_mask & ~AC_ERR_OTHER)
1499 qc->err_mask &= ~AC_ERR_OTHER;
1503 spin_lock_irqsave(ap->lock, flags);
1505 *tf = qc->result_tf;
1506 err_mask = qc->err_mask;
1509 link->active_tag = preempted_tag;
1510 link->sactive = preempted_sactive;
1511 ap->qc_active = preempted_qc_active;
1513 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1514 * Until those drivers are fixed, we detect the condition
1515 * here, fail the command with AC_ERR_SYSTEM and reenable the
1518 * Note that this doesn't change any behavior as internal
1519 * command failure results in disabling the device in the
1520 * higher layer for LLDDs without new reset/EH callbacks.
1522 * Kill the following code as soon as those drivers are fixed.
1524 if (ap->flags & ATA_FLAG_DISABLED) {
1525 err_mask |= AC_ERR_SYSTEM;
1529 spin_unlock_irqrestore(ap->lock, flags);
1535 * ata_exec_internal - execute libata internal command
1536 * @dev: Device to which the command is sent
1537 * @tf: Taskfile registers for the command and the result
1538 * @cdb: CDB for packet command
1539 * @dma_dir: Data tranfer direction of the command
1540 * @buf: Data buffer of the command
1541 * @buflen: Length of data buffer
1543 * Wrapper around ata_exec_internal_sg() which takes simple
1544 * buffer instead of sg list.
1547 * None. Should be called with kernel context, might sleep.
1550 * Zero on success, AC_ERR_* mask on failure
1552 unsigned ata_exec_internal(struct ata_device *dev,
1553 struct ata_taskfile *tf, const u8 *cdb,
1554 int dma_dir, void *buf, unsigned int buflen)
1556 struct scatterlist *psg = NULL, sg;
1557 unsigned int n_elem = 0;
1559 if (dma_dir != DMA_NONE) {
1561 sg_init_one(&sg, buf, buflen);
1566 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1570 * ata_do_simple_cmd - execute simple internal command
1571 * @dev: Device to which the command is sent
1572 * @cmd: Opcode to execute
1574 * Execute a 'simple' command, that only consists of the opcode
1575 * 'cmd' itself, without filling any other registers
1578 * Kernel thread context (may sleep).
1581 * Zero on success, AC_ERR_* mask on failure
1583 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1585 struct ata_taskfile tf;
1587 ata_tf_init(dev, &tf);
1590 tf.flags |= ATA_TFLAG_DEVICE;
1591 tf.protocol = ATA_PROT_NODATA;
1593 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1597 * ata_pio_need_iordy - check if iordy needed
1600 * Check if the current speed of the device requires IORDY. Used
1601 * by various controllers for chip configuration.
1604 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1606 /* Controller doesn't support IORDY. Probably a pointless check
1607 as the caller should know this */
1608 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1610 /* PIO3 and higher it is mandatory */
1611 if (adev->pio_mode > XFER_PIO_2)
1613 /* We turn it on when possible */
1614 if (ata_id_has_iordy(adev->id))
1620 * ata_pio_mask_no_iordy - Return the non IORDY mask
1623 * Compute the highest mode possible if we are not using iordy. Return
1624 * -1 if no iordy mode is available.
1627 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1629 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1630 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1631 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1632 /* Is the speed faster than the drive allows non IORDY ? */
1634 /* This is cycle times not frequency - watch the logic! */
1635 if (pio > 240) /* PIO2 is 240nS per cycle */
1636 return 3 << ATA_SHIFT_PIO;
1637 return 7 << ATA_SHIFT_PIO;
1640 return 3 << ATA_SHIFT_PIO;
1644 * ata_dev_read_id - Read ID data from the specified device
1645 * @dev: target device
1646 * @p_class: pointer to class of the target device (may be changed)
1647 * @flags: ATA_READID_* flags
1648 * @id: buffer to read IDENTIFY data into
1650 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1651 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1652 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1653 * for pre-ATA4 drives.
1655 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
1656 * now we abort if we hit that case.
1659 * Kernel thread context (may sleep)
1662 * 0 on success, -errno otherwise.
1664 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1665 unsigned int flags, u16 *id)
1667 struct ata_port *ap = dev->link->ap;
1668 unsigned int class = *p_class;
1669 struct ata_taskfile tf;
1670 unsigned int err_mask = 0;
1672 int may_fallback = 1, tried_spinup = 0;
1675 if (ata_msg_ctl(ap))
1676 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1678 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1680 ata_tf_init(dev, &tf);
1684 tf.command = ATA_CMD_ID_ATA;
1687 tf.command = ATA_CMD_ID_ATAPI;
1691 reason = "unsupported class";
1695 tf.protocol = ATA_PROT_PIO;
1697 /* Some devices choke if TF registers contain garbage. Make
1698 * sure those are properly initialized.
1700 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1702 /* Device presence detection is unreliable on some
1703 * controllers. Always poll IDENTIFY if available.
1705 tf.flags |= ATA_TFLAG_POLLING;
1707 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1708 id, sizeof(id[0]) * ATA_ID_WORDS);
1710 if (err_mask & AC_ERR_NODEV_HINT) {
1711 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1712 ap->print_id, dev->devno);
1716 /* Device or controller might have reported the wrong
1717 * device class. Give a shot at the other IDENTIFY if
1718 * the current one is aborted by the device.
1721 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1724 if (class == ATA_DEV_ATA)
1725 class = ATA_DEV_ATAPI;
1727 class = ATA_DEV_ATA;
1732 reason = "I/O error";
1736 /* Falling back doesn't make sense if ID data was read
1737 * successfully at least once.
1741 swap_buf_le16(id, ATA_ID_WORDS);
1745 reason = "device reports invalid type";
1747 if (class == ATA_DEV_ATA) {
1748 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1751 if (ata_id_is_ata(id))
1755 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1758 * Drive powered-up in standby mode, and requires a specific
1759 * SET_FEATURES spin-up subcommand before it will accept
1760 * anything other than the original IDENTIFY command.
1762 ata_tf_init(dev, &tf);
1763 tf.command = ATA_CMD_SET_FEATURES;
1764 tf.feature = SETFEATURES_SPINUP;
1765 tf.protocol = ATA_PROT_NODATA;
1766 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1767 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1768 if (err_mask && id[2] != 0x738c) {
1770 reason = "SPINUP failed";
1774 * If the drive initially returned incomplete IDENTIFY info,
1775 * we now must reissue the IDENTIFY command.
1777 if (id[2] == 0x37c8)
1781 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1783 * The exact sequence expected by certain pre-ATA4 drives is:
1785 * IDENTIFY (optional in early ATA)
1786 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
1788 * Some drives were very specific about that exact sequence.
1790 * Note that ATA4 says lba is mandatory so the second check
1791 * shoud never trigger.
1793 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1794 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1797 reason = "INIT_DEV_PARAMS failed";
1801 /* current CHS translation info (id[53-58]) might be
1802 * changed. reread the identify device info.
1804 flags &= ~ATA_READID_POSTRESET;
1814 if (ata_msg_warn(ap))
1815 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1816 "(%s, err_mask=0x%x)\n", reason, err_mask);
1820 static inline u8 ata_dev_knobble(struct ata_device *dev)
1822 struct ata_port *ap = dev->link->ap;
1823 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1826 static void ata_dev_config_ncq(struct ata_device *dev,
1827 char *desc, size_t desc_sz)
1829 struct ata_port *ap = dev->link->ap;
1830 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1832 if (!ata_id_has_ncq(dev->id)) {
1836 if (dev->horkage & ATA_HORKAGE_NONCQ) {
1837 snprintf(desc, desc_sz, "NCQ (not used)");
1840 if (ap->flags & ATA_FLAG_NCQ) {
1841 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1842 dev->flags |= ATA_DFLAG_NCQ;
1845 if (hdepth >= ddepth)
1846 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1848 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1852 * ata_dev_configure - Configure the specified ATA/ATAPI device
1853 * @dev: Target device to configure
1855 * Configure @dev according to @dev->id. Generic and low-level
1856 * driver specific fixups are also applied.
1859 * Kernel thread context (may sleep)
1862 * 0 on success, -errno otherwise
1864 int ata_dev_configure(struct ata_device *dev)
1866 struct ata_port *ap = dev->link->ap;
1867 struct ata_eh_context *ehc = &dev->link->eh_context;
1868 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1869 const u16 *id = dev->id;
1870 unsigned int xfer_mask;
1871 char revbuf[7]; /* XYZ-99\0 */
1872 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1873 char modelbuf[ATA_ID_PROD_LEN+1];
1876 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1877 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
1882 if (ata_msg_probe(ap))
1883 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1886 dev->horkage |= ata_dev_blacklisted(dev);
1888 /* let ACPI work its magic */
1889 rc = ata_acpi_on_devcfg(dev);
1893 /* massage HPA, do it early as it might change IDENTIFY data */
1894 rc = ata_hpa_resize(dev);
1898 /* print device capabilities */
1899 if (ata_msg_probe(ap))
1900 ata_dev_printk(dev, KERN_DEBUG,
1901 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1902 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1904 id[49], id[82], id[83], id[84],
1905 id[85], id[86], id[87], id[88]);
1907 /* initialize to-be-configured parameters */
1908 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1909 dev->max_sectors = 0;
1917 * common ATA, ATAPI feature tests
1920 /* find max transfer mode; for printk only */
1921 xfer_mask = ata_id_xfermask(id);
1923 if (ata_msg_probe(ap))
1926 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1927 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1930 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1933 /* ATA-specific feature tests */
1934 if (dev->class == ATA_DEV_ATA) {
1935 if (ata_id_is_cfa(id)) {
1936 if (id[162] & 1) /* CPRM may make this media unusable */
1937 ata_dev_printk(dev, KERN_WARNING,
1938 "supports DRM functions and may "
1939 "not be fully accessable.\n");
1940 snprintf(revbuf, 7, "CFA");
1943 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1945 dev->n_sectors = ata_id_n_sectors(id);
1947 if (dev->id[59] & 0x100)
1948 dev->multi_count = dev->id[59] & 0xff;
1950 if (ata_id_has_lba(id)) {
1951 const char *lba_desc;
1955 dev->flags |= ATA_DFLAG_LBA;
1956 if (ata_id_has_lba48(id)) {
1957 dev->flags |= ATA_DFLAG_LBA48;
1960 if (dev->n_sectors >= (1UL << 28) &&
1961 ata_id_has_flush_ext(id))
1962 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1966 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1968 /* print device info to dmesg */
1969 if (ata_msg_drv(ap) && print_info) {
1970 ata_dev_printk(dev, KERN_INFO,
1971 "%s: %s, %s, max %s\n",
1972 revbuf, modelbuf, fwrevbuf,
1973 ata_mode_string(xfer_mask));
1974 ata_dev_printk(dev, KERN_INFO,
1975 "%Lu sectors, multi %u: %s %s\n",
1976 (unsigned long long)dev->n_sectors,
1977 dev->multi_count, lba_desc, ncq_desc);
1982 /* Default translation */
1983 dev->cylinders = id[1];
1985 dev->sectors = id[6];
1987 if (ata_id_current_chs_valid(id)) {
1988 /* Current CHS translation is valid. */
1989 dev->cylinders = id[54];
1990 dev->heads = id[55];
1991 dev->sectors = id[56];
1994 /* print device info to dmesg */
1995 if (ata_msg_drv(ap) && print_info) {
1996 ata_dev_printk(dev, KERN_INFO,
1997 "%s: %s, %s, max %s\n",
1998 revbuf, modelbuf, fwrevbuf,
1999 ata_mode_string(xfer_mask));
2000 ata_dev_printk(dev, KERN_INFO,
2001 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
2002 (unsigned long long)dev->n_sectors,
2003 dev->multi_count, dev->cylinders,
2004 dev->heads, dev->sectors);
2011 /* ATAPI-specific feature tests */
2012 else if (dev->class == ATA_DEV_ATAPI) {
2013 char *cdb_intr_string = "";
2015 rc = atapi_cdb_len(id);
2016 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
2017 if (ata_msg_warn(ap))
2018 ata_dev_printk(dev, KERN_WARNING,
2019 "unsupported CDB len\n");
2023 dev->cdb_len = (unsigned int) rc;
2026 * check to see if this ATAPI device supports
2027 * Asynchronous Notification
2029 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_AN(id)) {
2031 /* issue SET feature command to turn this on */
2032 err = ata_dev_set_AN(dev, SETFEATURES_SATA_ENABLE);
2034 ata_dev_printk(dev, KERN_ERR,
2035 "unable to set AN, err %x\n",
2038 dev->flags |= ATA_DFLAG_AN;
2041 if (ata_id_cdb_intr(dev->id)) {
2042 dev->flags |= ATA_DFLAG_CDB_INTR;
2043 cdb_intr_string = ", CDB intr";
2046 /* print device info to dmesg */
2047 if (ata_msg_drv(ap) && print_info)
2048 ata_dev_printk(dev, KERN_INFO,
2049 "ATAPI: %s, %s, max %s%s\n",
2051 ata_mode_string(xfer_mask),
2055 /* determine max_sectors */
2056 dev->max_sectors = ATA_MAX_SECTORS;
2057 if (dev->flags & ATA_DFLAG_LBA48)
2058 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2060 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2061 /* Let the user know. We don't want to disallow opens for
2062 rescue purposes, or in case the vendor is just a blithering
2065 ata_dev_printk(dev, KERN_WARNING,
2066 "Drive reports diagnostics failure. This may indicate a drive\n");
2067 ata_dev_printk(dev, KERN_WARNING,
2068 "fault or invalid emulation. Contact drive vendor for information.\n");
2072 /* limit bridge transfers to udma5, 200 sectors */
2073 if (ata_dev_knobble(dev)) {
2074 if (ata_msg_drv(ap) && print_info)
2075 ata_dev_printk(dev, KERN_INFO,
2076 "applying bridge limits\n");
2077 dev->udma_mask &= ATA_UDMA5;
2078 dev->max_sectors = ATA_MAX_SECTORS;
2081 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
2082 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2085 if (ap->ops->dev_config)
2086 ap->ops->dev_config(dev);
2088 if (ata_msg_probe(ap))
2089 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2090 __FUNCTION__, ata_chk_status(ap));
2094 if (ata_msg_probe(ap))
2095 ata_dev_printk(dev, KERN_DEBUG,
2096 "%s: EXIT, err\n", __FUNCTION__);
2101 * ata_cable_40wire - return 40 wire cable type
2104 * Helper method for drivers which want to hardwire 40 wire cable
2108 int ata_cable_40wire(struct ata_port *ap)
2110 return ATA_CBL_PATA40;
2114 * ata_cable_80wire - return 80 wire cable type
2117 * Helper method for drivers which want to hardwire 80 wire cable
2121 int ata_cable_80wire(struct ata_port *ap)
2123 return ATA_CBL_PATA80;
2127 * ata_cable_unknown - return unknown PATA cable.
2130 * Helper method for drivers which have no PATA cable detection.
2133 int ata_cable_unknown(struct ata_port *ap)
2135 return ATA_CBL_PATA_UNK;
2139 * ata_cable_sata - return SATA cable type
2142 * Helper method for drivers which have SATA cables
2145 int ata_cable_sata(struct ata_port *ap)
2147 return ATA_CBL_SATA;
2151 * ata_bus_probe - Reset and probe ATA bus
2154 * Master ATA bus probing function. Initiates a hardware-dependent
2155 * bus reset, then attempts to identify any devices found on
2159 * PCI/etc. bus probe sem.
2162 * Zero on success, negative errno otherwise.
2165 int ata_bus_probe(struct ata_port *ap)
2167 unsigned int classes[ATA_MAX_DEVICES];
2168 int tries[ATA_MAX_DEVICES];
2170 struct ata_device *dev;
2174 ata_link_for_each_dev(dev, &ap->link)
2175 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
2178 /* reset and determine device classes */
2179 ap->ops->phy_reset(ap);
2181 ata_link_for_each_dev(dev, &ap->link) {
2182 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2183 dev->class != ATA_DEV_UNKNOWN)
2184 classes[dev->devno] = dev->class;
2186 classes[dev->devno] = ATA_DEV_NONE;
2188 dev->class = ATA_DEV_UNKNOWN;
2193 /* after the reset the device state is PIO 0 and the controller
2194 state is undefined. Record the mode */
2196 ata_link_for_each_dev(dev, &ap->link)
2197 dev->pio_mode = XFER_PIO_0;
2199 /* read IDENTIFY page and configure devices. We have to do the identify
2200 specific sequence bass-ackwards so that PDIAG- is released by
2203 ata_link_for_each_dev(dev, &ap->link) {
2204 if (tries[dev->devno])
2205 dev->class = classes[dev->devno];
2207 if (!ata_dev_enabled(dev))
2210 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2216 /* Now ask for the cable type as PDIAG- should have been released */
2217 if (ap->ops->cable_detect)
2218 ap->cbl = ap->ops->cable_detect(ap);
2220 /* We may have SATA bridge glue hiding here irrespective of the
2221 reported cable types and sensed types */
2222 ata_link_for_each_dev(dev, &ap->link) {
2223 if (!ata_dev_enabled(dev))
2225 /* SATA drives indicate we have a bridge. We don't know which
2226 end of the link the bridge is which is a problem */
2227 if (ata_id_is_sata(dev->id))
2228 ap->cbl = ATA_CBL_SATA;
2231 /* After the identify sequence we can now set up the devices. We do
2232 this in the normal order so that the user doesn't get confused */
2234 ata_link_for_each_dev(dev, &ap->link) {
2235 if (!ata_dev_enabled(dev))
2238 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
2239 rc = ata_dev_configure(dev);
2240 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2245 /* configure transfer mode */
2246 rc = ata_set_mode(&ap->link, &dev);
2250 ata_link_for_each_dev(dev, &ap->link)
2251 if (ata_dev_enabled(dev))
2254 /* no device present, disable port */
2255 ata_port_disable(ap);
2259 tries[dev->devno]--;
2263 /* eeek, something went very wrong, give up */
2264 tries[dev->devno] = 0;
2268 /* give it just one more chance */
2269 tries[dev->devno] = min(tries[dev->devno], 1);
2271 if (tries[dev->devno] == 1) {
2272 /* This is the last chance, better to slow
2273 * down than lose it.
2275 sata_down_spd_limit(&ap->link);
2276 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2280 if (!tries[dev->devno])
2281 ata_dev_disable(dev);
2287 * ata_port_probe - Mark port as enabled
2288 * @ap: Port for which we indicate enablement
2290 * Modify @ap data structure such that the system
2291 * thinks that the entire port is enabled.
2293 * LOCKING: host lock, or some other form of
2297 void ata_port_probe(struct ata_port *ap)
2299 ap->flags &= ~ATA_FLAG_DISABLED;
2303 * sata_print_link_status - Print SATA link status
2304 * @link: SATA link to printk link status about
2306 * This function prints link speed and status of a SATA link.
2311 void sata_print_link_status(struct ata_link *link)
2313 u32 sstatus, scontrol, tmp;
2315 if (sata_scr_read(link, SCR_STATUS, &sstatus))
2317 sata_scr_read(link, SCR_CONTROL, &scontrol);
2319 if (ata_link_online(link)) {
2320 tmp = (sstatus >> 4) & 0xf;
2321 ata_link_printk(link, KERN_INFO,
2322 "SATA link up %s (SStatus %X SControl %X)\n",
2323 sata_spd_string(tmp), sstatus, scontrol);
2325 ata_link_printk(link, KERN_INFO,
2326 "SATA link down (SStatus %X SControl %X)\n",
2332 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2333 * @ap: SATA port associated with target SATA PHY.
2335 * This function issues commands to standard SATA Sxxx
2336 * PHY registers, to wake up the phy (and device), and
2337 * clear any reset condition.
2340 * PCI/etc. bus probe sem.
2343 void __sata_phy_reset(struct ata_port *ap)
2345 struct ata_link *link = &ap->link;
2346 unsigned long timeout = jiffies + (HZ * 5);
2349 if (ap->flags & ATA_FLAG_SATA_RESET) {
2350 /* issue phy wake/reset */
2351 sata_scr_write_flush(link, SCR_CONTROL, 0x301);
2352 /* Couldn't find anything in SATA I/II specs, but
2353 * AHCI-1.1 10.4.2 says at least 1 ms. */
2356 /* phy wake/clear reset */
2357 sata_scr_write_flush(link, SCR_CONTROL, 0x300);
2359 /* wait for phy to become ready, if necessary */
2362 sata_scr_read(link, SCR_STATUS, &sstatus);
2363 if ((sstatus & 0xf) != 1)
2365 } while (time_before(jiffies, timeout));
2367 /* print link status */
2368 sata_print_link_status(link);
2370 /* TODO: phy layer with polling, timeouts, etc. */
2371 if (!ata_link_offline(link))
2374 ata_port_disable(ap);
2376 if (ap->flags & ATA_FLAG_DISABLED)
2379 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2380 ata_port_disable(ap);
2384 ap->cbl = ATA_CBL_SATA;
2388 * sata_phy_reset - Reset SATA bus.
2389 * @ap: SATA port associated with target SATA PHY.
2391 * This function resets the SATA bus, and then probes
2392 * the bus for devices.
2395 * PCI/etc. bus probe sem.
2398 void sata_phy_reset(struct ata_port *ap)
2400 __sata_phy_reset(ap);
2401 if (ap->flags & ATA_FLAG_DISABLED)
2407 * ata_dev_pair - return other device on cable
2410 * Obtain the other device on the same cable, or if none is
2411 * present NULL is returned
2414 struct ata_device *ata_dev_pair(struct ata_device *adev)
2416 struct ata_link *link = adev->link;
2417 struct ata_device *pair = &link->device[1 - adev->devno];
2418 if (!ata_dev_enabled(pair))
2424 * ata_port_disable - Disable port.
2425 * @ap: Port to be disabled.
2427 * Modify @ap data structure such that the system
2428 * thinks that the entire port is disabled, and should
2429 * never attempt to probe or communicate with devices
2432 * LOCKING: host lock, or some other form of
2436 void ata_port_disable(struct ata_port *ap)
2438 ap->link.device[0].class = ATA_DEV_NONE;
2439 ap->link.device[1].class = ATA_DEV_NONE;
2440 ap->flags |= ATA_FLAG_DISABLED;
2444 * sata_down_spd_limit - adjust SATA spd limit downward
2445 * @link: Link to adjust SATA spd limit for
2447 * Adjust SATA spd limit of @link downward. Note that this
2448 * function only adjusts the limit. The change must be applied
2449 * using sata_set_spd().
2452 * Inherited from caller.
2455 * 0 on success, negative errno on failure
2457 int sata_down_spd_limit(struct ata_link *link)
2459 u32 sstatus, spd, mask;
2462 if (!sata_scr_valid(link))
2465 /* If SCR can be read, use it to determine the current SPD.
2466 * If not, use cached value in link->sata_spd.
2468 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
2470 spd = (sstatus >> 4) & 0xf;
2472 spd = link->sata_spd;
2474 mask = link->sata_spd_limit;
2478 /* unconditionally mask off the highest bit */
2479 highbit = fls(mask) - 1;
2480 mask &= ~(1 << highbit);
2482 /* Mask off all speeds higher than or equal to the current
2483 * one. Force 1.5Gbps if current SPD is not available.
2486 mask &= (1 << (spd - 1)) - 1;
2490 /* were we already at the bottom? */
2494 link->sata_spd_limit = mask;
2496 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
2497 sata_spd_string(fls(mask)));
2502 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
2506 if (link->sata_spd_limit == UINT_MAX)
2509 limit = fls(link->sata_spd_limit);
2511 spd = (*scontrol >> 4) & 0xf;
2512 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2514 return spd != limit;
2518 * sata_set_spd_needed - is SATA spd configuration needed
2519 * @link: Link in question
2521 * Test whether the spd limit in SControl matches
2522 * @link->sata_spd_limit. This function is used to determine
2523 * whether hardreset is necessary to apply SATA spd
2527 * Inherited from caller.
2530 * 1 if SATA spd configuration is needed, 0 otherwise.
2532 int sata_set_spd_needed(struct ata_link *link)
2536 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
2539 return __sata_set_spd_needed(link, &scontrol);
2543 * sata_set_spd - set SATA spd according to spd limit
2544 * @link: Link to set SATA spd for
2546 * Set SATA spd of @link according to sata_spd_limit.
2549 * Inherited from caller.
2552 * 0 if spd doesn't need to be changed, 1 if spd has been
2553 * changed. Negative errno if SCR registers are inaccessible.
2555 int sata_set_spd(struct ata_link *link)
2560 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
2563 if (!__sata_set_spd_needed(link, &scontrol))
2566 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
2573 * This mode timing computation functionality is ported over from
2574 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2577 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2578 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2579 * for UDMA6, which is currently supported only by Maxtor drives.
2581 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2584 static const struct ata_timing ata_timing[] = {
2586 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2587 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2588 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2589 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2591 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2592 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2593 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2594 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2595 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2597 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2599 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2600 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2601 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2603 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2604 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2605 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2607 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2608 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2609 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2610 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2612 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2613 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2614 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2616 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2621 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2622 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2624 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2626 q->setup = EZ(t->setup * 1000, T);
2627 q->act8b = EZ(t->act8b * 1000, T);
2628 q->rec8b = EZ(t->rec8b * 1000, T);
2629 q->cyc8b = EZ(t->cyc8b * 1000, T);
2630 q->active = EZ(t->active * 1000, T);
2631 q->recover = EZ(t->recover * 1000, T);
2632 q->cycle = EZ(t->cycle * 1000, T);
2633 q->udma = EZ(t->udma * 1000, UT);
2636 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2637 struct ata_timing *m, unsigned int what)
2639 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2640 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2641 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2642 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2643 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2644 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2645 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2646 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2649 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2651 const struct ata_timing *t;
2653 for (t = ata_timing; t->mode != speed; t++)
2654 if (t->mode == 0xFF)
2659 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2660 struct ata_timing *t, int T, int UT)
2662 const struct ata_timing *s;
2663 struct ata_timing p;
2669 if (!(s = ata_timing_find_mode(speed)))
2672 memcpy(t, s, sizeof(*s));
2675 * If the drive is an EIDE drive, it can tell us it needs extended
2676 * PIO/MW_DMA cycle timing.
2679 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2680 memset(&p, 0, sizeof(p));
2681 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2682 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2683 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2684 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2685 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2687 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2691 * Convert the timing to bus clock counts.
2694 ata_timing_quantize(t, t, T, UT);
2697 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2698 * S.M.A.R.T * and some other commands. We have to ensure that the
2699 * DMA cycle timing is slower/equal than the fastest PIO timing.
2702 if (speed > XFER_PIO_6) {
2703 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2704 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2708 * Lengthen active & recovery time so that cycle time is correct.
2711 if (t->act8b + t->rec8b < t->cyc8b) {
2712 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2713 t->rec8b = t->cyc8b - t->act8b;
2716 if (t->active + t->recover < t->cycle) {
2717 t->active += (t->cycle - (t->active + t->recover)) / 2;
2718 t->recover = t->cycle - t->active;
2721 /* In a few cases quantisation may produce enough errors to
2722 leave t->cycle too low for the sum of active and recovery
2723 if so we must correct this */
2724 if (t->active + t->recover > t->cycle)
2725 t->cycle = t->active + t->recover;
2731 * ata_down_xfermask_limit - adjust dev xfer masks downward
2732 * @dev: Device to adjust xfer masks
2733 * @sel: ATA_DNXFER_* selector
2735 * Adjust xfer masks of @dev downward. Note that this function
2736 * does not apply the change. Invoking ata_set_mode() afterwards
2737 * will apply the limit.
2740 * Inherited from caller.
2743 * 0 on success, negative errno on failure
2745 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2748 unsigned int orig_mask, xfer_mask;
2749 unsigned int pio_mask, mwdma_mask, udma_mask;
2752 quiet = !!(sel & ATA_DNXFER_QUIET);
2753 sel &= ~ATA_DNXFER_QUIET;
2755 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2758 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2761 case ATA_DNXFER_PIO:
2762 highbit = fls(pio_mask) - 1;
2763 pio_mask &= ~(1 << highbit);
2766 case ATA_DNXFER_DMA:
2768 highbit = fls(udma_mask) - 1;
2769 udma_mask &= ~(1 << highbit);
2772 } else if (mwdma_mask) {
2773 highbit = fls(mwdma_mask) - 1;
2774 mwdma_mask &= ~(1 << highbit);
2780 case ATA_DNXFER_40C:
2781 udma_mask &= ATA_UDMA_MASK_40C;
2784 case ATA_DNXFER_FORCE_PIO0:
2786 case ATA_DNXFER_FORCE_PIO:
2795 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2797 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2801 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2802 snprintf(buf, sizeof(buf), "%s:%s",
2803 ata_mode_string(xfer_mask),
2804 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2806 snprintf(buf, sizeof(buf), "%s",
2807 ata_mode_string(xfer_mask));
2809 ata_dev_printk(dev, KERN_WARNING,
2810 "limiting speed to %s\n", buf);
2813 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2819 static int ata_dev_set_mode(struct ata_device *dev)
2821 struct ata_eh_context *ehc = &dev->link->eh_context;
2822 unsigned int err_mask;
2825 dev->flags &= ~ATA_DFLAG_PIO;
2826 if (dev->xfer_shift == ATA_SHIFT_PIO)
2827 dev->flags |= ATA_DFLAG_PIO;
2829 err_mask = ata_dev_set_xfermode(dev);
2830 /* Old CFA may refuse this command, which is just fine */
2831 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2832 err_mask &= ~AC_ERR_DEV;
2833 /* Some very old devices and some bad newer ones fail any kind of
2834 SET_XFERMODE request but support PIO0-2 timings and no IORDY */
2835 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
2836 dev->pio_mode <= XFER_PIO_2)
2837 err_mask &= ~AC_ERR_DEV;
2839 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2840 "(err_mask=0x%x)\n", err_mask);
2844 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2845 rc = ata_dev_revalidate(dev, 0);
2846 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2850 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2851 dev->xfer_shift, (int)dev->xfer_mode);
2853 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2854 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2859 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
2860 * @link: link on which timings will be programmed
2861 * @r_failed_dev: out paramter for failed device
2863 * Standard implementation of the function used to tune and set
2864 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2865 * ata_dev_set_mode() fails, pointer to the failing device is
2866 * returned in @r_failed_dev.
2869 * PCI/etc. bus probe sem.
2872 * 0 on success, negative errno otherwise
2875 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
2877 struct ata_port *ap = link->ap;
2878 struct ata_device *dev;
2879 int rc = 0, used_dma = 0, found = 0;
2881 /* step 1: calculate xfer_mask */
2882 ata_link_for_each_dev(dev, link) {
2883 unsigned int pio_mask, dma_mask;
2885 if (!ata_dev_enabled(dev))
2888 ata_dev_xfermask(dev);
2890 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2891 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2892 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2893 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2902 /* step 2: always set host PIO timings */
2903 ata_link_for_each_dev(dev, link) {
2904 if (!ata_dev_enabled(dev))
2907 if (!dev->pio_mode) {
2908 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2913 dev->xfer_mode = dev->pio_mode;
2914 dev->xfer_shift = ATA_SHIFT_PIO;
2915 if (ap->ops->set_piomode)
2916 ap->ops->set_piomode(ap, dev);
2919 /* step 3: set host DMA timings */
2920 ata_link_for_each_dev(dev, link) {
2921 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2924 dev->xfer_mode = dev->dma_mode;
2925 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2926 if (ap->ops->set_dmamode)
2927 ap->ops->set_dmamode(ap, dev);
2930 /* step 4: update devices' xfer mode */
2931 ata_link_for_each_dev(dev, link) {
2932 /* don't update suspended devices' xfer mode */
2933 if (!ata_dev_enabled(dev))
2936 rc = ata_dev_set_mode(dev);
2941 /* Record simplex status. If we selected DMA then the other
2942 * host channels are not permitted to do so.
2944 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2945 ap->host->simplex_claimed = ap;
2949 *r_failed_dev = dev;
2954 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2955 * @link: link on which timings will be programmed
2956 * @r_failed_dev: out paramter for failed device
2958 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2959 * ata_set_mode() fails, pointer to the failing device is
2960 * returned in @r_failed_dev.
2963 * PCI/etc. bus probe sem.
2966 * 0 on success, negative errno otherwise
2968 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
2970 struct ata_port *ap = link->ap;
2972 /* has private set_mode? */
2973 if (ap->ops->set_mode)
2974 return ap->ops->set_mode(link, r_failed_dev);
2975 return ata_do_set_mode(link, r_failed_dev);
2979 * ata_tf_to_host - issue ATA taskfile to host controller
2980 * @ap: port to which command is being issued
2981 * @tf: ATA taskfile register set
2983 * Issues ATA taskfile register set to ATA host controller,
2984 * with proper synchronization with interrupt handler and
2988 * spin_lock_irqsave(host lock)
2991 static inline void ata_tf_to_host(struct ata_port *ap,
2992 const struct ata_taskfile *tf)
2994 ap->ops->tf_load(ap, tf);
2995 ap->ops->exec_command(ap, tf);
2999 * ata_busy_sleep - sleep until BSY clears, or timeout
3000 * @ap: port containing status register to be polled
3001 * @tmout_pat: impatience timeout
3002 * @tmout: overall timeout
3004 * Sleep until ATA Status register bit BSY clears,
3005 * or a timeout occurs.
3008 * Kernel thread context (may sleep).
3011 * 0 on success, -errno otherwise.
3013 int ata_busy_sleep(struct ata_port *ap,
3014 unsigned long tmout_pat, unsigned long tmout)
3016 unsigned long timer_start, timeout;
3019 status = ata_busy_wait(ap, ATA_BUSY, 300);
3020 timer_start = jiffies;
3021 timeout = timer_start + tmout_pat;
3022 while (status != 0xff && (status & ATA_BUSY) &&
3023 time_before(jiffies, timeout)) {
3025 status = ata_busy_wait(ap, ATA_BUSY, 3);
3028 if (status != 0xff && (status & ATA_BUSY))
3029 ata_port_printk(ap, KERN_WARNING,
3030 "port is slow to respond, please be patient "
3031 "(Status 0x%x)\n", status);
3033 timeout = timer_start + tmout;
3034 while (status != 0xff && (status & ATA_BUSY) &&
3035 time_before(jiffies, timeout)) {
3037 status = ata_chk_status(ap);
3043 if (status & ATA_BUSY) {
3044 ata_port_printk(ap, KERN_ERR, "port failed to respond "
3045 "(%lu secs, Status 0x%x)\n",
3046 tmout / HZ, status);
3054 * ata_wait_ready - sleep until BSY clears, or timeout
3055 * @ap: port containing status register to be polled
3056 * @deadline: deadline jiffies for the operation
3058 * Sleep until ATA Status register bit BSY clears, or timeout
3062 * Kernel thread context (may sleep).
3065 * 0 on success, -errno otherwise.
3067 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
3069 unsigned long start = jiffies;
3073 u8 status = ata_chk_status(ap);
3074 unsigned long now = jiffies;
3076 if (!(status & ATA_BUSY))
3078 if (!ata_link_online(&ap->link) && status == 0xff)
3080 if (time_after(now, deadline))
3083 if (!warned && time_after(now, start + 5 * HZ) &&
3084 (deadline - now > 3 * HZ)) {
3085 ata_port_printk(ap, KERN_WARNING,
3086 "port is slow to respond, please be patient "
3087 "(Status 0x%x)\n", status);
3095 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3096 unsigned long deadline)
3098 struct ata_ioports *ioaddr = &ap->ioaddr;
3099 unsigned int dev0 = devmask & (1 << 0);
3100 unsigned int dev1 = devmask & (1 << 1);
3103 /* if device 0 was found in ata_devchk, wait for its
3107 rc = ata_wait_ready(ap, deadline);
3115 /* if device 1 was found in ata_devchk, wait for register
3116 * access briefly, then wait for BSY to clear.
3121 ap->ops->dev_select(ap, 1);
3123 /* Wait for register access. Some ATAPI devices fail
3124 * to set nsect/lbal after reset, so don't waste too
3125 * much time on it. We're gonna wait for !BSY anyway.
3127 for (i = 0; i < 2; i++) {
3130 nsect = ioread8(ioaddr->nsect_addr);
3131 lbal = ioread8(ioaddr->lbal_addr);
3132 if ((nsect == 1) && (lbal == 1))
3134 msleep(50); /* give drive a breather */
3137 rc = ata_wait_ready(ap, deadline);
3145 /* is all this really necessary? */
3146 ap->ops->dev_select(ap, 0);
3148 ap->ops->dev_select(ap, 1);
3150 ap->ops->dev_select(ap, 0);
3155 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3156 unsigned long deadline)
3158 struct ata_ioports *ioaddr = &ap->ioaddr;
3160 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3162 /* software reset. causes dev0 to be selected */
3163 iowrite8(ap->ctl, ioaddr->ctl_addr);
3164 udelay(20); /* FIXME: flush */
3165 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3166 udelay(20); /* FIXME: flush */
3167 iowrite8(ap->ctl, ioaddr->ctl_addr);
3169 /* spec mandates ">= 2ms" before checking status.
3170 * We wait 150ms, because that was the magic delay used for
3171 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
3172 * between when the ATA command register is written, and then
3173 * status is checked. Because waiting for "a while" before
3174 * checking status is fine, post SRST, we perform this magic
3175 * delay here as well.
3177 * Old drivers/ide uses the 2mS rule and then waits for ready
3181 /* Before we perform post reset processing we want to see if
3182 * the bus shows 0xFF because the odd clown forgets the D7
3183 * pulldown resistor.
3185 if (ata_check_status(ap) == 0xFF)
3188 return ata_bus_post_reset(ap, devmask, deadline);
3192 * ata_bus_reset - reset host port and associated ATA channel
3193 * @ap: port to reset
3195 * This is typically the first time we actually start issuing
3196 * commands to the ATA channel. We wait for BSY to clear, then
3197 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3198 * result. Determine what devices, if any, are on the channel
3199 * by looking at the device 0/1 error register. Look at the signature
3200 * stored in each device's taskfile registers, to determine if
3201 * the device is ATA or ATAPI.
3204 * PCI/etc. bus probe sem.
3205 * Obtains host lock.
3208 * Sets ATA_FLAG_DISABLED if bus reset fails.
3211 void ata_bus_reset(struct ata_port *ap)
3213 struct ata_device *device = ap->link.device;
3214 struct ata_ioports *ioaddr = &ap->ioaddr;
3215 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3217 unsigned int dev0, dev1 = 0, devmask = 0;
3220 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3222 /* determine if device 0/1 are present */
3223 if (ap->flags & ATA_FLAG_SATA_RESET)
3226 dev0 = ata_devchk(ap, 0);
3228 dev1 = ata_devchk(ap, 1);
3232 devmask |= (1 << 0);
3234 devmask |= (1 << 1);
3236 /* select device 0 again */
3237 ap->ops->dev_select(ap, 0);
3239 /* issue bus reset */
3240 if (ap->flags & ATA_FLAG_SRST) {
3241 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3242 if (rc && rc != -ENODEV)
3247 * determine by signature whether we have ATA or ATAPI devices
3249 device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
3250 if ((slave_possible) && (err != 0x81))
3251 device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
3253 /* is double-select really necessary? */
3254 if (device[1].class != ATA_DEV_NONE)
3255 ap->ops->dev_select(ap, 1);
3256 if (device[0].class != ATA_DEV_NONE)
3257 ap->ops->dev_select(ap, 0);
3259 /* if no devices were detected, disable this port */
3260 if ((device[0].class == ATA_DEV_NONE) &&
3261 (device[1].class == ATA_DEV_NONE))
3264 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3265 /* set up device control for ATA_FLAG_SATA_RESET */
3266 iowrite8(ap->ctl, ioaddr->ctl_addr);
3273 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3274 ata_port_disable(ap);
3280 * sata_link_debounce - debounce SATA phy status
3281 * @link: ATA link to debounce SATA phy status for
3282 * @params: timing parameters { interval, duratinon, timeout } in msec
3283 * @deadline: deadline jiffies for the operation
3285 * Make sure SStatus of @link reaches stable state, determined by
3286 * holding the same value where DET is not 1 for @duration polled
3287 * every @interval, before @timeout. Timeout constraints the
3288 * beginning of the stable state. Because DET gets stuck at 1 on
3289 * some controllers after hot unplugging, this functions waits
3290 * until timeout then returns 0 if DET is stable at 1.
3292 * @timeout is further limited by @deadline. The sooner of the
3296 * Kernel thread context (may sleep)
3299 * 0 on success, -errno on failure.
3301 int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3302 unsigned long deadline)
3304 unsigned long interval_msec = params[0];
3305 unsigned long duration = msecs_to_jiffies(params[1]);
3306 unsigned long last_jiffies, t;
3310 t = jiffies + msecs_to_jiffies(params[2]);
3311 if (time_before(t, deadline))
3314 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3319 last_jiffies = jiffies;
3322 msleep(interval_msec);
3323 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3329 if (cur == 1 && time_before(jiffies, deadline))
3331 if (time_after(jiffies, last_jiffies + duration))
3336 /* unstable, start over */
3338 last_jiffies = jiffies;
3340 /* Check deadline. If debouncing failed, return
3341 * -EPIPE to tell upper layer to lower link speed.
3343 if (time_after(jiffies, deadline))
3349 * sata_link_resume - resume SATA link
3350 * @link: ATA link to resume SATA
3351 * @params: timing parameters { interval, duratinon, timeout } in msec
3352 * @deadline: deadline jiffies for the operation
3354 * Resume SATA phy @link and debounce it.
3357 * Kernel thread context (may sleep)
3360 * 0 on success, -errno on failure.
3362 int sata_link_resume(struct ata_link *link, const unsigned long *params,
3363 unsigned long deadline)
3368 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3371 scontrol = (scontrol & 0x0f0) | 0x300;
3373 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3376 /* Some PHYs react badly if SStatus is pounded immediately
3377 * after resuming. Delay 200ms before debouncing.
3381 return sata_link_debounce(link, params, deadline);
3385 * ata_std_prereset - prepare for reset
3386 * @link: ATA link to be reset
3387 * @deadline: deadline jiffies for the operation
3389 * @link is about to be reset. Initialize it. Failure from
3390 * prereset makes libata abort whole reset sequence and give up
3391 * that port, so prereset should be best-effort. It does its
3392 * best to prepare for reset sequence but if things go wrong, it
3393 * should just whine, not fail.
3396 * Kernel thread context (may sleep)
3399 * 0 on success, -errno otherwise.
3401 int ata_std_prereset(struct ata_link *link, unsigned long deadline)
3403 struct ata_port *ap = link->ap;
3404 struct ata_eh_context *ehc = &link->eh_context;
3405 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3408 /* handle link resume */
3409 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3410 (link->flags & ATA_LFLAG_HRST_TO_RESUME))
3411 ehc->i.action |= ATA_EH_HARDRESET;
3413 /* if we're about to do hardreset, nothing more to do */
3414 if (ehc->i.action & ATA_EH_HARDRESET)
3417 /* if SATA, resume link */
3418 if (ap->flags & ATA_FLAG_SATA) {
3419 rc = sata_link_resume(link, timing, deadline);
3420 /* whine about phy resume failure but proceed */
3421 if (rc && rc != -EOPNOTSUPP)
3422 ata_link_printk(link, KERN_WARNING, "failed to resume "
3423 "link for reset (errno=%d)\n", rc);
3426 /* Wait for !BSY if the controller can wait for the first D2H
3427 * Reg FIS and we don't know that no device is attached.
3429 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
3430 rc = ata_wait_ready(ap, deadline);
3431 if (rc && rc != -ENODEV) {
3432 ata_link_printk(link, KERN_WARNING, "device not ready "
3433 "(errno=%d), forcing hardreset\n", rc);
3434 ehc->i.action |= ATA_EH_HARDRESET;
3442 * ata_std_softreset - reset host port via ATA SRST
3443 * @link: ATA link to reset
3444 * @classes: resulting classes of attached devices
3445 * @deadline: deadline jiffies for the operation
3447 * Reset host port using ATA SRST.
3450 * Kernel thread context (may sleep)
3453 * 0 on success, -errno otherwise.
3455 int ata_std_softreset(struct ata_link *link, unsigned int *classes,
3456 unsigned long deadline)
3458 struct ata_port *ap = link->ap;
3459 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3460 unsigned int devmask = 0;
3466 if (ata_link_offline(link)) {
3467 classes[0] = ATA_DEV_NONE;
3471 /* determine if device 0/1 are present */
3472 if (ata_devchk(ap, 0))
3473 devmask |= (1 << 0);
3474 if (slave_possible && ata_devchk(ap, 1))
3475 devmask |= (1 << 1);
3477 /* select device 0 again */
3478 ap->ops->dev_select(ap, 0);
3480 /* issue bus reset */
3481 DPRINTK("about to softreset, devmask=%x\n", devmask);
3482 rc = ata_bus_softreset(ap, devmask, deadline);
3483 /* if link is occupied, -ENODEV too is an error */
3484 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
3485 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
3489 /* determine by signature whether we have ATA or ATAPI devices */
3490 classes[0] = ata_dev_try_classify(&link->device[0],
3491 devmask & (1 << 0), &err);
3492 if (slave_possible && err != 0x81)
3493 classes[1] = ata_dev_try_classify(&link->device[1],
3494 devmask & (1 << 1), &err);
3497 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3502 * sata_link_hardreset - reset link via SATA phy reset
3503 * @link: link to reset
3504 * @timing: timing parameters { interval, duratinon, timeout } in msec
3505 * @deadline: deadline jiffies for the operation
3507 * SATA phy-reset @link using DET bits of SControl register.
3510 * Kernel thread context (may sleep)
3513 * 0 on success, -errno otherwise.
3515 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
3516 unsigned long deadline)
3523 if (sata_set_spd_needed(link)) {
3524 /* SATA spec says nothing about how to reconfigure
3525 * spd. To be on the safe side, turn off phy during
3526 * reconfiguration. This works for at least ICH7 AHCI
3529 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3532 scontrol = (scontrol & 0x0f0) | 0x304;
3534 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3540 /* issue phy wake/reset */
3541 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3544 scontrol = (scontrol & 0x0f0) | 0x301;
3546 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
3549 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3550 * 10.4.2 says at least 1 ms.
3554 /* bring link back */
3555 rc = sata_link_resume(link, timing, deadline);
3557 DPRINTK("EXIT, rc=%d\n", rc);
3562 * sata_std_hardreset - reset host port via SATA phy reset
3563 * @link: link to reset
3564 * @class: resulting class of attached device
3565 * @deadline: deadline jiffies for the operation
3567 * SATA phy-reset host port using DET bits of SControl register,
3568 * wait for !BSY and classify the attached device.
3571 * Kernel thread context (may sleep)
3574 * 0 on success, -errno otherwise.
3576 int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3577 unsigned long deadline)
3579 struct ata_port *ap = link->ap;
3580 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3586 rc = sata_link_hardreset(link, timing, deadline);
3588 ata_link_printk(link, KERN_ERR,
3589 "COMRESET failed (errno=%d)\n", rc);
3593 /* TODO: phy layer with polling, timeouts, etc. */
3594 if (ata_link_offline(link)) {
3595 *class = ATA_DEV_NONE;
3596 DPRINTK("EXIT, link offline\n");
3600 /* wait a while before checking status, see SRST for more info */
3603 rc = ata_wait_ready(ap, deadline);
3604 /* link occupied, -ENODEV too is an error */
3606 ata_link_printk(link, KERN_ERR,
3607 "COMRESET failed (errno=%d)\n", rc);
3611 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3613 *class = ata_dev_try_classify(link->device, 1, NULL);
3615 DPRINTK("EXIT, class=%u\n", *class);
3620 * ata_std_postreset - standard postreset callback
3621 * @link: the target ata_link
3622 * @classes: classes of attached devices
3624 * This function is invoked after a successful reset. Note that
3625 * the device might have been reset more than once using
3626 * different reset methods before postreset is invoked.
3629 * Kernel thread context (may sleep)
3631 void ata_std_postreset(struct ata_link *link, unsigned int *classes)
3633 struct ata_port *ap = link->ap;
3638 /* print link status */
3639 sata_print_link_status(link);
3642 if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
3643 sata_scr_write(link, SCR_ERROR, serror);
3645 /* is double-select really necessary? */
3646 if (classes[0] != ATA_DEV_NONE)
3647 ap->ops->dev_select(ap, 1);
3648 if (classes[1] != ATA_DEV_NONE)
3649 ap->ops->dev_select(ap, 0);
3651 /* bail out if no device is present */
3652 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3653 DPRINTK("EXIT, no device\n");
3657 /* set up device control */
3658 if (ap->ioaddr.ctl_addr)
3659 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3665 * ata_dev_same_device - Determine whether new ID matches configured device
3666 * @dev: device to compare against
3667 * @new_class: class of the new device
3668 * @new_id: IDENTIFY page of the new device
3670 * Compare @new_class and @new_id against @dev and determine
3671 * whether @dev is the device indicated by @new_class and
3678 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3680 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3683 const u16 *old_id = dev->id;
3684 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3685 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3687 if (dev->class != new_class) {
3688 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3689 dev->class, new_class);
3693 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3694 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3695 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3696 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3698 if (strcmp(model[0], model[1])) {
3699 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3700 "'%s' != '%s'\n", model[0], model[1]);
3704 if (strcmp(serial[0], serial[1])) {
3705 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3706 "'%s' != '%s'\n", serial[0], serial[1]);
3714 * ata_dev_reread_id - Re-read IDENTIFY data
3715 * @dev: target ATA device
3716 * @readid_flags: read ID flags
3718 * Re-read IDENTIFY page and make sure @dev is still attached to
3722 * Kernel thread context (may sleep)
3725 * 0 on success, negative errno otherwise
3727 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
3729 unsigned int class = dev->class;
3730 u16 *id = (void *)dev->link->ap->sector_buf;
3734 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3738 /* is the device still there? */
3739 if (!ata_dev_same_device(dev, class, id))
3742 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3747 * ata_dev_revalidate - Revalidate ATA device
3748 * @dev: device to revalidate
3749 * @readid_flags: read ID flags
3751 * Re-read IDENTIFY page, make sure @dev is still attached to the
3752 * port and reconfigure it according to the new IDENTIFY page.
3755 * Kernel thread context (may sleep)
3758 * 0 on success, negative errno otherwise
3760 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3762 u64 n_sectors = dev->n_sectors;
3765 if (!ata_dev_enabled(dev))
3769 rc = ata_dev_reread_id(dev, readid_flags);
3773 /* configure device according to the new ID */
3774 rc = ata_dev_configure(dev);
3778 /* verify n_sectors hasn't changed */
3779 if (dev->class == ATA_DEV_ATA && n_sectors &&
3780 dev->n_sectors != n_sectors) {
3781 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3783 (unsigned long long)n_sectors,
3784 (unsigned long long)dev->n_sectors);
3786 /* restore original n_sectors */
3787 dev->n_sectors = n_sectors;
3796 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3800 struct ata_blacklist_entry {
3801 const char *model_num;
3802 const char *model_rev;
3803 unsigned long horkage;
3806 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3807 /* Devices with DMA related problems under Linux */
3808 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3809 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3810 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3811 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3812 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3813 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3814 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3815 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3816 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3817 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3818 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3819 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3820 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3821 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3822 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3823 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3824 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3825 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3826 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3827 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3828 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3829 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3830 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3831 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3832 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3833 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3834 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3835 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3836 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3837 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
3838 { "IOMEGA ZIP 250 ATAPI", NULL, ATA_HORKAGE_NODMA }, /* temporary fix */
3839 { "IOMEGA ZIP 250 ATAPI Floppy",
3840 NULL, ATA_HORKAGE_NODMA },
3842 /* Weird ATAPI devices */
3843 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
3845 /* Devices we expect to fail diagnostics */
3847 /* Devices where NCQ should be avoided */
3849 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3850 /* http://thread.gmane.org/gmane.linux.ide/14907 */
3851 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
3853 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
3854 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
3855 { "HITACHI HDS7250SASUN500G 0621KTAWSD", "K2AOAJ0AHITACHI",
3856 ATA_HORKAGE_NONCQ },
3858 /* Blacklist entries taken from Silicon Image 3124/3132
3859 Windows driver .inf file - also several Linux problem reports */
3860 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
3861 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
3862 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
3863 /* Drives which do spurious command completion */
3864 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
3865 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
3866 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
3867 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
3868 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
3869 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
3870 { "ST3160812AS", "3.AD", ATA_HORKAGE_NONCQ, },
3871 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
3873 /* devices which puke on READ_NATIVE_MAX */
3874 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
3875 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
3876 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
3877 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
3883 int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
3889 * check for trailing wildcard: *\0
3891 p = strchr(patt, wildchar);
3892 if (p && ((*(p + 1)) == 0))
3897 return strncmp(patt, name, len);
3900 static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
3902 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3903 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3904 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3906 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3907 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3909 while (ad->model_num) {
3910 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
3911 if (ad->model_rev == NULL)
3913 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
3921 static int ata_dma_blacklisted(const struct ata_device *dev)
3923 /* We don't support polling DMA.
3924 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3925 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3927 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
3928 (dev->flags & ATA_DFLAG_CDB_INTR))
3930 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
3934 * ata_dev_xfermask - Compute supported xfermask of the given device
3935 * @dev: Device to compute xfermask for
3937 * Compute supported xfermask of @dev and store it in
3938 * dev->*_mask. This function is responsible for applying all
3939 * known limits including host controller limits, device
3945 static void ata_dev_xfermask(struct ata_device *dev)
3947 struct ata_link *link = dev->link;
3948 struct ata_port *ap = link->ap;
3949 struct ata_host *host = ap->host;
3950 unsigned long xfer_mask;
3952 /* controller modes available */
3953 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3954 ap->mwdma_mask, ap->udma_mask);
3956 /* drive modes available */
3957 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3958 dev->mwdma_mask, dev->udma_mask);
3959 xfer_mask &= ata_id_xfermask(dev->id);
3962 * CFA Advanced TrueIDE timings are not allowed on a shared
3965 if (ata_dev_pair(dev)) {
3966 /* No PIO5 or PIO6 */
3967 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3968 /* No MWDMA3 or MWDMA 4 */
3969 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3972 if (ata_dma_blacklisted(dev)) {
3973 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3974 ata_dev_printk(dev, KERN_WARNING,
3975 "device is on DMA blacklist, disabling DMA\n");
3978 if ((host->flags & ATA_HOST_SIMPLEX) &&
3979 host->simplex_claimed && host->simplex_claimed != ap) {
3980 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3981 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3982 "other device, disabling DMA\n");
3985 if (ap->flags & ATA_FLAG_NO_IORDY)
3986 xfer_mask &= ata_pio_mask_no_iordy(dev);
3988 if (ap->ops->mode_filter)
3989 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
3991 /* Apply cable rule here. Don't apply it early because when
3992 * we handle hot plug the cable type can itself change.
3993 * Check this last so that we know if the transfer rate was
3994 * solely limited by the cable.
3995 * Unknown or 80 wire cables reported host side are checked
3996 * drive side as well. Cases where we know a 40wire cable
3997 * is used safely for 80 are not checked here.
3999 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4000 /* UDMA/44 or higher would be available */
4001 if((ap->cbl == ATA_CBL_PATA40) ||
4002 (ata_drive_40wire(dev->id) &&
4003 (ap->cbl == ATA_CBL_PATA_UNK ||
4004 ap->cbl == ATA_CBL_PATA80))) {
4005 ata_dev_printk(dev, KERN_WARNING,
4006 "limited to UDMA/33 due to 40-wire cable\n");
4007 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4010 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4011 &dev->mwdma_mask, &dev->udma_mask);
4015 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
4016 * @dev: Device to which command will be sent
4018 * Issue SET FEATURES - XFER MODE command to device @dev
4022 * PCI/etc. bus probe sem.
4025 * 0 on success, AC_ERR_* mask otherwise.
4028 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
4030 struct ata_taskfile tf;
4031 unsigned int err_mask;
4033 /* set up set-features taskfile */
4034 DPRINTK("set features - xfer mode\n");
4036 /* Some controllers and ATAPI devices show flaky interrupt
4037 * behavior after setting xfer mode. Use polling instead.
4039 ata_tf_init(dev, &tf);
4040 tf.command = ATA_CMD_SET_FEATURES;
4041 tf.feature = SETFEATURES_XFER;
4042 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
4043 tf.protocol = ATA_PROT_NODATA;
4044 tf.nsect = dev->xfer_mode;
4046 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4048 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4053 * ata_dev_set_AN - Issue SET FEATURES - SATA FEATURES
4054 * @dev: Device to which command will be sent
4055 * @enable: Whether to enable or disable the feature
4057 * Issue SET FEATURES - SATA FEATURES command to device @dev
4058 * on port @ap with sector count set to indicate Asynchronous
4059 * Notification feature
4062 * PCI/etc. bus probe sem.
4065 * 0 on success, AC_ERR_* mask otherwise.
4067 static unsigned int ata_dev_set_AN(struct ata_device *dev, u8 enable)
4069 struct ata_taskfile tf;
4070 unsigned int err_mask;
4072 /* set up set-features taskfile */
4073 DPRINTK("set features - SATA features\n");
4075 ata_tf_init(dev, &tf);
4076 tf.command = ATA_CMD_SET_FEATURES;
4077 tf.feature = enable;
4078 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4079 tf.protocol = ATA_PROT_NODATA;
4082 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4084 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4089 * ata_dev_init_params - Issue INIT DEV PARAMS command
4090 * @dev: Device to which command will be sent
4091 * @heads: Number of heads (taskfile parameter)
4092 * @sectors: Number of sectors (taskfile parameter)
4095 * Kernel thread context (may sleep)
4098 * 0 on success, AC_ERR_* mask otherwise.
4100 static unsigned int ata_dev_init_params(struct ata_device *dev,
4101 u16 heads, u16 sectors)
4103 struct ata_taskfile tf;
4104 unsigned int err_mask;
4106 /* Number of sectors per track 1-255. Number of heads 1-16 */
4107 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
4108 return AC_ERR_INVALID;
4110 /* set up init dev params taskfile */
4111 DPRINTK("init dev params \n");
4113 ata_tf_init(dev, &tf);
4114 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4115 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4116 tf.protocol = ATA_PROT_NODATA;
4118 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
4120 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4121 /* A clean abort indicates an original or just out of spec drive
4122 and we should continue as we issue the setup based on the
4123 drive reported working geometry */
4124 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4127 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4132 * ata_sg_clean - Unmap DMA memory associated with command
4133 * @qc: Command containing DMA memory to be released
4135 * Unmap all mapped DMA memory associated with this command.
4138 * spin_lock_irqsave(host lock)
4140 void ata_sg_clean(struct ata_queued_cmd *qc)
4142 struct ata_port *ap = qc->ap;
4143 struct scatterlist *sg = qc->__sg;
4144 int dir = qc->dma_dir;
4145 void *pad_buf = NULL;
4147 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
4148 WARN_ON(sg == NULL);
4150 if (qc->flags & ATA_QCFLAG_SINGLE)
4151 WARN_ON(qc->n_elem > 1);
4153 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4155 /* if we padded the buffer out to 32-bit bound, and data
4156 * xfer direction is from-device, we must copy from the
4157 * pad buffer back into the supplied buffer
4159 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
4160 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4162 if (qc->flags & ATA_QCFLAG_SG) {
4164 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4165 /* restore last sg */
4166 sg[qc->orig_n_elem - 1].length += qc->pad_len;
4168 struct scatterlist *psg = &qc->pad_sgent;
4169 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4170 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
4171 kunmap_atomic(addr, KM_IRQ0);
4175 dma_unmap_single(ap->dev,
4176 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
4179 sg->length += qc->pad_len;
4181 memcpy(qc->buf_virt + sg->length - qc->pad_len,
4182 pad_buf, qc->pad_len);
4185 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4190 * ata_fill_sg - Fill PCI IDE PRD table
4191 * @qc: Metadata associated with taskfile to be transferred
4193 * Fill PCI IDE PRD (scatter-gather) table with segments
4194 * associated with the current disk command.
4197 * spin_lock_irqsave(host lock)
4200 static void ata_fill_sg(struct ata_queued_cmd *qc)
4202 struct ata_port *ap = qc->ap;
4203 struct scatterlist *sg;
4206 WARN_ON(qc->__sg == NULL);
4207 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4210 ata_for_each_sg(sg, qc) {
4214 /* determine if physical DMA addr spans 64K boundary.
4215 * Note h/w doesn't support 64-bit, so we unconditionally
4216 * truncate dma_addr_t to u32.
4218 addr = (u32) sg_dma_address(sg);
4219 sg_len = sg_dma_len(sg);
4222 offset = addr & 0xffff;
4224 if ((offset + sg_len) > 0x10000)
4225 len = 0x10000 - offset;
4227 ap->prd[idx].addr = cpu_to_le32(addr);
4228 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
4229 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4238 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4242 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4243 * @qc: Metadata associated with taskfile to be transferred
4245 * Fill PCI IDE PRD (scatter-gather) table with segments
4246 * associated with the current disk command. Perform the fill
4247 * so that we avoid writing any length 64K records for
4248 * controllers that don't follow the spec.
4251 * spin_lock_irqsave(host lock)
4254 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4256 struct ata_port *ap = qc->ap;
4257 struct scatterlist *sg;
4260 WARN_ON(qc->__sg == NULL);
4261 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4264 ata_for_each_sg(sg, qc) {
4266 u32 sg_len, len, blen;
4268 /* determine if physical DMA addr spans 64K boundary.
4269 * Note h/w doesn't support 64-bit, so we unconditionally
4270 * truncate dma_addr_t to u32.
4272 addr = (u32) sg_dma_address(sg);
4273 sg_len = sg_dma_len(sg);
4276 offset = addr & 0xffff;
4278 if ((offset + sg_len) > 0x10000)
4279 len = 0x10000 - offset;
4281 blen = len & 0xffff;
4282 ap->prd[idx].addr = cpu_to_le32(addr);
4284 /* Some PATA chipsets like the CS5530 can't
4285 cope with 0x0000 meaning 64K as the spec says */
4286 ap->prd[idx].flags_len = cpu_to_le32(0x8000);
4288 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
4290 ap->prd[idx].flags_len = cpu_to_le32(blen);
4291 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4300 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4304 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4305 * @qc: Metadata associated with taskfile to check
4307 * Allow low-level driver to filter ATA PACKET commands, returning
4308 * a status indicating whether or not it is OK to use DMA for the
4309 * supplied PACKET command.
4312 * spin_lock_irqsave(host lock)
4314 * RETURNS: 0 when ATAPI DMA can be used
4317 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4319 struct ata_port *ap = qc->ap;
4321 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4322 * few ATAPI devices choke on such DMA requests.
4324 if (unlikely(qc->nbytes & 15))
4327 if (ap->ops->check_atapi_dma)
4328 return ap->ops->check_atapi_dma(qc);
4334 * ata_qc_prep - Prepare taskfile for submission
4335 * @qc: Metadata associated with taskfile to be prepared
4337 * Prepare ATA taskfile for submission.
4340 * spin_lock_irqsave(host lock)
4342 void ata_qc_prep(struct ata_queued_cmd *qc)
4344 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4351 * ata_dumb_qc_prep - Prepare taskfile for submission
4352 * @qc: Metadata associated with taskfile to be prepared
4354 * Prepare ATA taskfile for submission.
4357 * spin_lock_irqsave(host lock)
4359 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
4361 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4364 ata_fill_sg_dumb(qc);
4367 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
4370 * ata_sg_init_one - Associate command with memory buffer
4371 * @qc: Command to be associated
4372 * @buf: Memory buffer
4373 * @buflen: Length of memory buffer, in bytes.
4375 * Initialize the data-related elements of queued_cmd @qc
4376 * to point to a single memory buffer, @buf of byte length @buflen.
4379 * spin_lock_irqsave(host lock)
4382 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
4384 qc->flags |= ATA_QCFLAG_SINGLE;
4386 qc->__sg = &qc->sgent;
4388 qc->orig_n_elem = 1;
4390 qc->nbytes = buflen;
4392 sg_init_one(&qc->sgent, buf, buflen);
4396 * ata_sg_init - Associate command with scatter-gather table.
4397 * @qc: Command to be associated
4398 * @sg: Scatter-gather table.
4399 * @n_elem: Number of elements in s/g table.
4401 * Initialize the data-related elements of queued_cmd @qc
4402 * to point to a scatter-gather table @sg, containing @n_elem
4406 * spin_lock_irqsave(host lock)
4409 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4410 unsigned int n_elem)
4412 qc->flags |= ATA_QCFLAG_SG;
4414 qc->n_elem = n_elem;
4415 qc->orig_n_elem = n_elem;
4419 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
4420 * @qc: Command with memory buffer to be mapped.
4422 * DMA-map the memory buffer associated with queued_cmd @qc.
4425 * spin_lock_irqsave(host lock)
4428 * Zero on success, negative on error.
4431 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
4433 struct ata_port *ap = qc->ap;
4434 int dir = qc->dma_dir;
4435 struct scatterlist *sg = qc->__sg;
4436 dma_addr_t dma_address;
4439 /* we must lengthen transfers to end on a 32-bit boundary */
4440 qc->pad_len = sg->length & 3;
4442 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4443 struct scatterlist *psg = &qc->pad_sgent;
4445 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4447 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4449 if (qc->tf.flags & ATA_TFLAG_WRITE)
4450 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
4453 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4454 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4456 sg->length -= qc->pad_len;
4457 if (sg->length == 0)
4460 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
4461 sg->length, qc->pad_len);
4469 dma_address = dma_map_single(ap->dev, qc->buf_virt,
4471 if (dma_mapping_error(dma_address)) {
4473 sg->length += qc->pad_len;
4477 sg_dma_address(sg) = dma_address;
4478 sg_dma_len(sg) = sg->length;
4481 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
4482 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4488 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4489 * @qc: Command with scatter-gather table to be mapped.
4491 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4494 * spin_lock_irqsave(host lock)
4497 * Zero on success, negative on error.
4501 static int ata_sg_setup(struct ata_queued_cmd *qc)
4503 struct ata_port *ap = qc->ap;
4504 struct scatterlist *sg = qc->__sg;
4505 struct scatterlist *lsg = &sg[qc->n_elem - 1];
4506 int n_elem, pre_n_elem, dir, trim_sg = 0;
4508 VPRINTK("ENTER, ata%u\n", ap->print_id);
4509 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
4511 /* we must lengthen transfers to end on a 32-bit boundary */
4512 qc->pad_len = lsg->length & 3;
4514 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4515 struct scatterlist *psg = &qc->pad_sgent;
4516 unsigned int offset;
4518 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4520 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4523 * psg->page/offset are used to copy to-be-written
4524 * data in this function or read data in ata_sg_clean.
4526 offset = lsg->offset + lsg->length - qc->pad_len;
4527 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
4528 psg->offset = offset_in_page(offset);
4530 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4531 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4532 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
4533 kunmap_atomic(addr, KM_IRQ0);
4536 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4537 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4539 lsg->length -= qc->pad_len;
4540 if (lsg->length == 0)
4543 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
4544 qc->n_elem - 1, lsg->length, qc->pad_len);
4547 pre_n_elem = qc->n_elem;
4548 if (trim_sg && pre_n_elem)
4557 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4559 /* restore last sg */
4560 lsg->length += qc->pad_len;
4564 DPRINTK("%d sg elements mapped\n", n_elem);
4567 qc->n_elem = n_elem;
4573 * swap_buf_le16 - swap halves of 16-bit words in place
4574 * @buf: Buffer to swap
4575 * @buf_words: Number of 16-bit words in buffer.
4577 * Swap halves of 16-bit words if needed to convert from
4578 * little-endian byte order to native cpu byte order, or
4582 * Inherited from caller.
4584 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4589 for (i = 0; i < buf_words; i++)
4590 buf[i] = le16_to_cpu(buf[i]);
4591 #endif /* __BIG_ENDIAN */
4595 * ata_data_xfer - Transfer data by PIO
4596 * @adev: device to target
4598 * @buflen: buffer length
4599 * @write_data: read/write
4601 * Transfer data from/to the device data register by PIO.
4604 * Inherited from caller.
4606 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4607 unsigned int buflen, int write_data)
4609 struct ata_port *ap = adev->link->ap;
4610 unsigned int words = buflen >> 1;
4612 /* Transfer multiple of 2 bytes */
4614 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4616 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4618 /* Transfer trailing 1 byte, if any. */
4619 if (unlikely(buflen & 0x01)) {
4620 u16 align_buf[1] = { 0 };
4621 unsigned char *trailing_buf = buf + buflen - 1;
4624 memcpy(align_buf, trailing_buf, 1);
4625 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4627 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4628 memcpy(trailing_buf, align_buf, 1);
4634 * ata_data_xfer_noirq - Transfer data by PIO
4635 * @adev: device to target
4637 * @buflen: buffer length
4638 * @write_data: read/write
4640 * Transfer data from/to the device data register by PIO. Do the
4641 * transfer with interrupts disabled.
4644 * Inherited from caller.
4646 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4647 unsigned int buflen, int write_data)
4649 unsigned long flags;
4650 local_irq_save(flags);
4651 ata_data_xfer(adev, buf, buflen, write_data);
4652 local_irq_restore(flags);
4657 * ata_pio_sector - Transfer a sector of data.
4658 * @qc: Command on going
4660 * Transfer qc->sect_size bytes of data from/to the ATA device.
4663 * Inherited from caller.
4666 static void ata_pio_sector(struct ata_queued_cmd *qc)
4668 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4669 struct scatterlist *sg = qc->__sg;
4670 struct ata_port *ap = qc->ap;
4672 unsigned int offset;
4675 if (qc->curbytes == qc->nbytes - qc->sect_size)
4676 ap->hsm_task_state = HSM_ST_LAST;
4678 page = sg[qc->cursg].page;
4679 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4681 /* get the current page and offset */
4682 page = nth_page(page, (offset >> PAGE_SHIFT));
4683 offset %= PAGE_SIZE;
4685 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4687 if (PageHighMem(page)) {
4688 unsigned long flags;
4690 /* FIXME: use a bounce buffer */
4691 local_irq_save(flags);
4692 buf = kmap_atomic(page, KM_IRQ0);
4694 /* do the actual data transfer */
4695 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4697 kunmap_atomic(buf, KM_IRQ0);
4698 local_irq_restore(flags);
4700 buf = page_address(page);
4701 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4704 qc->curbytes += qc->sect_size;
4705 qc->cursg_ofs += qc->sect_size;
4707 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4714 * ata_pio_sectors - Transfer one or many sectors.
4715 * @qc: Command on going
4717 * Transfer one or many sectors of data from/to the
4718 * ATA device for the DRQ request.
4721 * Inherited from caller.
4724 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4726 if (is_multi_taskfile(&qc->tf)) {
4727 /* READ/WRITE MULTIPLE */
4730 WARN_ON(qc->dev->multi_count == 0);
4732 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
4733 qc->dev->multi_count);
4739 ata_altstatus(qc->ap); /* flush */
4743 * atapi_send_cdb - Write CDB bytes to hardware
4744 * @ap: Port to which ATAPI device is attached.
4745 * @qc: Taskfile currently active
4747 * When device has indicated its readiness to accept
4748 * a CDB, this function is called. Send the CDB.
4754 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4757 DPRINTK("send cdb\n");
4758 WARN_ON(qc->dev->cdb_len < 12);
4760 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4761 ata_altstatus(ap); /* flush */
4763 switch (qc->tf.protocol) {
4764 case ATA_PROT_ATAPI:
4765 ap->hsm_task_state = HSM_ST;
4767 case ATA_PROT_ATAPI_NODATA:
4768 ap->hsm_task_state = HSM_ST_LAST;
4770 case ATA_PROT_ATAPI_DMA:
4771 ap->hsm_task_state = HSM_ST_LAST;
4772 /* initiate bmdma */
4773 ap->ops->bmdma_start(qc);
4779 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4780 * @qc: Command on going
4781 * @bytes: number of bytes
4783 * Transfer Transfer data from/to the ATAPI device.
4786 * Inherited from caller.
4790 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4792 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4793 struct scatterlist *sg = qc->__sg;
4794 struct ata_port *ap = qc->ap;
4797 unsigned int offset, count;
4799 if (qc->curbytes + bytes >= qc->nbytes)
4800 ap->hsm_task_state = HSM_ST_LAST;
4803 if (unlikely(qc->cursg >= qc->n_elem)) {
4805 * The end of qc->sg is reached and the device expects
4806 * more data to transfer. In order not to overrun qc->sg
4807 * and fulfill length specified in the byte count register,
4808 * - for read case, discard trailing data from the device
4809 * - for write case, padding zero data to the device
4811 u16 pad_buf[1] = { 0 };
4812 unsigned int words = bytes >> 1;
4815 if (words) /* warning if bytes > 1 */
4816 ata_dev_printk(qc->dev, KERN_WARNING,
4817 "%u bytes trailing data\n", bytes);
4819 for (i = 0; i < words; i++)
4820 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4822 ap->hsm_task_state = HSM_ST_LAST;
4826 sg = &qc->__sg[qc->cursg];
4829 offset = sg->offset + qc->cursg_ofs;
4831 /* get the current page and offset */
4832 page = nth_page(page, (offset >> PAGE_SHIFT));
4833 offset %= PAGE_SIZE;
4835 /* don't overrun current sg */
4836 count = min(sg->length - qc->cursg_ofs, bytes);
4838 /* don't cross page boundaries */
4839 count = min(count, (unsigned int)PAGE_SIZE - offset);
4841 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4843 if (PageHighMem(page)) {
4844 unsigned long flags;
4846 /* FIXME: use bounce buffer */
4847 local_irq_save(flags);
4848 buf = kmap_atomic(page, KM_IRQ0);
4850 /* do the actual data transfer */
4851 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4853 kunmap_atomic(buf, KM_IRQ0);
4854 local_irq_restore(flags);
4856 buf = page_address(page);
4857 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4861 qc->curbytes += count;
4862 qc->cursg_ofs += count;
4864 if (qc->cursg_ofs == sg->length) {
4874 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4875 * @qc: Command on going
4877 * Transfer Transfer data from/to the ATAPI device.
4880 * Inherited from caller.
4883 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4885 struct ata_port *ap = qc->ap;
4886 struct ata_device *dev = qc->dev;
4887 unsigned int ireason, bc_lo, bc_hi, bytes;
4888 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4890 /* Abuse qc->result_tf for temp storage of intermediate TF
4891 * here to save some kernel stack usage.
4892 * For normal completion, qc->result_tf is not relevant. For
4893 * error, qc->result_tf is later overwritten by ata_qc_complete().
4894 * So, the correctness of qc->result_tf is not affected.
4896 ap->ops->tf_read(ap, &qc->result_tf);
4897 ireason = qc->result_tf.nsect;
4898 bc_lo = qc->result_tf.lbam;
4899 bc_hi = qc->result_tf.lbah;
4900 bytes = (bc_hi << 8) | bc_lo;
4902 /* shall be cleared to zero, indicating xfer of data */
4903 if (ireason & (1 << 0))
4906 /* make sure transfer direction matches expected */
4907 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4908 if (do_write != i_write)
4911 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
4913 __atapi_pio_bytes(qc, bytes);
4914 ata_altstatus(ap); /* flush */
4919 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4920 qc->err_mask |= AC_ERR_HSM;
4921 ap->hsm_task_state = HSM_ST_ERR;
4925 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4926 * @ap: the target ata_port
4930 * 1 if ok in workqueue, 0 otherwise.
4933 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4935 if (qc->tf.flags & ATA_TFLAG_POLLING)
4938 if (ap->hsm_task_state == HSM_ST_FIRST) {
4939 if (qc->tf.protocol == ATA_PROT_PIO &&
4940 (qc->tf.flags & ATA_TFLAG_WRITE))
4943 if (is_atapi_taskfile(&qc->tf) &&
4944 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4952 * ata_hsm_qc_complete - finish a qc running on standard HSM
4953 * @qc: Command to complete
4954 * @in_wq: 1 if called from workqueue, 0 otherwise
4956 * Finish @qc which is running on standard HSM.
4959 * If @in_wq is zero, spin_lock_irqsave(host lock).
4960 * Otherwise, none on entry and grabs host lock.
4962 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4964 struct ata_port *ap = qc->ap;
4965 unsigned long flags;
4967 if (ap->ops->error_handler) {
4969 spin_lock_irqsave(ap->lock, flags);
4971 /* EH might have kicked in while host lock is
4974 qc = ata_qc_from_tag(ap, qc->tag);
4976 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4977 ap->ops->irq_on(ap);
4978 ata_qc_complete(qc);
4980 ata_port_freeze(ap);
4983 spin_unlock_irqrestore(ap->lock, flags);
4985 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4986 ata_qc_complete(qc);
4988 ata_port_freeze(ap);
4992 spin_lock_irqsave(ap->lock, flags);
4993 ap->ops->irq_on(ap);
4994 ata_qc_complete(qc);
4995 spin_unlock_irqrestore(ap->lock, flags);
4997 ata_qc_complete(qc);
5002 * ata_hsm_move - move the HSM to the next state.
5003 * @ap: the target ata_port
5005 * @status: current device status
5006 * @in_wq: 1 if called from workqueue, 0 otherwise
5009 * 1 when poll next status needed, 0 otherwise.
5011 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
5012 u8 status, int in_wq)
5014 unsigned long flags = 0;
5017 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
5019 /* Make sure ata_qc_issue_prot() does not throw things
5020 * like DMA polling into the workqueue. Notice that
5021 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
5023 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
5026 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
5027 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
5029 switch (ap->hsm_task_state) {
5031 /* Send first data block or PACKET CDB */
5033 /* If polling, we will stay in the work queue after
5034 * sending the data. Otherwise, interrupt handler
5035 * takes over after sending the data.
5037 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
5039 /* check device status */
5040 if (unlikely((status & ATA_DRQ) == 0)) {
5041 /* handle BSY=0, DRQ=0 as error */
5042 if (likely(status & (ATA_ERR | ATA_DF)))
5043 /* device stops HSM for abort/error */
5044 qc->err_mask |= AC_ERR_DEV;
5046 /* HSM violation. Let EH handle this */
5047 qc->err_mask |= AC_ERR_HSM;
5049 ap->hsm_task_state = HSM_ST_ERR;
5053 /* Device should not ask for data transfer (DRQ=1)
5054 * when it finds something wrong.
5055 * We ignore DRQ here and stop the HSM by
5056 * changing hsm_task_state to HSM_ST_ERR and
5057 * let the EH abort the command or reset the device.
5059 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5060 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
5061 "error, dev_stat 0x%X\n", status);
5062 qc->err_mask |= AC_ERR_HSM;
5063 ap->hsm_task_state = HSM_ST_ERR;
5067 /* Send the CDB (atapi) or the first data block (ata pio out).
5068 * During the state transition, interrupt handler shouldn't
5069 * be invoked before the data transfer is complete and
5070 * hsm_task_state is changed. Hence, the following locking.
5073 spin_lock_irqsave(ap->lock, flags);
5075 if (qc->tf.protocol == ATA_PROT_PIO) {
5076 /* PIO data out protocol.
5077 * send first data block.
5080 /* ata_pio_sectors() might change the state
5081 * to HSM_ST_LAST. so, the state is changed here
5082 * before ata_pio_sectors().
5084 ap->hsm_task_state = HSM_ST;
5085 ata_pio_sectors(qc);
5088 atapi_send_cdb(ap, qc);
5091 spin_unlock_irqrestore(ap->lock, flags);
5093 /* if polling, ata_pio_task() handles the rest.
5094 * otherwise, interrupt handler takes over from here.
5099 /* complete command or read/write the data register */
5100 if (qc->tf.protocol == ATA_PROT_ATAPI) {
5101 /* ATAPI PIO protocol */
5102 if ((status & ATA_DRQ) == 0) {
5103 /* No more data to transfer or device error.
5104 * Device error will be tagged in HSM_ST_LAST.
5106 ap->hsm_task_state = HSM_ST_LAST;
5110 /* Device should not ask for data transfer (DRQ=1)
5111 * when it finds something wrong.
5112 * We ignore DRQ here and stop the HSM by
5113 * changing hsm_task_state to HSM_ST_ERR and
5114 * let the EH abort the command or reset the device.
5116 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5117 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
5118 "device error, dev_stat 0x%X\n",
5120 qc->err_mask |= AC_ERR_HSM;
5121 ap->hsm_task_state = HSM_ST_ERR;
5125 atapi_pio_bytes(qc);
5127 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
5128 /* bad ireason reported by device */
5132 /* ATA PIO protocol */
5133 if (unlikely((status & ATA_DRQ) == 0)) {
5134 /* handle BSY=0, DRQ=0 as error */
5135 if (likely(status & (ATA_ERR | ATA_DF)))
5136 /* device stops HSM for abort/error */
5137 qc->err_mask |= AC_ERR_DEV;
5139 /* HSM violation. Let EH handle this.
5140 * Phantom devices also trigger this
5141 * condition. Mark hint.
5143 qc->err_mask |= AC_ERR_HSM |
5146 ap->hsm_task_state = HSM_ST_ERR;
5150 /* For PIO reads, some devices may ask for
5151 * data transfer (DRQ=1) alone with ERR=1.
5152 * We respect DRQ here and transfer one
5153 * block of junk data before changing the
5154 * hsm_task_state to HSM_ST_ERR.
5156 * For PIO writes, ERR=1 DRQ=1 doesn't make
5157 * sense since the data block has been
5158 * transferred to the device.
5160 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5161 /* data might be corrputed */
5162 qc->err_mask |= AC_ERR_DEV;
5164 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
5165 ata_pio_sectors(qc);
5166 status = ata_wait_idle(ap);
5169 if (status & (ATA_BUSY | ATA_DRQ))
5170 qc->err_mask |= AC_ERR_HSM;
5172 /* ata_pio_sectors() might change the
5173 * state to HSM_ST_LAST. so, the state
5174 * is changed after ata_pio_sectors().
5176 ap->hsm_task_state = HSM_ST_ERR;
5180 ata_pio_sectors(qc);
5182 if (ap->hsm_task_state == HSM_ST_LAST &&
5183 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5185 status = ata_wait_idle(ap);
5194 if (unlikely(!ata_ok(status))) {
5195 qc->err_mask |= __ac_err_mask(status);
5196 ap->hsm_task_state = HSM_ST_ERR;
5200 /* no more data to transfer */
5201 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5202 ap->print_id, qc->dev->devno, status);
5204 WARN_ON(qc->err_mask);
5206 ap->hsm_task_state = HSM_ST_IDLE;
5208 /* complete taskfile transaction */
5209 ata_hsm_qc_complete(qc, in_wq);
5215 /* make sure qc->err_mask is available to
5216 * know what's wrong and recover
5218 WARN_ON(qc->err_mask == 0);
5220 ap->hsm_task_state = HSM_ST_IDLE;
5222 /* complete taskfile transaction */
5223 ata_hsm_qc_complete(qc, in_wq);
5235 static void ata_pio_task(struct work_struct *work)
5237 struct ata_port *ap =
5238 container_of(work, struct ata_port, port_task.work);
5239 struct ata_queued_cmd *qc = ap->port_task_data;
5244 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5247 * This is purely heuristic. This is a fast path.
5248 * Sometimes when we enter, BSY will be cleared in
5249 * a chk-status or two. If not, the drive is probably seeking
5250 * or something. Snooze for a couple msecs, then
5251 * chk-status again. If still busy, queue delayed work.
5253 status = ata_busy_wait(ap, ATA_BUSY, 5);
5254 if (status & ATA_BUSY) {
5256 status = ata_busy_wait(ap, ATA_BUSY, 10);
5257 if (status & ATA_BUSY) {
5258 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
5264 poll_next = ata_hsm_move(ap, qc, status, 1);
5266 /* another command or interrupt handler
5267 * may be running at this point.
5274 * ata_qc_new - Request an available ATA command, for queueing
5275 * @ap: Port associated with device @dev
5276 * @dev: Device from whom we request an available command structure
5282 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5284 struct ata_queued_cmd *qc = NULL;
5287 /* no command while frozen */
5288 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5291 /* the last tag is reserved for internal command. */
5292 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5293 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5294 qc = __ata_qc_from_tag(ap, i);
5305 * ata_qc_new_init - Request an available ATA command, and initialize it
5306 * @dev: Device from whom we request an available command structure
5312 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5314 struct ata_port *ap = dev->link->ap;
5315 struct ata_queued_cmd *qc;
5317 qc = ata_qc_new(ap);
5330 * ata_qc_free - free unused ata_queued_cmd
5331 * @qc: Command to complete
5333 * Designed to free unused ata_queued_cmd object
5334 * in case something prevents using it.
5337 * spin_lock_irqsave(host lock)
5339 void ata_qc_free(struct ata_queued_cmd *qc)
5341 struct ata_port *ap = qc->ap;
5344 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5348 if (likely(ata_tag_valid(tag))) {
5349 qc->tag = ATA_TAG_POISON;
5350 clear_bit(tag, &ap->qc_allocated);
5354 void __ata_qc_complete(struct ata_queued_cmd *qc)
5356 struct ata_port *ap = qc->ap;
5357 struct ata_link *link = qc->dev->link;
5359 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5360 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5362 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5365 /* command should be marked inactive atomically with qc completion */
5366 if (qc->tf.protocol == ATA_PROT_NCQ)
5367 link->sactive &= ~(1 << qc->tag);
5369 link->active_tag = ATA_TAG_POISON;
5371 /* atapi: mark qc as inactive to prevent the interrupt handler
5372 * from completing the command twice later, before the error handler
5373 * is called. (when rc != 0 and atapi request sense is needed)
5375 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5376 ap->qc_active &= ~(1 << qc->tag);
5378 /* call completion callback */
5379 qc->complete_fn(qc);
5382 static void fill_result_tf(struct ata_queued_cmd *qc)
5384 struct ata_port *ap = qc->ap;
5386 qc->result_tf.flags = qc->tf.flags;
5387 ap->ops->tf_read(ap, &qc->result_tf);
5391 * ata_qc_complete - Complete an active ATA command
5392 * @qc: Command to complete
5393 * @err_mask: ATA Status register contents
5395 * Indicate to the mid and upper layers that an ATA
5396 * command has completed, with either an ok or not-ok status.
5399 * spin_lock_irqsave(host lock)
5401 void ata_qc_complete(struct ata_queued_cmd *qc)
5403 struct ata_port *ap = qc->ap;
5405 /* XXX: New EH and old EH use different mechanisms to
5406 * synchronize EH with regular execution path.
5408 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5409 * Normal execution path is responsible for not accessing a
5410 * failed qc. libata core enforces the rule by returning NULL
5411 * from ata_qc_from_tag() for failed qcs.
5413 * Old EH depends on ata_qc_complete() nullifying completion
5414 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5415 * not synchronize with interrupt handler. Only PIO task is
5418 if (ap->ops->error_handler) {
5419 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5421 if (unlikely(qc->err_mask))
5422 qc->flags |= ATA_QCFLAG_FAILED;
5424 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5425 if (!ata_tag_internal(qc->tag)) {
5426 /* always fill result TF for failed qc */
5428 ata_qc_schedule_eh(qc);
5433 /* read result TF if requested */
5434 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5437 __ata_qc_complete(qc);
5439 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5442 /* read result TF if failed or requested */
5443 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5446 __ata_qc_complete(qc);
5451 * ata_qc_complete_multiple - Complete multiple qcs successfully
5452 * @ap: port in question
5453 * @qc_active: new qc_active mask
5454 * @finish_qc: LLDD callback invoked before completing a qc
5456 * Complete in-flight commands. This functions is meant to be
5457 * called from low-level driver's interrupt routine to complete
5458 * requests normally. ap->qc_active and @qc_active is compared
5459 * and commands are completed accordingly.
5462 * spin_lock_irqsave(host lock)
5465 * Number of completed commands on success, -errno otherwise.
5467 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
5468 void (*finish_qc)(struct ata_queued_cmd *))
5474 done_mask = ap->qc_active ^ qc_active;
5476 if (unlikely(done_mask & qc_active)) {
5477 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
5478 "(%08x->%08x)\n", ap->qc_active, qc_active);
5482 for (i = 0; i < ATA_MAX_QUEUE; i++) {
5483 struct ata_queued_cmd *qc;
5485 if (!(done_mask & (1 << i)))
5488 if ((qc = ata_qc_from_tag(ap, i))) {
5491 ata_qc_complete(qc);
5499 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
5501 struct ata_port *ap = qc->ap;
5503 switch (qc->tf.protocol) {
5506 case ATA_PROT_ATAPI_DMA:
5509 case ATA_PROT_ATAPI:
5511 if (ap->flags & ATA_FLAG_PIO_DMA)
5524 * ata_qc_issue - issue taskfile to device
5525 * @qc: command to issue to device
5527 * Prepare an ATA command to submission to device.
5528 * This includes mapping the data into a DMA-able
5529 * area, filling in the S/G table, and finally
5530 * writing the taskfile to hardware, starting the command.
5533 * spin_lock_irqsave(host lock)
5535 void ata_qc_issue(struct ata_queued_cmd *qc)
5537 struct ata_port *ap = qc->ap;
5538 struct ata_link *link = qc->dev->link;
5540 /* Make sure only one non-NCQ command is outstanding. The
5541 * check is skipped for old EH because it reuses active qc to
5542 * request ATAPI sense.
5544 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
5546 if (qc->tf.protocol == ATA_PROT_NCQ) {
5547 WARN_ON(link->sactive & (1 << qc->tag));
5548 link->sactive |= 1 << qc->tag;
5550 WARN_ON(link->sactive);
5551 link->active_tag = qc->tag;
5554 qc->flags |= ATA_QCFLAG_ACTIVE;
5555 ap->qc_active |= 1 << qc->tag;
5557 if (ata_should_dma_map(qc)) {
5558 if (qc->flags & ATA_QCFLAG_SG) {
5559 if (ata_sg_setup(qc))
5561 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
5562 if (ata_sg_setup_one(qc))
5566 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5569 ap->ops->qc_prep(qc);
5571 qc->err_mask |= ap->ops->qc_issue(qc);
5572 if (unlikely(qc->err_mask))
5577 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5578 qc->err_mask |= AC_ERR_SYSTEM;
5580 ata_qc_complete(qc);
5584 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
5585 * @qc: command to issue to device
5587 * Using various libata functions and hooks, this function
5588 * starts an ATA command. ATA commands are grouped into
5589 * classes called "protocols", and issuing each type of protocol
5590 * is slightly different.
5592 * May be used as the qc_issue() entry in ata_port_operations.
5595 * spin_lock_irqsave(host lock)
5598 * Zero on success, AC_ERR_* mask on failure
5601 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
5603 struct ata_port *ap = qc->ap;
5605 /* Use polling pio if the LLD doesn't handle
5606 * interrupt driven pio and atapi CDB interrupt.
5608 if (ap->flags & ATA_FLAG_PIO_POLLING) {
5609 switch (qc->tf.protocol) {
5611 case ATA_PROT_NODATA:
5612 case ATA_PROT_ATAPI:
5613 case ATA_PROT_ATAPI_NODATA:
5614 qc->tf.flags |= ATA_TFLAG_POLLING;
5616 case ATA_PROT_ATAPI_DMA:
5617 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
5618 /* see ata_dma_blacklisted() */
5626 /* select the device */
5627 ata_dev_select(ap, qc->dev->devno, 1, 0);
5629 /* start the command */
5630 switch (qc->tf.protocol) {
5631 case ATA_PROT_NODATA:
5632 if (qc->tf.flags & ATA_TFLAG_POLLING)
5633 ata_qc_set_polling(qc);
5635 ata_tf_to_host(ap, &qc->tf);
5636 ap->hsm_task_state = HSM_ST_LAST;
5638 if (qc->tf.flags & ATA_TFLAG_POLLING)
5639 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5644 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5646 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5647 ap->ops->bmdma_setup(qc); /* set up bmdma */
5648 ap->ops->bmdma_start(qc); /* initiate bmdma */
5649 ap->hsm_task_state = HSM_ST_LAST;
5653 if (qc->tf.flags & ATA_TFLAG_POLLING)
5654 ata_qc_set_polling(qc);
5656 ata_tf_to_host(ap, &qc->tf);
5658 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5659 /* PIO data out protocol */
5660 ap->hsm_task_state = HSM_ST_FIRST;
5661 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5663 /* always send first data block using
5664 * the ata_pio_task() codepath.
5667 /* PIO data in protocol */
5668 ap->hsm_task_state = HSM_ST;
5670 if (qc->tf.flags & ATA_TFLAG_POLLING)
5671 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5673 /* if polling, ata_pio_task() handles the rest.
5674 * otherwise, interrupt handler takes over from here.
5680 case ATA_PROT_ATAPI:
5681 case ATA_PROT_ATAPI_NODATA:
5682 if (qc->tf.flags & ATA_TFLAG_POLLING)
5683 ata_qc_set_polling(qc);
5685 ata_tf_to_host(ap, &qc->tf);
5687 ap->hsm_task_state = HSM_ST_FIRST;
5689 /* send cdb by polling if no cdb interrupt */
5690 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5691 (qc->tf.flags & ATA_TFLAG_POLLING))
5692 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5695 case ATA_PROT_ATAPI_DMA:
5696 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5698 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5699 ap->ops->bmdma_setup(qc); /* set up bmdma */
5700 ap->hsm_task_state = HSM_ST_FIRST;
5702 /* send cdb by polling if no cdb interrupt */
5703 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5704 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5709 return AC_ERR_SYSTEM;
5716 * ata_host_intr - Handle host interrupt for given (port, task)
5717 * @ap: Port on which interrupt arrived (possibly...)
5718 * @qc: Taskfile currently active in engine
5720 * Handle host interrupt for given queued command. Currently,
5721 * only DMA interrupts are handled. All other commands are
5722 * handled via polling with interrupts disabled (nIEN bit).
5725 * spin_lock_irqsave(host lock)
5728 * One if interrupt was handled, zero if not (shared irq).
5731 inline unsigned int ata_host_intr (struct ata_port *ap,
5732 struct ata_queued_cmd *qc)
5734 struct ata_eh_info *ehi = &ap->link.eh_info;
5735 u8 status, host_stat = 0;
5737 VPRINTK("ata%u: protocol %d task_state %d\n",
5738 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
5740 /* Check whether we are expecting interrupt in this state */
5741 switch (ap->hsm_task_state) {
5743 /* Some pre-ATAPI-4 devices assert INTRQ
5744 * at this state when ready to receive CDB.
5747 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5748 * The flag was turned on only for atapi devices.
5749 * No need to check is_atapi_taskfile(&qc->tf) again.
5751 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5755 if (qc->tf.protocol == ATA_PROT_DMA ||
5756 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5757 /* check status of DMA engine */
5758 host_stat = ap->ops->bmdma_status(ap);
5759 VPRINTK("ata%u: host_stat 0x%X\n",
5760 ap->print_id, host_stat);
5762 /* if it's not our irq... */
5763 if (!(host_stat & ATA_DMA_INTR))
5766 /* before we do anything else, clear DMA-Start bit */
5767 ap->ops->bmdma_stop(qc);
5769 if (unlikely(host_stat & ATA_DMA_ERR)) {
5770 /* error when transfering data to/from memory */
5771 qc->err_mask |= AC_ERR_HOST_BUS;
5772 ap->hsm_task_state = HSM_ST_ERR;
5782 /* check altstatus */
5783 status = ata_altstatus(ap);
5784 if (status & ATA_BUSY)
5787 /* check main status, clearing INTRQ */
5788 status = ata_chk_status(ap);
5789 if (unlikely(status & ATA_BUSY))
5792 /* ack bmdma irq events */
5793 ap->ops->irq_clear(ap);
5795 ata_hsm_move(ap, qc, status, 0);
5797 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5798 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5799 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5801 return 1; /* irq handled */
5804 ap->stats.idle_irq++;
5807 if ((ap->stats.idle_irq % 1000) == 0) {
5809 ap->ops->irq_clear(ap);
5810 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5814 return 0; /* irq not handled */
5818 * ata_interrupt - Default ATA host interrupt handler
5819 * @irq: irq line (unused)
5820 * @dev_instance: pointer to our ata_host information structure
5822 * Default interrupt handler for PCI IDE devices. Calls
5823 * ata_host_intr() for each port that is not disabled.
5826 * Obtains host lock during operation.
5829 * IRQ_NONE or IRQ_HANDLED.
5832 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5834 struct ata_host *host = dev_instance;
5836 unsigned int handled = 0;
5837 unsigned long flags;
5839 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5840 spin_lock_irqsave(&host->lock, flags);
5842 for (i = 0; i < host->n_ports; i++) {
5843 struct ata_port *ap;
5845 ap = host->ports[i];
5847 !(ap->flags & ATA_FLAG_DISABLED)) {
5848 struct ata_queued_cmd *qc;
5850 qc = ata_qc_from_tag(ap, ap->link.active_tag);
5851 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5852 (qc->flags & ATA_QCFLAG_ACTIVE))
5853 handled |= ata_host_intr(ap, qc);
5857 spin_unlock_irqrestore(&host->lock, flags);
5859 return IRQ_RETVAL(handled);
5863 * sata_scr_valid - test whether SCRs are accessible
5864 * @link: ATA link to test SCR accessibility for
5866 * Test whether SCRs are accessible for @link.
5872 * 1 if SCRs are accessible, 0 otherwise.
5874 int sata_scr_valid(struct ata_link *link)
5876 struct ata_port *ap = link->ap;
5878 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
5882 * sata_scr_read - read SCR register of the specified port
5883 * @link: ATA link to read SCR for
5885 * @val: Place to store read value
5887 * Read SCR register @reg of @link into *@val. This function is
5888 * guaranteed to succeed if the cable type of the port is SATA
5889 * and the port implements ->scr_read.
5895 * 0 on success, negative errno on failure.
5897 int sata_scr_read(struct ata_link *link, int reg, u32 *val)
5899 struct ata_port *ap = link->ap;
5901 if (sata_scr_valid(link))
5902 return ap->ops->scr_read(ap, reg, val);
5907 * sata_scr_write - write SCR register of the specified port
5908 * @link: ATA link to write SCR for
5909 * @reg: SCR to write
5910 * @val: value to write
5912 * Write @val to SCR register @reg of @link. This function is
5913 * guaranteed to succeed if the cable type of the port is SATA
5914 * and the port implements ->scr_read.
5920 * 0 on success, negative errno on failure.
5922 int sata_scr_write(struct ata_link *link, int reg, u32 val)
5924 struct ata_port *ap = link->ap;
5926 if (sata_scr_valid(link))
5927 return ap->ops->scr_write(ap, reg, val);
5932 * sata_scr_write_flush - write SCR register of the specified port and flush
5933 * @link: ATA link to write SCR for
5934 * @reg: SCR to write
5935 * @val: value to write
5937 * This function is identical to sata_scr_write() except that this
5938 * function performs flush after writing to the register.
5944 * 0 on success, negative errno on failure.
5946 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
5948 struct ata_port *ap = link->ap;
5951 if (sata_scr_valid(link)) {
5952 rc = ap->ops->scr_write(ap, reg, val);
5954 rc = ap->ops->scr_read(ap, reg, &val);
5961 * ata_link_online - test whether the given link is online
5962 * @link: ATA link to test
5964 * Test whether @link is online. Note that this function returns
5965 * 0 if online status of @link cannot be obtained, so
5966 * ata_link_online(link) != !ata_link_offline(link).
5972 * 1 if the port online status is available and online.
5974 int ata_link_online(struct ata_link *link)
5978 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
5979 (sstatus & 0xf) == 0x3)
5985 * ata_link_offline - test whether the given link is offline
5986 * @link: ATA link to test
5988 * Test whether @link is offline. Note that this function
5989 * returns 0 if offline status of @link cannot be obtained, so
5990 * ata_link_online(link) != !ata_link_offline(link).
5996 * 1 if the port offline status is available and offline.
5998 int ata_link_offline(struct ata_link *link)
6002 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6003 (sstatus & 0xf) != 0x3)
6008 int ata_flush_cache(struct ata_device *dev)
6010 unsigned int err_mask;
6013 if (!ata_try_flush_cache(dev))
6016 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
6017 cmd = ATA_CMD_FLUSH_EXT;
6019 cmd = ATA_CMD_FLUSH;
6021 /* This is wrong. On a failed flush we get back the LBA of the lost
6022 sector and we should (assuming it wasn't aborted as unknown) issue
6023 a further flush command to continue the writeback until it
6025 err_mask = ata_do_simple_cmd(dev, cmd);
6027 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
6035 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
6036 unsigned int action, unsigned int ehi_flags,
6039 unsigned long flags;
6042 for (i = 0; i < host->n_ports; i++) {
6043 struct ata_port *ap = host->ports[i];
6044 struct ata_link *link;
6046 /* Previous resume operation might still be in
6047 * progress. Wait for PM_PENDING to clear.
6049 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
6050 ata_port_wait_eh(ap);
6051 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6054 /* request PM ops to EH */
6055 spin_lock_irqsave(ap->lock, flags);
6060 ap->pm_result = &rc;
6063 ap->pflags |= ATA_PFLAG_PM_PENDING;
6064 __ata_port_for_each_link(link, ap) {
6065 link->eh_info.action |= action;
6066 link->eh_info.flags |= ehi_flags;
6069 ata_port_schedule_eh(ap);
6071 spin_unlock_irqrestore(ap->lock, flags);
6073 /* wait and check result */
6075 ata_port_wait_eh(ap);
6076 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6086 * ata_host_suspend - suspend host
6087 * @host: host to suspend
6090 * Suspend @host. Actual operation is performed by EH. This
6091 * function requests EH to perform PM operations and waits for EH
6095 * Kernel thread context (may sleep).
6098 * 0 on success, -errno on failure.
6100 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
6104 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
6106 host->dev->power.power_state = mesg;
6111 * ata_host_resume - resume host
6112 * @host: host to resume
6114 * Resume @host. Actual operation is performed by EH. This
6115 * function requests EH to perform PM operations and returns.
6116 * Note that all resume operations are performed parallely.
6119 * Kernel thread context (may sleep).
6121 void ata_host_resume(struct ata_host *host)
6123 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
6124 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
6125 host->dev->power.power_state = PMSG_ON;
6130 * ata_port_start - Set port up for dma.
6131 * @ap: Port to initialize
6133 * Called just after data structures for each port are
6134 * initialized. Allocates space for PRD table.
6136 * May be used as the port_start() entry in ata_port_operations.
6139 * Inherited from caller.
6141 int ata_port_start(struct ata_port *ap)
6143 struct device *dev = ap->dev;
6146 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
6151 rc = ata_pad_alloc(ap, dev);
6155 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
6156 (unsigned long long)ap->prd_dma);
6161 * ata_dev_init - Initialize an ata_device structure
6162 * @dev: Device structure to initialize
6164 * Initialize @dev in preparation for probing.
6167 * Inherited from caller.
6169 void ata_dev_init(struct ata_device *dev)
6171 struct ata_link *link = dev->link;
6172 struct ata_port *ap = link->ap;
6173 unsigned long flags;
6175 /* SATA spd limit is bound to the first device */
6176 link->sata_spd_limit = link->hw_sata_spd_limit;
6179 /* High bits of dev->flags are used to record warm plug
6180 * requests which occur asynchronously. Synchronize using
6183 spin_lock_irqsave(ap->lock, flags);
6184 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6186 spin_unlock_irqrestore(ap->lock, flags);
6188 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6189 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6190 dev->pio_mask = UINT_MAX;
6191 dev->mwdma_mask = UINT_MAX;
6192 dev->udma_mask = UINT_MAX;
6196 * ata_link_init - Initialize an ata_link structure
6197 * @ap: ATA port link is attached to
6198 * @link: Link structure to initialize
6199 * @pmp: Port multiplier port number
6204 * Kernel thread context (may sleep)
6206 static void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
6210 /* clear everything except for devices */
6211 memset(link, 0, offsetof(struct ata_link, device[0]));
6215 link->active_tag = ATA_TAG_POISON;
6216 link->hw_sata_spd_limit = UINT_MAX;
6218 /* can't use iterator, ap isn't initialized yet */
6219 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6220 struct ata_device *dev = &link->device[i];
6223 dev->devno = dev - link->device;
6229 * sata_link_init_spd - Initialize link->sata_spd_limit
6230 * @link: Link to configure sata_spd_limit for
6232 * Initialize @link->[hw_]sata_spd_limit to the currently
6236 * Kernel thread context (may sleep).
6239 * 0 on success, -errno on failure.
6241 static int sata_link_init_spd(struct ata_link *link)
6246 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
6250 spd = (scontrol >> 4) & 0xf;
6252 link->hw_sata_spd_limit &= (1 << spd) - 1;
6254 link->sata_spd_limit = link->hw_sata_spd_limit;
6260 * ata_port_alloc - allocate and initialize basic ATA port resources
6261 * @host: ATA host this allocated port belongs to
6263 * Allocate and initialize basic ATA port resources.
6266 * Allocate ATA port on success, NULL on failure.
6269 * Inherited from calling layer (may sleep).
6271 struct ata_port *ata_port_alloc(struct ata_host *host)
6273 struct ata_port *ap;
6277 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6281 ap->pflags |= ATA_PFLAG_INITIALIZING;
6282 ap->lock = &host->lock;
6283 ap->flags = ATA_FLAG_DISABLED;
6285 ap->ctl = ATA_DEVCTL_OBS;
6287 ap->dev = host->dev;
6288 ap->last_ctl = 0xFF;
6290 #if defined(ATA_VERBOSE_DEBUG)
6291 /* turn on all debugging levels */
6292 ap->msg_enable = 0x00FF;
6293 #elif defined(ATA_DEBUG)
6294 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6296 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6299 INIT_DELAYED_WORK(&ap->port_task, NULL);
6300 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6301 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6302 INIT_LIST_HEAD(&ap->eh_done_q);
6303 init_waitqueue_head(&ap->eh_wait_q);
6304 init_timer_deferrable(&ap->fastdrain_timer);
6305 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6306 ap->fastdrain_timer.data = (unsigned long)ap;
6308 ap->cbl = ATA_CBL_NONE;
6310 ata_link_init(ap, &ap->link, 0);
6313 ap->stats.unhandled_irq = 1;
6314 ap->stats.idle_irq = 1;
6319 static void ata_host_release(struct device *gendev, void *res)
6321 struct ata_host *host = dev_get_drvdata(gendev);
6324 for (i = 0; i < host->n_ports; i++) {
6325 struct ata_port *ap = host->ports[i];
6330 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop)
6331 ap->ops->port_stop(ap);
6334 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop)
6335 host->ops->host_stop(host);
6337 for (i = 0; i < host->n_ports; i++) {
6338 struct ata_port *ap = host->ports[i];
6344 scsi_host_put(ap->scsi_host);
6347 host->ports[i] = NULL;
6350 dev_set_drvdata(gendev, NULL);
6354 * ata_host_alloc - allocate and init basic ATA host resources
6355 * @dev: generic device this host is associated with
6356 * @max_ports: maximum number of ATA ports associated with this host
6358 * Allocate and initialize basic ATA host resources. LLD calls
6359 * this function to allocate a host, initializes it fully and
6360 * attaches it using ata_host_register().
6362 * @max_ports ports are allocated and host->n_ports is
6363 * initialized to @max_ports. The caller is allowed to decrease
6364 * host->n_ports before calling ata_host_register(). The unused
6365 * ports will be automatically freed on registration.
6368 * Allocate ATA host on success, NULL on failure.
6371 * Inherited from calling layer (may sleep).
6373 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6375 struct ata_host *host;
6381 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6384 /* alloc a container for our list of ATA ports (buses) */
6385 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6386 /* alloc a container for our list of ATA ports (buses) */
6387 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6391 devres_add(dev, host);
6392 dev_set_drvdata(dev, host);
6394 spin_lock_init(&host->lock);
6396 host->n_ports = max_ports;
6398 /* allocate ports bound to this host */
6399 for (i = 0; i < max_ports; i++) {
6400 struct ata_port *ap;
6402 ap = ata_port_alloc(host);
6407 host->ports[i] = ap;
6410 devres_remove_group(dev, NULL);
6414 devres_release_group(dev, NULL);
6419 * ata_host_alloc_pinfo - alloc host and init with port_info array
6420 * @dev: generic device this host is associated with
6421 * @ppi: array of ATA port_info to initialize host with
6422 * @n_ports: number of ATA ports attached to this host
6424 * Allocate ATA host and initialize with info from @ppi. If NULL
6425 * terminated, @ppi may contain fewer entries than @n_ports. The
6426 * last entry will be used for the remaining ports.
6429 * Allocate ATA host on success, NULL on failure.
6432 * Inherited from calling layer (may sleep).
6434 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6435 const struct ata_port_info * const * ppi,
6438 const struct ata_port_info *pi;
6439 struct ata_host *host;
6442 host = ata_host_alloc(dev, n_ports);
6446 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6447 struct ata_port *ap = host->ports[i];
6452 ap->pio_mask = pi->pio_mask;
6453 ap->mwdma_mask = pi->mwdma_mask;
6454 ap->udma_mask = pi->udma_mask;
6455 ap->flags |= pi->flags;
6456 ap->link.flags |= pi->link_flags;
6457 ap->ops = pi->port_ops;
6459 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6460 host->ops = pi->port_ops;
6461 if (!host->private_data && pi->private_data)
6462 host->private_data = pi->private_data;
6469 * ata_host_start - start and freeze ports of an ATA host
6470 * @host: ATA host to start ports for
6472 * Start and then freeze ports of @host. Started status is
6473 * recorded in host->flags, so this function can be called
6474 * multiple times. Ports are guaranteed to get started only
6475 * once. If host->ops isn't initialized yet, its set to the
6476 * first non-dummy port ops.
6479 * Inherited from calling layer (may sleep).
6482 * 0 if all ports are started successfully, -errno otherwise.
6484 int ata_host_start(struct ata_host *host)
6488 if (host->flags & ATA_HOST_STARTED)
6491 for (i = 0; i < host->n_ports; i++) {
6492 struct ata_port *ap = host->ports[i];
6494 if (!host->ops && !ata_port_is_dummy(ap))
6495 host->ops = ap->ops;
6497 if (ap->ops->port_start) {
6498 rc = ap->ops->port_start(ap);
6500 ata_port_printk(ap, KERN_ERR, "failed to "
6501 "start port (errno=%d)\n", rc);
6506 ata_eh_freeze_port(ap);
6509 host->flags |= ATA_HOST_STARTED;
6514 struct ata_port *ap = host->ports[i];
6516 if (ap->ops->port_stop)
6517 ap->ops->port_stop(ap);
6523 * ata_sas_host_init - Initialize a host struct
6524 * @host: host to initialize
6525 * @dev: device host is attached to
6526 * @flags: host flags
6530 * PCI/etc. bus probe sem.
6533 /* KILLME - the only user left is ipr */
6534 void ata_host_init(struct ata_host *host, struct device *dev,
6535 unsigned long flags, const struct ata_port_operations *ops)
6537 spin_lock_init(&host->lock);
6539 host->flags = flags;
6544 * ata_host_register - register initialized ATA host
6545 * @host: ATA host to register
6546 * @sht: template for SCSI host
6548 * Register initialized ATA host. @host is allocated using
6549 * ata_host_alloc() and fully initialized by LLD. This function
6550 * starts ports, registers @host with ATA and SCSI layers and
6551 * probe registered devices.
6554 * Inherited from calling layer (may sleep).
6557 * 0 on success, -errno otherwise.
6559 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6563 /* host must have been started */
6564 if (!(host->flags & ATA_HOST_STARTED)) {
6565 dev_printk(KERN_ERR, host->dev,
6566 "BUG: trying to register unstarted host\n");
6571 /* Blow away unused ports. This happens when LLD can't
6572 * determine the exact number of ports to allocate at
6575 for (i = host->n_ports; host->ports[i]; i++)
6576 kfree(host->ports[i]);
6578 /* give ports names and add SCSI hosts */
6579 for (i = 0; i < host->n_ports; i++)
6580 host->ports[i]->print_id = ata_print_id++;
6582 rc = ata_scsi_add_hosts(host, sht);
6586 /* associate with ACPI nodes */
6587 ata_acpi_associate(host);
6589 /* set cable, sata_spd_limit and report */
6590 for (i = 0; i < host->n_ports; i++) {
6591 struct ata_port *ap = host->ports[i];
6592 unsigned long xfer_mask;
6594 /* set SATA cable type if still unset */
6595 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6596 ap->cbl = ATA_CBL_SATA;
6598 /* init sata_spd_limit to the current value */
6599 sata_link_init_spd(&ap->link);
6601 /* print per-port info to dmesg */
6602 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6605 if (!ata_port_is_dummy(ap))
6606 ata_port_printk(ap, KERN_INFO,
6607 "%cATA max %s %s\n",
6608 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6609 ata_mode_string(xfer_mask),
6610 ap->link.eh_info.desc);
6612 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
6615 /* perform each probe synchronously */
6616 DPRINTK("probe begin\n");
6617 for (i = 0; i < host->n_ports; i++) {
6618 struct ata_port *ap = host->ports[i];
6622 if (ap->ops->error_handler) {
6623 struct ata_eh_info *ehi = &ap->link.eh_info;
6624 unsigned long flags;
6628 /* kick EH for boot probing */
6629 spin_lock_irqsave(ap->lock, flags);
6632 (1 << ata_link_max_devices(&ap->link)) - 1;
6633 ehi->action |= ATA_EH_SOFTRESET;
6634 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
6636 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
6637 ap->pflags |= ATA_PFLAG_LOADING;
6638 ata_port_schedule_eh(ap);
6640 spin_unlock_irqrestore(ap->lock, flags);
6642 /* wait for EH to finish */
6643 ata_port_wait_eh(ap);
6645 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6646 rc = ata_bus_probe(ap);
6647 DPRINTK("ata%u: bus probe end\n", ap->print_id);
6650 /* FIXME: do something useful here?
6651 * Current libata behavior will
6652 * tear down everything when
6653 * the module is removed
6654 * or the h/w is unplugged.
6660 /* probes are done, now scan each port's disk(s) */
6661 DPRINTK("host probe begin\n");
6662 for (i = 0; i < host->n_ports; i++) {
6663 struct ata_port *ap = host->ports[i];
6665 ata_scsi_scan_host(ap, 1);
6672 * ata_host_activate - start host, request IRQ and register it
6673 * @host: target ATA host
6674 * @irq: IRQ to request
6675 * @irq_handler: irq_handler used when requesting IRQ
6676 * @irq_flags: irq_flags used when requesting IRQ
6677 * @sht: scsi_host_template to use when registering the host
6679 * After allocating an ATA host and initializing it, most libata
6680 * LLDs perform three steps to activate the host - start host,
6681 * request IRQ and register it. This helper takes necessasry
6682 * arguments and performs the three steps in one go.
6685 * Inherited from calling layer (may sleep).
6688 * 0 on success, -errno otherwise.
6690 int ata_host_activate(struct ata_host *host, int irq,
6691 irq_handler_t irq_handler, unsigned long irq_flags,
6692 struct scsi_host_template *sht)
6696 rc = ata_host_start(host);
6700 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6701 dev_driver_string(host->dev), host);
6705 for (i = 0; i < host->n_ports; i++)
6706 ata_port_desc(host->ports[i], "irq %d", irq);
6708 rc = ata_host_register(host, sht);
6709 /* if failed, just free the IRQ and leave ports alone */
6711 devm_free_irq(host->dev, irq, host);
6717 * ata_port_detach - Detach ATA port in prepration of device removal
6718 * @ap: ATA port to be detached
6720 * Detach all ATA devices and the associated SCSI devices of @ap;
6721 * then, remove the associated SCSI host. @ap is guaranteed to
6722 * be quiescent on return from this function.
6725 * Kernel thread context (may sleep).
6727 void ata_port_detach(struct ata_port *ap)
6729 unsigned long flags;
6730 struct ata_link *link;
6731 struct ata_device *dev;
6733 if (!ap->ops->error_handler)
6736 /* tell EH we're leaving & flush EH */
6737 spin_lock_irqsave(ap->lock, flags);
6738 ap->pflags |= ATA_PFLAG_UNLOADING;
6739 spin_unlock_irqrestore(ap->lock, flags);
6741 ata_port_wait_eh(ap);
6743 /* EH is now guaranteed to see UNLOADING, so no new device
6744 * will be attached. Disable all existing devices.
6746 spin_lock_irqsave(ap->lock, flags);
6748 ata_port_for_each_link(link, ap) {
6749 ata_link_for_each_dev(dev, link)
6750 ata_dev_disable(dev);
6753 spin_unlock_irqrestore(ap->lock, flags);
6755 /* Final freeze & EH. All in-flight commands are aborted. EH
6756 * will be skipped and retrials will be terminated with bad
6759 spin_lock_irqsave(ap->lock, flags);
6760 ata_port_freeze(ap); /* won't be thawed */
6761 spin_unlock_irqrestore(ap->lock, flags);
6763 ata_port_wait_eh(ap);
6764 cancel_rearming_delayed_work(&ap->hotplug_task);
6767 /* remove the associated SCSI host */
6768 scsi_remove_host(ap->scsi_host);
6772 * ata_host_detach - Detach all ports of an ATA host
6773 * @host: Host to detach
6775 * Detach all ports of @host.
6778 * Kernel thread context (may sleep).
6780 void ata_host_detach(struct ata_host *host)
6784 for (i = 0; i < host->n_ports; i++)
6785 ata_port_detach(host->ports[i]);
6789 * ata_std_ports - initialize ioaddr with standard port offsets.
6790 * @ioaddr: IO address structure to be initialized
6792 * Utility function which initializes data_addr, error_addr,
6793 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6794 * device_addr, status_addr, and command_addr to standard offsets
6795 * relative to cmd_addr.
6797 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6800 void ata_std_ports(struct ata_ioports *ioaddr)
6802 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6803 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6804 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6805 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6806 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6807 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6808 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6809 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6810 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6811 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6818 * ata_pci_remove_one - PCI layer callback for device removal
6819 * @pdev: PCI device that was removed
6821 * PCI layer indicates to libata via this hook that hot-unplug or
6822 * module unload event has occurred. Detach all ports. Resource
6823 * release is handled via devres.
6826 * Inherited from PCI layer (may sleep).
6828 void ata_pci_remove_one(struct pci_dev *pdev)
6830 struct device *dev = pci_dev_to_dev(pdev);
6831 struct ata_host *host = dev_get_drvdata(dev);
6833 ata_host_detach(host);
6836 /* move to PCI subsystem */
6837 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6839 unsigned long tmp = 0;
6841 switch (bits->width) {
6844 pci_read_config_byte(pdev, bits->reg, &tmp8);
6850 pci_read_config_word(pdev, bits->reg, &tmp16);
6856 pci_read_config_dword(pdev, bits->reg, &tmp32);
6867 return (tmp == bits->val) ? 1 : 0;
6871 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6873 pci_save_state(pdev);
6874 pci_disable_device(pdev);
6876 if (mesg.event == PM_EVENT_SUSPEND)
6877 pci_set_power_state(pdev, PCI_D3hot);
6880 int ata_pci_device_do_resume(struct pci_dev *pdev)
6884 pci_set_power_state(pdev, PCI_D0);
6885 pci_restore_state(pdev);
6887 rc = pcim_enable_device(pdev);
6889 dev_printk(KERN_ERR, &pdev->dev,
6890 "failed to enable device after resume (%d)\n", rc);
6894 pci_set_master(pdev);
6898 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6900 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6903 rc = ata_host_suspend(host, mesg);
6907 ata_pci_device_do_suspend(pdev, mesg);
6912 int ata_pci_device_resume(struct pci_dev *pdev)
6914 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6917 rc = ata_pci_device_do_resume(pdev);
6919 ata_host_resume(host);
6922 #endif /* CONFIG_PM */
6924 #endif /* CONFIG_PCI */
6927 static int __init ata_init(void)
6929 ata_probe_timeout *= HZ;
6930 ata_wq = create_workqueue("ata");
6934 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6936 destroy_workqueue(ata_wq);
6940 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6944 static void __exit ata_exit(void)
6946 destroy_workqueue(ata_wq);
6947 destroy_workqueue(ata_aux_wq);
6950 subsys_initcall(ata_init);
6951 module_exit(ata_exit);
6953 static unsigned long ratelimit_time;
6954 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6956 int ata_ratelimit(void)
6959 unsigned long flags;
6961 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6963 if (time_after(jiffies, ratelimit_time)) {
6965 ratelimit_time = jiffies + (HZ/5);
6969 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6975 * ata_wait_register - wait until register value changes
6976 * @reg: IO-mapped register
6977 * @mask: Mask to apply to read register value
6978 * @val: Wait condition
6979 * @interval_msec: polling interval in milliseconds
6980 * @timeout_msec: timeout in milliseconds
6982 * Waiting for some bits of register to change is a common
6983 * operation for ATA controllers. This function reads 32bit LE
6984 * IO-mapped register @reg and tests for the following condition.
6986 * (*@reg & mask) != val
6988 * If the condition is met, it returns; otherwise, the process is
6989 * repeated after @interval_msec until timeout.
6992 * Kernel thread context (may sleep)
6995 * The final register value.
6997 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6998 unsigned long interval_msec,
6999 unsigned long timeout_msec)
7001 unsigned long timeout;
7004 tmp = ioread32(reg);
7006 /* Calculate timeout _after_ the first read to make sure
7007 * preceding writes reach the controller before starting to
7008 * eat away the timeout.
7010 timeout = jiffies + (timeout_msec * HZ) / 1000;
7012 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
7013 msleep(interval_msec);
7014 tmp = ioread32(reg);
7023 static void ata_dummy_noret(struct ata_port *ap) { }
7024 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
7025 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
7027 static u8 ata_dummy_check_status(struct ata_port *ap)
7032 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
7034 return AC_ERR_SYSTEM;
7037 const struct ata_port_operations ata_dummy_port_ops = {
7038 .check_status = ata_dummy_check_status,
7039 .check_altstatus = ata_dummy_check_status,
7040 .dev_select = ata_noop_dev_select,
7041 .qc_prep = ata_noop_qc_prep,
7042 .qc_issue = ata_dummy_qc_issue,
7043 .freeze = ata_dummy_noret,
7044 .thaw = ata_dummy_noret,
7045 .error_handler = ata_dummy_noret,
7046 .post_internal_cmd = ata_dummy_qc_noret,
7047 .irq_clear = ata_dummy_noret,
7048 .port_start = ata_dummy_ret0,
7049 .port_stop = ata_dummy_noret,
7052 const struct ata_port_info ata_dummy_port_info = {
7053 .port_ops = &ata_dummy_port_ops,
7057 * libata is essentially a library of internal helper functions for
7058 * low-level ATA host controller drivers. As such, the API/ABI is
7059 * likely to change as new drivers are added and updated.
7060 * Do not depend on ABI/API stability.
7063 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7064 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7065 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
7066 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
7067 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
7068 EXPORT_SYMBOL_GPL(ata_std_bios_param);
7069 EXPORT_SYMBOL_GPL(ata_std_ports);
7070 EXPORT_SYMBOL_GPL(ata_host_init);
7071 EXPORT_SYMBOL_GPL(ata_host_alloc);
7072 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
7073 EXPORT_SYMBOL_GPL(ata_host_start);
7074 EXPORT_SYMBOL_GPL(ata_host_register);
7075 EXPORT_SYMBOL_GPL(ata_host_activate);
7076 EXPORT_SYMBOL_GPL(ata_host_detach);
7077 EXPORT_SYMBOL_GPL(ata_sg_init);
7078 EXPORT_SYMBOL_GPL(ata_sg_init_one);
7079 EXPORT_SYMBOL_GPL(ata_hsm_move);
7080 EXPORT_SYMBOL_GPL(ata_qc_complete);
7081 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
7082 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
7083 EXPORT_SYMBOL_GPL(ata_tf_load);
7084 EXPORT_SYMBOL_GPL(ata_tf_read);
7085 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
7086 EXPORT_SYMBOL_GPL(ata_std_dev_select);
7087 EXPORT_SYMBOL_GPL(sata_print_link_status);
7088 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7089 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
7090 EXPORT_SYMBOL_GPL(ata_check_status);
7091 EXPORT_SYMBOL_GPL(ata_altstatus);
7092 EXPORT_SYMBOL_GPL(ata_exec_command);
7093 EXPORT_SYMBOL_GPL(ata_port_start);
7094 EXPORT_SYMBOL_GPL(ata_sff_port_start);
7095 EXPORT_SYMBOL_GPL(ata_interrupt);
7096 EXPORT_SYMBOL_GPL(ata_do_set_mode);
7097 EXPORT_SYMBOL_GPL(ata_data_xfer);
7098 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
7099 EXPORT_SYMBOL_GPL(ata_qc_prep);
7100 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
7101 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
7102 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
7103 EXPORT_SYMBOL_GPL(ata_bmdma_start);
7104 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
7105 EXPORT_SYMBOL_GPL(ata_bmdma_status);
7106 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
7107 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
7108 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
7109 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
7110 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
7111 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
7112 EXPORT_SYMBOL_GPL(ata_port_probe);
7113 EXPORT_SYMBOL_GPL(ata_dev_disable);
7114 EXPORT_SYMBOL_GPL(sata_set_spd);
7115 EXPORT_SYMBOL_GPL(sata_link_debounce);
7116 EXPORT_SYMBOL_GPL(sata_link_resume);
7117 EXPORT_SYMBOL_GPL(sata_phy_reset);
7118 EXPORT_SYMBOL_GPL(__sata_phy_reset);
7119 EXPORT_SYMBOL_GPL(ata_bus_reset);
7120 EXPORT_SYMBOL_GPL(ata_std_prereset);
7121 EXPORT_SYMBOL_GPL(ata_std_softreset);
7122 EXPORT_SYMBOL_GPL(sata_link_hardreset);
7123 EXPORT_SYMBOL_GPL(sata_std_hardreset);
7124 EXPORT_SYMBOL_GPL(ata_std_postreset);
7125 EXPORT_SYMBOL_GPL(ata_dev_classify);
7126 EXPORT_SYMBOL_GPL(ata_dev_pair);
7127 EXPORT_SYMBOL_GPL(ata_port_disable);
7128 EXPORT_SYMBOL_GPL(ata_ratelimit);
7129 EXPORT_SYMBOL_GPL(ata_wait_register);
7130 EXPORT_SYMBOL_GPL(ata_busy_sleep);
7131 EXPORT_SYMBOL_GPL(ata_wait_ready);
7132 EXPORT_SYMBOL_GPL(ata_port_queue_task);
7133 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
7134 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
7135 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
7136 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
7137 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
7138 EXPORT_SYMBOL_GPL(ata_host_intr);
7139 EXPORT_SYMBOL_GPL(sata_scr_valid);
7140 EXPORT_SYMBOL_GPL(sata_scr_read);
7141 EXPORT_SYMBOL_GPL(sata_scr_write);
7142 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
7143 EXPORT_SYMBOL_GPL(ata_link_online);
7144 EXPORT_SYMBOL_GPL(ata_link_offline);
7146 EXPORT_SYMBOL_GPL(ata_host_suspend);
7147 EXPORT_SYMBOL_GPL(ata_host_resume);
7148 #endif /* CONFIG_PM */
7149 EXPORT_SYMBOL_GPL(ata_id_string);
7150 EXPORT_SYMBOL_GPL(ata_id_c_string);
7151 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
7152 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7154 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
7155 EXPORT_SYMBOL_GPL(ata_timing_compute);
7156 EXPORT_SYMBOL_GPL(ata_timing_merge);
7159 EXPORT_SYMBOL_GPL(pci_test_config_bits);
7160 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
7161 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
7162 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
7163 EXPORT_SYMBOL_GPL(ata_pci_init_one);
7164 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
7166 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
7167 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
7168 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
7169 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
7170 #endif /* CONFIG_PM */
7171 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
7172 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
7173 #endif /* CONFIG_PCI */
7175 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
7176 EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
7177 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
7178 EXPORT_SYMBOL_GPL(ata_port_desc);
7180 EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
7181 #endif /* CONFIG_PCI */
7182 EXPORT_SYMBOL_GPL(ata_eng_timeout);
7183 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
7184 EXPORT_SYMBOL_GPL(ata_link_abort);
7185 EXPORT_SYMBOL_GPL(ata_port_abort);
7186 EXPORT_SYMBOL_GPL(ata_port_freeze);
7187 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
7188 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
7189 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
7190 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
7191 EXPORT_SYMBOL_GPL(ata_do_eh);
7192 EXPORT_SYMBOL_GPL(ata_irq_on);
7193 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
7195 EXPORT_SYMBOL_GPL(ata_cable_40wire);
7196 EXPORT_SYMBOL_GPL(ata_cable_80wire);
7197 EXPORT_SYMBOL_GPL(ata_cable_unknown);
7198 EXPORT_SYMBOL_GPL(ata_cable_sata);