2 * sma cpu5 watchdog driver
4 * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/miscdevice.h>
28 #include <linux/init.h>
29 #include <linux/ioport.h>
30 #include <linux/timer.h>
31 #include <linux/jiffies.h>
33 #include <asm/uaccess.h>
35 #include <linux/watchdog.h>
37 /* adjustable parameters */
39 static int verbose = 0;
40 static int port = 0x91;
41 static int ticks = 10000;
43 #define PFX "cpu5wdt: "
45 #define CPU5WDT_EXTENT 0x0A
47 #define CPU5WDT_STATUS_REG 0x00
48 #define CPU5WDT_TIME_A_REG 0x02
49 #define CPU5WDT_TIME_B_REG 0x03
50 #define CPU5WDT_MODE_REG 0x04
51 #define CPU5WDT_TRIGGER_REG 0x07
52 #define CPU5WDT_ENABLE_REG 0x08
53 #define CPU5WDT_RESET_REG 0x09
55 #define CPU5WDT_INTERVAL (HZ/10+1)
57 /* some device data */
60 struct semaphore stop;
62 struct timer_list timer;
68 /* generic helper functions */
70 static void cpu5wdt_trigger(unsigned long unused)
73 printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
75 if( cpu5wdt_device.running )
78 /* keep watchdog alive */
79 outb(1, port + CPU5WDT_TRIGGER_REG);
82 if( cpu5wdt_device.queue && ticks ) {
83 cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL;
84 add_timer(&cpu5wdt_device.timer);
87 /* ticks doesn't matter anyway */
88 up(&cpu5wdt_device.stop);
93 static void cpu5wdt_reset(void)
95 ticks = cpu5wdt_device.default_ticks;
98 printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
102 static void cpu5wdt_start(void)
104 if ( !cpu5wdt_device.queue ) {
105 cpu5wdt_device.queue = 1;
106 outb(0, port + CPU5WDT_TIME_A_REG);
107 outb(0, port + CPU5WDT_TIME_B_REG);
108 outb(1, port + CPU5WDT_MODE_REG);
109 outb(0, port + CPU5WDT_RESET_REG);
110 outb(0, port + CPU5WDT_ENABLE_REG);
111 cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL;
112 add_timer(&cpu5wdt_device.timer);
114 /* if process dies, counter is not decremented */
115 cpu5wdt_device.running++;
118 static int cpu5wdt_stop(void)
120 if ( cpu5wdt_device.running )
121 cpu5wdt_device.running = 0;
123 ticks = cpu5wdt_device.default_ticks;
126 printk(KERN_CRIT PFX "stop not possible\n");
131 /* filesystem operations */
133 static int cpu5wdt_open(struct inode *inode, struct file *file)
135 if ( test_and_set_bit(0, &cpu5wdt_device.inuse) )
138 return nonseekable_open(inode, file);
141 static int cpu5wdt_release(struct inode *inode, struct file *file)
143 clear_bit(0, &cpu5wdt_device.inuse);
147 static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
149 void __user *argp = (void __user *)arg;
151 static struct watchdog_info ident =
153 .options = WDIOF_CARDRESET,
154 .identity = "CPU5 WDT",
158 case WDIOC_KEEPALIVE:
161 case WDIOC_GETSTATUS:
162 value = inb(port + CPU5WDT_STATUS_REG);
163 value = (value >> 2) & 1;
164 if ( copy_to_user(argp, &value, sizeof(int)) )
167 case WDIOC_GETSUPPORT:
168 if ( copy_to_user(argp, &ident, sizeof(ident)) )
171 case WDIOC_SETOPTIONS:
172 if ( copy_from_user(&value, argp, sizeof(int)) )
175 case WDIOS_ENABLECARD:
178 case WDIOS_DISABLECARD:
179 return cpu5wdt_stop();
190 static ssize_t cpu5wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
200 static struct file_operations cpu5wdt_fops = {
201 .owner = THIS_MODULE,
203 .ioctl = cpu5wdt_ioctl,
204 .open = cpu5wdt_open,
205 .write = cpu5wdt_write,
206 .release = cpu5wdt_release,
209 static struct miscdevice cpu5wdt_misc = {
210 .minor = WATCHDOG_MINOR,
212 .fops = &cpu5wdt_fops,
215 /* init/exit function */
217 static int __devinit cpu5wdt_init(void)
223 printk(KERN_DEBUG PFX "port=0x%x, verbose=%i\n", port, verbose);
225 if ( (err = misc_register(&cpu5wdt_misc)) < 0 ) {
226 printk(KERN_ERR PFX "misc_register failed\n");
230 if ( !request_region(port, CPU5WDT_EXTENT, PFX) ) {
231 printk(KERN_ERR PFX "request_region failed\n");
236 /* watchdog reboot? */
237 val = inb(port + CPU5WDT_STATUS_REG);
238 val = (val >> 2) & 1;
240 printk(KERN_INFO PFX "sorry, was my fault\n");
242 init_MUTEX_LOCKED(&cpu5wdt_device.stop);
243 cpu5wdt_device.queue = 0;
245 clear_bit(0, &cpu5wdt_device.inuse);
247 init_timer(&cpu5wdt_device.timer);
248 cpu5wdt_device.timer.function = cpu5wdt_trigger;
249 cpu5wdt_device.timer.data = 0;
251 cpu5wdt_device.default_ticks = ticks;
253 printk(KERN_INFO PFX "init success\n");
258 misc_deregister(&cpu5wdt_misc);
263 static int __devinit cpu5wdt_init_module(void)
265 return cpu5wdt_init();
268 static void __devexit cpu5wdt_exit(void)
270 if ( cpu5wdt_device.queue ) {
271 cpu5wdt_device.queue = 0;
272 down(&cpu5wdt_device.stop);
275 misc_deregister(&cpu5wdt_misc);
277 release_region(port, CPU5WDT_EXTENT);
281 static void __devexit cpu5wdt_exit_module(void)
286 /* module entry points */
288 module_init(cpu5wdt_init_module);
289 module_exit(cpu5wdt_exit_module);
291 MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
292 MODULE_DESCRIPTION("sma cpu5 watchdog driver");
293 MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
294 MODULE_LICENSE("GPL");
295 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
297 module_param(port, int, 0);
298 MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
300 module_param(verbose, int, 0);
301 MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
303 module_param(ticks, int, 0);
304 MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");