2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
46 /*-------------------------------------------------------------------------*/
49 * EHCI hc_driver implementation ... experimental, incomplete.
50 * Based on the final 1.0 register interface specification.
52 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53 * First was PCMCIA, like ISA; then CardBus, which is PCI.
54 * Next comes "CardBay", using USB 2.0 signals.
56 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57 * Special thanks to Intel and VIA for providing host controllers to
58 * test this driver on, and Cypress (including In-System Design) for
59 * providing early devices for those host controllers to talk to!
62 #define DRIVER_VERSION "10 Dec 2004"
63 #define DRIVER_AUTHOR "David Brownell"
64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
66 static const char hcd_name [] = "ehci_hcd";
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
84 #define EHCI_IAA_MSECS 10 /* arbitrary */
85 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
86 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
87 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
89 /* Initial IRQ latency: faster than hw default */
90 static int log2_irq_thresh = 0; // 0 to 6
91 module_param (log2_irq_thresh, int, S_IRUGO);
92 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
94 /* initial park setting: slower than hw default */
95 static unsigned park = 0;
96 module_param (park, uint, S_IRUGO);
97 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
99 /* for flakey hardware, ignore overcurrent indicators */
100 static int ignore_oc = 0;
101 module_param (ignore_oc, bool, S_IRUGO);
102 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
104 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
106 /*-------------------------------------------------------------------------*/
109 #include "ehci-dbg.c"
111 /*-------------------------------------------------------------------------*/
114 * handshake - spin reading hc until handshake completes or fails
115 * @ptr: address of hc register to be read
116 * @mask: bits to look at in result of read
117 * @done: value of those bits when handshake succeeds
118 * @usec: timeout in microseconds
120 * Returns negative errno, or zero on success
122 * Success happens when the "mask" bits have the specified value (hardware
123 * handshake done). There are two failure modes: "usec" have passed (major
124 * hardware flakeout), or the register reads as all-ones (hardware removed).
126 * That last failure should_only happen in cases like physical cardbus eject
127 * before driver shutdown. But it also seems to be caused by bugs in cardbus
128 * bridge shutdown: shutting down the bridge before the devices using it.
130 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
131 u32 mask, u32 done, int usec)
136 result = ehci_readl(ehci, ptr);
137 if (result == ~(u32)0) /* card removed */
148 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
149 u32 mask, u32 done, int usec)
151 int error = handshake(ehci, ptr, mask, done, usec);
153 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
158 /* force HC to halt state from unknown (EHCI spec section 2.3) */
159 static int ehci_halt (struct ehci_hcd *ehci)
161 u32 temp = ehci_readl(ehci, &ehci->regs->status);
163 /* disable any irqs left enabled by previous code */
164 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
166 if ((temp & STS_HALT) != 0)
169 temp = ehci_readl(ehci, &ehci->regs->command);
171 ehci_writel(ehci, temp, &ehci->regs->command);
172 return handshake (ehci, &ehci->regs->status,
173 STS_HALT, STS_HALT, 16 * 125);
176 /* put TDI/ARC silicon into EHCI mode */
177 static void tdi_reset (struct ehci_hcd *ehci)
179 u32 __iomem *reg_ptr;
182 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
183 tmp = ehci_readl(ehci, reg_ptr);
184 tmp |= USBMODE_CM_HC;
185 /* The default byte access to MMR space is LE after
186 * controller reset. Set the required endian mode
187 * for transfer buffers to match the host microprocessor
189 if (ehci_big_endian_mmio(ehci))
191 ehci_writel(ehci, tmp, reg_ptr);
194 /* reset a non-running (STS_HALT == 1) controller */
195 static int ehci_reset (struct ehci_hcd *ehci)
198 u32 command = ehci_readl(ehci, &ehci->regs->command);
200 command |= CMD_RESET;
201 dbg_cmd (ehci, "reset", command);
202 ehci_writel(ehci, command, &ehci->regs->command);
203 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
204 ehci->next_statechange = jiffies;
205 retval = handshake (ehci, &ehci->regs->command,
206 CMD_RESET, 0, 250 * 1000);
211 if (ehci_is_TDI(ehci))
217 /* idle the controller (from running) */
218 static void ehci_quiesce (struct ehci_hcd *ehci)
223 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
227 /* wait for any schedule enables/disables to take effect */
228 temp = ehci_readl(ehci, &ehci->regs->command) << 10;
229 temp &= STS_ASS | STS_PSS;
230 if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
231 STS_ASS | STS_PSS, temp, 16 * 125))
234 /* then disable anything that's still active */
235 temp = ehci_readl(ehci, &ehci->regs->command);
236 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
237 ehci_writel(ehci, temp, &ehci->regs->command);
239 /* hardware can take 16 microframes to turn off ... */
240 handshake_on_error_set_halt(ehci, &ehci->regs->status,
241 STS_ASS | STS_PSS, 0, 16 * 125);
244 /*-------------------------------------------------------------------------*/
246 static void end_unlink_async(struct ehci_hcd *ehci);
247 static void ehci_work(struct ehci_hcd *ehci);
249 #include "ehci-hub.c"
250 #include "ehci-mem.c"
252 #include "ehci-sched.c"
254 /*-------------------------------------------------------------------------*/
256 static void ehci_iaa_watchdog(unsigned long param)
258 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
261 spin_lock_irqsave (&ehci->lock, flags);
263 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
264 * So we need this watchdog, but must protect it against both
265 * (a) SMP races against real IAA firing and retriggering, and
266 * (b) clean HC shutdown, when IAA watchdog was pending.
269 && !timer_pending(&ehci->iaa_watchdog)
270 && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
273 /* If we get here, IAA is *REALLY* late. It's barely
274 * conceivable that the system is so busy that CMD_IAAD
275 * is still legitimately set, so let's be sure it's
276 * clear before we read STS_IAA. (The HC should clear
277 * CMD_IAAD when it sets STS_IAA.)
279 cmd = ehci_readl(ehci, &ehci->regs->command);
281 ehci_writel(ehci, cmd & ~CMD_IAAD,
282 &ehci->regs->command);
284 /* If IAA is set here it either legitimately triggered
285 * before we cleared IAAD above (but _way_ late, so we'll
286 * still count it as lost) ... or a silicon erratum:
287 * - VIA seems to set IAA without triggering the IRQ;
288 * - IAAD potentially cleared without setting IAA.
290 status = ehci_readl(ehci, &ehci->regs->status);
291 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
292 COUNT (ehci->stats.lost_iaa);
293 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
296 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
298 end_unlink_async(ehci);
301 spin_unlock_irqrestore(&ehci->lock, flags);
304 static void ehci_watchdog(unsigned long param)
306 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
309 spin_lock_irqsave(&ehci->lock, flags);
311 /* stop async processing after it's idled a bit */
312 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
313 start_unlink_async (ehci, ehci->async);
315 /* ehci could run by timer, without IRQs ... */
318 spin_unlock_irqrestore (&ehci->lock, flags);
321 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
322 * The firmware seems to think that powering off is a wakeup event!
323 * This routine turns off remote wakeup and everything else, on all ports.
325 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
327 int port = HCS_N_PORTS(ehci->hcs_params);
330 ehci_writel(ehci, PORT_RWC_BITS,
331 &ehci->regs->port_status[port]);
335 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
336 * Should be called with ehci->lock held.
338 static void ehci_silence_controller(struct ehci_hcd *ehci)
341 ehci_turn_off_all_ports(ehci);
343 /* make BIOS/etc use companion controller during reboot */
344 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
346 /* unblock posted writes */
347 ehci_readl(ehci, &ehci->regs->configured_flag);
350 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
351 * This forcibly disables dma and IRQs, helping kexec and other cases
352 * where the next system software may expect clean state.
354 static void ehci_shutdown(struct usb_hcd *hcd)
356 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
358 del_timer_sync(&ehci->watchdog);
359 del_timer_sync(&ehci->iaa_watchdog);
361 spin_lock_irq(&ehci->lock);
362 ehci_silence_controller(ehci);
363 spin_unlock_irq(&ehci->lock);
366 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
370 if (!HCS_PPC (ehci->hcs_params))
373 ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
374 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
375 (void) ehci_hub_control(ehci_to_hcd(ehci),
376 is_on ? SetPortFeature : ClearPortFeature,
379 /* Flush those writes */
380 ehci_readl(ehci, &ehci->regs->command);
384 /*-------------------------------------------------------------------------*/
387 * ehci_work is called from some interrupts, timers, and so on.
388 * it calls driver completion functions, after dropping ehci->lock.
390 static void ehci_work (struct ehci_hcd *ehci)
392 timer_action_done (ehci, TIMER_IO_WATCHDOG);
394 /* another CPU may drop ehci->lock during a schedule scan while
395 * it reports urb completions. this flag guards against bogus
396 * attempts at re-entrant schedule scanning.
402 if (ehci->next_uframe != -1)
403 scan_periodic (ehci);
406 /* the IO watchdog guards against hardware or driver bugs that
407 * misplace IRQs, and should let us run completely without IRQs.
408 * such lossage has been observed on both VT6202 and VT8235.
410 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
411 (ehci->async->qh_next.ptr != NULL ||
412 ehci->periodic_sched != 0))
413 timer_action (ehci, TIMER_IO_WATCHDOG);
417 * Called when the ehci_hcd module is removed.
419 static void ehci_stop (struct usb_hcd *hcd)
421 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
423 ehci_dbg (ehci, "stop\n");
425 /* no more interrupts ... */
426 del_timer_sync (&ehci->watchdog);
427 del_timer_sync(&ehci->iaa_watchdog);
429 spin_lock_irq(&ehci->lock);
430 if (HC_IS_RUNNING (hcd->state))
433 ehci_silence_controller(ehci);
435 spin_unlock_irq(&ehci->lock);
437 remove_companion_file(ehci);
438 remove_debug_files (ehci);
440 /* root hub is shut down separately (first, when possible) */
441 spin_lock_irq (&ehci->lock);
444 spin_unlock_irq (&ehci->lock);
445 ehci_mem_cleanup (ehci);
448 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
449 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
450 ehci->stats.lost_iaa);
451 ehci_dbg (ehci, "complete %ld unlink %ld\n",
452 ehci->stats.complete, ehci->stats.unlink);
455 dbg_status (ehci, "ehci_stop completed",
456 ehci_readl(ehci, &ehci->regs->status));
459 /* one-time init, only for memory state */
460 static int ehci_init(struct usb_hcd *hcd)
462 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
467 spin_lock_init(&ehci->lock);
469 init_timer(&ehci->watchdog);
470 ehci->watchdog.function = ehci_watchdog;
471 ehci->watchdog.data = (unsigned long) ehci;
473 init_timer(&ehci->iaa_watchdog);
474 ehci->iaa_watchdog.function = ehci_iaa_watchdog;
475 ehci->iaa_watchdog.data = (unsigned long) ehci;
478 * hw default: 1K periodic list heads, one per frame.
479 * periodic_size can shrink by USBCMD update if hcc_params allows.
481 ehci->periodic_size = DEFAULT_I_TDPS;
482 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
485 /* controllers may cache some of the periodic schedule ... */
486 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
487 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
489 else // N microframes cached
490 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
492 ehci->reclaim = NULL;
493 ehci->next_uframe = -1;
496 * dedicate a qh for the async ring head, since we couldn't unlink
497 * a 'real' qh without stopping the async schedule [4.8]. use it
498 * as the 'reclamation list head' too.
499 * its dummy is used in hw_alt_next of many tds, to prevent the qh
500 * from automatically advancing to the next td after short reads.
502 ehci->async->qh_next.qh = NULL;
503 ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
504 ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
505 ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
506 ehci->async->hw_qtd_next = EHCI_LIST_END(ehci);
507 ehci->async->qh_state = QH_STATE_LINKED;
508 ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
510 /* clear interrupt enables, set irq latency */
511 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
513 temp = 1 << (16 + log2_irq_thresh);
514 if (HCC_CANPARK(hcc_params)) {
515 /* HW default park == 3, on hardware that supports it (like
516 * NVidia and ALI silicon), maximizes throughput on the async
517 * schedule by avoiding QH fetches between transfers.
519 * With fast usb storage devices and NForce2, "park" seems to
520 * make problems: throughput reduction (!), data errors...
523 park = min(park, (unsigned) 3);
527 ehci_dbg(ehci, "park %d\n", park);
529 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
530 /* periodic schedule size can be smaller than default */
532 temp |= (EHCI_TUNE_FLS << 2);
533 switch (EHCI_TUNE_FLS) {
534 case 0: ehci->periodic_size = 1024; break;
535 case 1: ehci->periodic_size = 512; break;
536 case 2: ehci->periodic_size = 256; break;
540 ehci->command = temp;
545 /* start HC running; it's halted, ehci_init() has been run (once) */
546 static int ehci_run (struct usb_hcd *hcd)
548 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
553 hcd->uses_new_polling = 1;
556 /* EHCI spec section 4.1 */
557 if ((retval = ehci_reset(ehci)) != 0) {
558 ehci_mem_cleanup(ehci);
561 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
562 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
565 * hcc_params controls whether ehci->regs->segment must (!!!)
566 * be used; it constrains QH/ITD/SITD and QTD locations.
567 * pci_pool consistent memory always uses segment zero.
568 * streaming mappings for I/O buffers, like pci_map_single(),
569 * can return segments above 4GB, if the device allows.
571 * NOTE: the dma mask is visible through dma_supported(), so
572 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
573 * Scsi_Host.highmem_io, and so forth. It's readonly to all
574 * host side drivers though.
576 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
577 if (HCC_64BIT_ADDR(hcc_params)) {
578 ehci_writel(ehci, 0, &ehci->regs->segment);
580 // this is deeply broken on almost all architectures
581 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
582 ehci_info(ehci, "enabled 64bit DMA\n");
587 // Philips, Intel, and maybe others need CMD_RUN before the
588 // root hub will detect new devices (why?); NEC doesn't
589 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
590 ehci->command |= CMD_RUN;
591 ehci_writel(ehci, ehci->command, &ehci->regs->command);
592 dbg_cmd (ehci, "init", ehci->command);
595 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
596 * are explicitly handed to companion controller(s), so no TT is
597 * involved with the root hub. (Except where one is integrated,
598 * and there's no companion controller unless maybe for USB OTG.)
600 * Turning on the CF flag will transfer ownership of all ports
601 * from the companions to the EHCI controller. If any of the
602 * companions are in the middle of a port reset at the time, it
603 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
604 * guarantees that no resets are in progress. After we set CF,
605 * a short delay lets the hardware catch up; new resets shouldn't
606 * be started before the port switching actions could complete.
608 down_write(&ehci_cf_port_reset_rwsem);
609 hcd->state = HC_STATE_RUNNING;
610 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
611 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
613 up_write(&ehci_cf_port_reset_rwsem);
615 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
617 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
618 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
619 temp >> 8, temp & 0xff, DRIVER_VERSION,
620 ignore_oc ? ", overcurrent ignored" : "");
622 ehci_writel(ehci, INTR_MASK,
623 &ehci->regs->intr_enable); /* Turn On Interrupts */
625 /* GRR this is run-once init(), being done every time the HC starts.
626 * So long as they're part of class devices, we can't do it init()
627 * since the class device isn't created that early.
629 create_debug_files(ehci);
630 create_companion_file(ehci);
635 /*-------------------------------------------------------------------------*/
637 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
639 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
640 u32 status, pcd_status = 0, cmd;
643 spin_lock (&ehci->lock);
645 status = ehci_readl(ehci, &ehci->regs->status);
647 /* e.g. cardbus physical eject */
648 if (status == ~(u32) 0) {
649 ehci_dbg (ehci, "device removed\n");
654 if (!status) { /* irq sharing? */
655 spin_unlock(&ehci->lock);
659 /* clear (just) interrupts */
660 ehci_writel(ehci, status, &ehci->regs->status);
661 cmd = ehci_readl(ehci, &ehci->regs->command);
665 /* unrequested/ignored: Frame List Rollover */
666 dbg_status (ehci, "irq", status);
669 /* INT, ERR, and IAA interrupt rates can be throttled */
671 /* normal [4.15.1.2] or error [4.15.1.1] completion */
672 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
673 if (likely ((status & STS_ERR) == 0))
674 COUNT (ehci->stats.normal);
676 COUNT (ehci->stats.error);
680 /* complete the unlinking of some qh [4.15.2.3] */
681 if (status & STS_IAA) {
682 /* guard against (alleged) silicon errata */
683 if (cmd & CMD_IAAD) {
684 ehci_writel(ehci, cmd & ~CMD_IAAD,
685 &ehci->regs->command);
686 ehci_dbg(ehci, "IAA with IAAD still set?\n");
689 COUNT(ehci->stats.reclaim);
690 end_unlink_async(ehci);
692 ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
695 /* remote wakeup [4.3.1] */
696 if (status & STS_PCD) {
697 unsigned i = HCS_N_PORTS (ehci->hcs_params);
699 /* kick root hub later */
702 /* resume root hub? */
703 if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
704 usb_hcd_resume_root_hub(hcd);
707 int pstatus = ehci_readl(ehci,
708 &ehci->regs->port_status [i]);
710 if (pstatus & PORT_OWNER)
712 if (!(pstatus & PORT_RESUME)
713 || ehci->reset_done [i] != 0)
716 /* start 20 msec resume signaling from this port,
717 * and make khubd collect PORT_STAT_C_SUSPEND to
718 * stop that signaling.
720 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
721 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
722 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
726 /* PCI errors [4.15.2.4] */
727 if (unlikely ((status & STS_FATAL) != 0)) {
728 dbg_cmd (ehci, "fatal", ehci_readl(ehci,
729 &ehci->regs->command));
730 dbg_status (ehci, "fatal", status);
731 if (status & STS_HALT) {
732 ehci_err (ehci, "fatal error\n");
735 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
736 /* generic layer kills/unlinks all urbs, then
737 * uses ehci_stop to clean up the rest
745 spin_unlock (&ehci->lock);
747 usb_hcd_poll_rh_status(hcd);
751 /*-------------------------------------------------------------------------*/
754 * non-error returns are a promise to giveback() the urb later
755 * we drop ownership so next owner (or urb unlink) can get it
757 * urb + dev is in hcd.self.controller.urb_list
758 * we're queueing TDs onto software and hardware lists
760 * hcd-specific init for hcpriv hasn't been done yet
762 * NOTE: control, bulk, and interrupt share the same code to append TDs
763 * to a (possibly active) QH, and the same QH scanning code.
765 static int ehci_urb_enqueue (
770 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
771 struct list_head qtd_list;
773 INIT_LIST_HEAD (&qtd_list);
775 switch (usb_pipetype (urb->pipe)) {
777 /* qh_completions() code doesn't handle all the fault cases
778 * in multi-TD control transfers. Even 1KB is rare anyway.
780 if (urb->transfer_buffer_length > (16 * 1024))
783 /* case PIPE_BULK: */
785 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
787 return submit_async(ehci, urb, &qtd_list, mem_flags);
790 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
792 return intr_submit(ehci, urb, &qtd_list, mem_flags);
794 case PIPE_ISOCHRONOUS:
795 if (urb->dev->speed == USB_SPEED_HIGH)
796 return itd_submit (ehci, urb, mem_flags);
798 return sitd_submit (ehci, urb, mem_flags);
802 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
805 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
806 end_unlink_async(ehci);
808 /* if it's not linked then there's nothing to do */
809 if (qh->qh_state != QH_STATE_LINKED)
812 /* defer till later if busy */
813 else if (ehci->reclaim) {
814 struct ehci_qh *last;
816 for (last = ehci->reclaim;
818 last = last->reclaim)
820 qh->qh_state = QH_STATE_UNLINK_WAIT;
823 /* start IAA cycle */
825 start_unlink_async (ehci, qh);
828 /* remove from hardware lists
829 * completions normally happen asynchronously
832 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
834 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
839 spin_lock_irqsave (&ehci->lock, flags);
840 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
844 switch (usb_pipetype (urb->pipe)) {
845 // case PIPE_CONTROL:
848 qh = (struct ehci_qh *) urb->hcpriv;
851 switch (qh->qh_state) {
852 case QH_STATE_LINKED:
853 case QH_STATE_COMPLETING:
854 unlink_async(ehci, qh);
856 case QH_STATE_UNLINK:
857 case QH_STATE_UNLINK_WAIT:
858 /* already started */
867 qh = (struct ehci_qh *) urb->hcpriv;
870 switch (qh->qh_state) {
871 case QH_STATE_LINKED:
872 intr_deschedule (ehci, qh);
875 qh_completions (ehci, qh);
878 ehci_dbg (ehci, "bogus qh %p state %d\n",
883 /* reschedule QH iff another request is queued */
884 if (!list_empty (&qh->qtd_list)
885 && HC_IS_RUNNING (hcd->state)) {
886 rc = qh_schedule(ehci, qh);
888 /* An error here likely indicates handshake failure
889 * or no space left in the schedule. Neither fault
890 * should happen often ...
892 * FIXME kill the now-dysfunctional queued urbs
896 "can't reschedule qh %p, err %d",
901 case PIPE_ISOCHRONOUS:
904 // wait till next completion, do it then.
905 // completion irqs can wait up to 1024 msec,
909 spin_unlock_irqrestore (&ehci->lock, flags);
913 /*-------------------------------------------------------------------------*/
915 // bulk qh holds the data toggle
918 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
920 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
922 struct ehci_qh *qh, *tmp;
924 /* ASSERT: any requests/urbs are being unlinked */
925 /* ASSERT: nobody can be submitting urbs for this any more */
928 spin_lock_irqsave (&ehci->lock, flags);
933 /* endpoints can be iso streams. for now, we don't
934 * accelerate iso completions ... so spin a while.
936 if (qh->hw_info1 == 0) {
937 ehci_vdbg (ehci, "iso delay\n");
941 if (!HC_IS_RUNNING (hcd->state))
942 qh->qh_state = QH_STATE_IDLE;
943 switch (qh->qh_state) {
944 case QH_STATE_LINKED:
945 for (tmp = ehci->async->qh_next.qh;
947 tmp = tmp->qh_next.qh)
949 /* periodic qh self-unlinks on empty */
952 unlink_async (ehci, qh);
954 case QH_STATE_UNLINK: /* wait for hw to finish? */
955 case QH_STATE_UNLINK_WAIT:
957 spin_unlock_irqrestore (&ehci->lock, flags);
958 schedule_timeout_uninterruptible(1);
960 case QH_STATE_IDLE: /* fully unlinked */
961 if (list_empty (&qh->qtd_list)) {
965 /* else FALL THROUGH */
968 /* caller was supposed to have unlinked any requests;
969 * that's not our job. just leak this memory.
971 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
972 qh, ep->desc.bEndpointAddress, qh->qh_state,
973 list_empty (&qh->qtd_list) ? "" : "(has tds)");
978 spin_unlock_irqrestore (&ehci->lock, flags);
982 static int ehci_get_frame (struct usb_hcd *hcd)
984 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
985 return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
989 /*-------------------------------------------------------------------------*/
991 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
993 MODULE_DESCRIPTION (DRIVER_INFO);
994 MODULE_AUTHOR (DRIVER_AUTHOR);
995 MODULE_LICENSE ("GPL");
998 #include "ehci-pci.c"
999 #define PCI_DRIVER ehci_pci_driver
1002 #ifdef CONFIG_USB_EHCI_FSL
1003 #include "ehci-fsl.c"
1004 #define PLATFORM_DRIVER ehci_fsl_driver
1007 #ifdef CONFIG_SOC_AU1200
1008 #include "ehci-au1xxx.c"
1009 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1012 #ifdef CONFIG_PPC_PS3
1013 #include "ehci-ps3.c"
1014 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1017 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
1018 #include "ehci-ppc-soc.c"
1019 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1022 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1023 #include "ehci-ppc-of.c"
1024 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1027 #ifdef CONFIG_PLAT_ORION
1028 #include "ehci-orion.c"
1029 #define PLATFORM_DRIVER ehci_orion_driver
1032 #ifdef CONFIG_ARCH_IXP4XX
1033 #include "ehci-ixp4xx.c"
1034 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1037 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1038 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1039 #error "missing bus glue for ehci-hcd"
1042 static int __init ehci_hcd_init(void)
1046 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1048 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1049 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1052 ehci_debug_root = debugfs_create_dir("ehci", NULL);
1053 if (!ehci_debug_root)
1057 #ifdef PLATFORM_DRIVER
1058 retval = platform_driver_register(&PLATFORM_DRIVER);
1064 retval = pci_register_driver(&PCI_DRIVER);
1069 #ifdef PS3_SYSTEM_BUS_DRIVER
1070 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1075 #ifdef OF_PLATFORM_DRIVER
1076 retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1082 #ifdef OF_PLATFORM_DRIVER
1083 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1086 #ifdef PS3_SYSTEM_BUS_DRIVER
1087 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1091 pci_unregister_driver(&PCI_DRIVER);
1094 #ifdef PLATFORM_DRIVER
1095 platform_driver_unregister(&PLATFORM_DRIVER);
1099 debugfs_remove(ehci_debug_root);
1100 ehci_debug_root = NULL;
1104 module_init(ehci_hcd_init);
1106 static void __exit ehci_hcd_cleanup(void)
1108 #ifdef OF_PLATFORM_DRIVER
1109 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1111 #ifdef PLATFORM_DRIVER
1112 platform_driver_unregister(&PLATFORM_DRIVER);
1115 pci_unregister_driver(&PCI_DRIVER);
1117 #ifdef PS3_SYSTEM_BUS_DRIVER
1118 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1121 debugfs_remove(ehci_debug_root);
1124 module_exit(ehci_hcd_cleanup);