[ARM] 4757/1: [AT91] UART initialization
[linux-2.6] / arch / arm / mach-at91 / at91rm9200_devices.c
1 /*
2  * arch/arm/mach-at91/at91rm9200_devices.c
3  *
4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5  *  Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <asm/arch/board.h>
21 #include <asm/arch/gpio.h>
22 #include <asm/arch/at91rm9200.h>
23 #include <asm/arch/at91rm9200_mc.h>
24
25 #include "generic.h"
26
27
28 /* --------------------------------------------------------------------
29  *  USB Host
30  * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource usbh_resources[] = {
37         [0] = {
38                 .start  = AT91RM9200_UHP_BASE,
39                 .end    = AT91RM9200_UHP_BASE + SZ_1M - 1,
40                 .flags  = IORESOURCE_MEM,
41         },
42         [1] = {
43                 .start  = AT91RM9200_ID_UHP,
44                 .end    = AT91RM9200_ID_UHP,
45                 .flags  = IORESOURCE_IRQ,
46         },
47 };
48
49 static struct platform_device at91rm9200_usbh_device = {
50         .name           = "at91_ohci",
51         .id             = -1,
52         .dev            = {
53                                 .dma_mask               = &ohci_dmamask,
54                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
55                                 .platform_data          = &usbh_data,
56         },
57         .resource       = usbh_resources,
58         .num_resources  = ARRAY_SIZE(usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63         if (!data)
64                 return;
65
66         usbh_data = *data;
67         platform_device_register(&at91rm9200_usbh_device);
68 }
69 #else
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71 #endif
72
73
74 /* --------------------------------------------------------------------
75  *  USB Device (Gadget)
76  * -------------------------------------------------------------------- */
77
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
80
81 static struct resource udc_resources[] = {
82         [0] = {
83                 .start  = AT91RM9200_BASE_UDP,
84                 .end    = AT91RM9200_BASE_UDP + SZ_16K - 1,
85                 .flags  = IORESOURCE_MEM,
86         },
87         [1] = {
88                 .start  = AT91RM9200_ID_UDP,
89                 .end    = AT91RM9200_ID_UDP,
90                 .flags  = IORESOURCE_IRQ,
91         },
92 };
93
94 static struct platform_device at91rm9200_udc_device = {
95         .name           = "at91_udc",
96         .id             = -1,
97         .dev            = {
98                                 .platform_data          = &udc_data,
99         },
100         .resource       = udc_resources,
101         .num_resources  = ARRAY_SIZE(udc_resources),
102 };
103
104 void __init at91_add_device_udc(struct at91_udc_data *data)
105 {
106         if (!data)
107                 return;
108
109         if (data->vbus_pin) {
110                 at91_set_gpio_input(data->vbus_pin, 0);
111                 at91_set_deglitch(data->vbus_pin, 1);
112         }
113         if (data->pullup_pin)
114                 at91_set_gpio_output(data->pullup_pin, 0);
115
116         udc_data = *data;
117         platform_device_register(&at91rm9200_udc_device);
118 }
119 #else
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
121 #endif
122
123
124 /* --------------------------------------------------------------------
125  *  Ethernet
126  * -------------------------------------------------------------------- */
127
128 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
129 static u64 eth_dmamask = DMA_BIT_MASK(32);
130 static struct at91_eth_data eth_data;
131
132 static struct resource eth_resources[] = {
133         [0] = {
134                 .start  = AT91_VA_BASE_EMAC,
135                 .end    = AT91_VA_BASE_EMAC + SZ_16K - 1,
136                 .flags  = IORESOURCE_MEM,
137         },
138         [1] = {
139                 .start  = AT91RM9200_ID_EMAC,
140                 .end    = AT91RM9200_ID_EMAC,
141                 .flags  = IORESOURCE_IRQ,
142         },
143 };
144
145 static struct platform_device at91rm9200_eth_device = {
146         .name           = "at91_ether",
147         .id             = -1,
148         .dev            = {
149                                 .dma_mask               = &eth_dmamask,
150                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
151                                 .platform_data          = &eth_data,
152         },
153         .resource       = eth_resources,
154         .num_resources  = ARRAY_SIZE(eth_resources),
155 };
156
157 void __init at91_add_device_eth(struct at91_eth_data *data)
158 {
159         if (!data)
160                 return;
161
162         if (data->phy_irq_pin) {
163                 at91_set_gpio_input(data->phy_irq_pin, 0);
164                 at91_set_deglitch(data->phy_irq_pin, 1);
165         }
166
167         /* Pins used for MII and RMII */
168         at91_set_A_periph(AT91_PIN_PA16, 0);    /* EMDIO */
169         at91_set_A_periph(AT91_PIN_PA15, 0);    /* EMDC */
170         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERXER */
171         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ERX1 */
172         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ERX0 */
173         at91_set_A_periph(AT91_PIN_PA11, 0);    /* ECRS_ECRSDV */
174         at91_set_A_periph(AT91_PIN_PA10, 0);    /* ETX1 */
175         at91_set_A_periph(AT91_PIN_PA9, 0);     /* ETX0 */
176         at91_set_A_periph(AT91_PIN_PA8, 0);     /* ETXEN */
177         at91_set_A_periph(AT91_PIN_PA7, 0);     /* ETXCK_EREFCK */
178
179         if (!data->is_rmii) {
180                 at91_set_B_periph(AT91_PIN_PB19, 0);    /* ERXCK */
181                 at91_set_B_periph(AT91_PIN_PB18, 0);    /* ECOL */
182                 at91_set_B_periph(AT91_PIN_PB17, 0);    /* ERXDV */
183                 at91_set_B_periph(AT91_PIN_PB16, 0);    /* ERX3 */
184                 at91_set_B_periph(AT91_PIN_PB15, 0);    /* ERX2 */
185                 at91_set_B_periph(AT91_PIN_PB14, 0);    /* ETXER */
186                 at91_set_B_periph(AT91_PIN_PB13, 0);    /* ETX3 */
187                 at91_set_B_periph(AT91_PIN_PB12, 0);    /* ETX2 */
188         }
189
190         eth_data = *data;
191         platform_device_register(&at91rm9200_eth_device);
192 }
193 #else
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199  *  Compact Flash / PCMCIA
200  * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
203 static struct at91_cf_data cf_data;
204
205 #define CF_BASE         AT91_CHIPSELECT_4
206
207 static struct resource cf_resources[] = {
208         [0] = {
209                 .start  = CF_BASE,
210                 /* ties up CS4, CS5 and CS6 */
211                 .end    = CF_BASE + (0x30000000 - 1),
212                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
213         },
214 };
215
216 static struct platform_device at91rm9200_cf_device = {
217         .name           = "at91_cf",
218         .id             = -1,
219         .dev            = {
220                                 .platform_data          = &cf_data,
221         },
222         .resource       = cf_resources,
223         .num_resources  = ARRAY_SIZE(cf_resources),
224 };
225
226 void __init at91_add_device_cf(struct at91_cf_data *data)
227 {
228         unsigned int csa;
229
230         if (!data)
231                 return;
232
233         data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
234
235         /* CF takes over CS4, CS5, CS6 */
236         csa = at91_sys_read(AT91_EBI_CSA);
237         at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
238
239         /*
240          * Static memory controller timing adjustments.
241          * REVISIT:  these timings are in terms of MCK cycles, so
242          * when MCK changes (cpufreq etc) so must these values...
243          */
244         at91_sys_write(AT91_SMC_CSR(4),
245                                   AT91_SMC_ACSS_STD
246                                 | AT91_SMC_DBW_16
247                                 | AT91_SMC_BAT
248                                 | AT91_SMC_WSEN
249                                 | AT91_SMC_NWS_(32)     /* wait states */
250                                 | AT91_SMC_RWSETUP_(6)  /* setup time */
251                                 | AT91_SMC_RWHOLD_(4)   /* hold time */
252         );
253
254         /* input/irq */
255         if (data->irq_pin) {
256                 at91_set_gpio_input(data->irq_pin, 1);
257                 at91_set_deglitch(data->irq_pin, 1);
258         }
259         at91_set_gpio_input(data->det_pin, 1);
260         at91_set_deglitch(data->det_pin, 1);
261
262         /* outputs, initially off */
263         if (data->vcc_pin)
264                 at91_set_gpio_output(data->vcc_pin, 0);
265         at91_set_gpio_output(data->rst_pin, 0);
266
267         /* force poweron defaults for these pins ... */
268         at91_set_A_periph(AT91_PIN_PC9, 0);     /* A25/CFRNW */
269         at91_set_A_periph(AT91_PIN_PC10, 0);    /* NCS4/CFCS */
270         at91_set_A_periph(AT91_PIN_PC11, 0);    /* NCS5/CFCE1 */
271         at91_set_A_periph(AT91_PIN_PC12, 0);    /* NCS6/CFCE2 */
272
273         /* nWAIT is _not_ a default setting */
274         at91_set_A_periph(AT91_PIN_PC6, 1);     /* nWAIT */
275
276         cf_data = *data;
277         platform_device_register(&at91rm9200_cf_device);
278 }
279 #else
280 void __init at91_add_device_cf(struct at91_cf_data *data) {}
281 #endif
282
283
284 /* --------------------------------------------------------------------
285  *  MMC / SD
286  * -------------------------------------------------------------------- */
287
288 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
289 static u64 mmc_dmamask = DMA_BIT_MASK(32);
290 static struct at91_mmc_data mmc_data;
291
292 static struct resource mmc_resources[] = {
293         [0] = {
294                 .start  = AT91RM9200_BASE_MCI,
295                 .end    = AT91RM9200_BASE_MCI + SZ_16K - 1,
296                 .flags  = IORESOURCE_MEM,
297         },
298         [1] = {
299                 .start  = AT91RM9200_ID_MCI,
300                 .end    = AT91RM9200_ID_MCI,
301                 .flags  = IORESOURCE_IRQ,
302         },
303 };
304
305 static struct platform_device at91rm9200_mmc_device = {
306         .name           = "at91_mci",
307         .id             = -1,
308         .dev            = {
309                                 .dma_mask               = &mmc_dmamask,
310                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
311                                 .platform_data          = &mmc_data,
312         },
313         .resource       = mmc_resources,
314         .num_resources  = ARRAY_SIZE(mmc_resources),
315 };
316
317 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
318 {
319         if (!data)
320                 return;
321
322         /* input/irq */
323         if (data->det_pin) {
324                 at91_set_gpio_input(data->det_pin, 1);
325                 at91_set_deglitch(data->det_pin, 1);
326         }
327         if (data->wp_pin)
328                 at91_set_gpio_input(data->wp_pin, 1);
329         if (data->vcc_pin)
330                 at91_set_gpio_output(data->vcc_pin, 0);
331
332         /* CLK */
333         at91_set_A_periph(AT91_PIN_PA27, 0);
334
335         if (data->slot_b) {
336                 /* CMD */
337                 at91_set_B_periph(AT91_PIN_PA8, 1);
338
339                 /* DAT0, maybe DAT1..DAT3 */
340                 at91_set_B_periph(AT91_PIN_PA9, 1);
341                 if (data->wire4) {
342                         at91_set_B_periph(AT91_PIN_PA10, 1);
343                         at91_set_B_periph(AT91_PIN_PA11, 1);
344                         at91_set_B_periph(AT91_PIN_PA12, 1);
345                 }
346         } else {
347                 /* CMD */
348                 at91_set_A_periph(AT91_PIN_PA28, 1);
349
350                 /* DAT0, maybe DAT1..DAT3 */
351                 at91_set_A_periph(AT91_PIN_PA29, 1);
352                 if (data->wire4) {
353                         at91_set_B_periph(AT91_PIN_PB3, 1);
354                         at91_set_B_periph(AT91_PIN_PB4, 1);
355                         at91_set_B_periph(AT91_PIN_PB5, 1);
356                 }
357         }
358
359         mmc_data = *data;
360         platform_device_register(&at91rm9200_mmc_device);
361 }
362 #else
363 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
364 #endif
365
366
367 /* --------------------------------------------------------------------
368  *  NAND / SmartMedia
369  * -------------------------------------------------------------------- */
370
371 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
372 static struct at91_nand_data nand_data;
373
374 #define NAND_BASE       AT91_CHIPSELECT_3
375
376 static struct resource nand_resources[] = {
377         {
378                 .start  = NAND_BASE,
379                 .end    = NAND_BASE + SZ_256M - 1,
380                 .flags  = IORESOURCE_MEM,
381         }
382 };
383
384 static struct platform_device at91rm9200_nand_device = {
385         .name           = "at91_nand",
386         .id             = -1,
387         .dev            = {
388                                 .platform_data  = &nand_data,
389         },
390         .resource       = nand_resources,
391         .num_resources  = ARRAY_SIZE(nand_resources),
392 };
393
394 void __init at91_add_device_nand(struct at91_nand_data *data)
395 {
396         unsigned int csa;
397
398         if (!data)
399                 return;
400
401         /* enable the address range of CS3 */
402         csa = at91_sys_read(AT91_EBI_CSA);
403         at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
404
405         /* set the bus interface characteristics */
406         at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
407                 | AT91_SMC_NWS_(5)
408                 | AT91_SMC_TDF_(1)
409                 | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
410                 | AT91_SMC_RWHOLD_(1)   /* tDH Data Hold Time 20 - ns */
411         );
412
413         /* enable pin */
414         if (data->enable_pin)
415                 at91_set_gpio_output(data->enable_pin, 1);
416
417         /* ready/busy pin */
418         if (data->rdy_pin)
419                 at91_set_gpio_input(data->rdy_pin, 1);
420
421         /* card detect pin */
422         if (data->det_pin)
423                 at91_set_gpio_input(data->det_pin, 1);
424
425         at91_set_A_periph(AT91_PIN_PC1, 0);             /* SMOE */
426         at91_set_A_periph(AT91_PIN_PC3, 0);             /* SMWE */
427
428         nand_data = *data;
429         platform_device_register(&at91rm9200_nand_device);
430 }
431 #else
432 void __init at91_add_device_nand(struct at91_nand_data *data) {}
433 #endif
434
435
436 /* --------------------------------------------------------------------
437  *  TWI (i2c)
438  * -------------------------------------------------------------------- */
439
440 /*
441  * Prefer the GPIO code since the TWI controller isn't robust
442  * (gets overruns and underruns under load) and can only issue
443  * repeated STARTs in one scenario (the driver doesn't yet handle them).
444  */
445 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
446
447 static struct i2c_gpio_platform_data pdata = {
448         .sda_pin                = AT91_PIN_PA25,
449         .sda_is_open_drain      = 1,
450         .scl_pin                = AT91_PIN_PA26,
451         .scl_is_open_drain      = 1,
452         .udelay                 = 2,            /* ~100 kHz */
453 };
454
455 static struct platform_device at91rm9200_twi_device = {
456         .name                   = "i2c-gpio",
457         .id                     = -1,
458         .dev.platform_data      = &pdata,
459 };
460
461 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
462 {
463         at91_set_GPIO_periph(AT91_PIN_PA25, 1);         /* TWD (SDA) */
464         at91_set_multi_drive(AT91_PIN_PA25, 1);
465
466         at91_set_GPIO_periph(AT91_PIN_PA26, 1);         /* TWCK (SCL) */
467         at91_set_multi_drive(AT91_PIN_PA26, 1);
468
469         i2c_register_board_info(0, devices, nr_devices);
470         platform_device_register(&at91rm9200_twi_device);
471 }
472
473 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
474
475 static struct resource twi_resources[] = {
476         [0] = {
477                 .start  = AT91RM9200_BASE_TWI,
478                 .end    = AT91RM9200_BASE_TWI + SZ_16K - 1,
479                 .flags  = IORESOURCE_MEM,
480         },
481         [1] = {
482                 .start  = AT91RM9200_ID_TWI,
483                 .end    = AT91RM9200_ID_TWI,
484                 .flags  = IORESOURCE_IRQ,
485         },
486 };
487
488 static struct platform_device at91rm9200_twi_device = {
489         .name           = "at91_i2c",
490         .id             = -1,
491         .resource       = twi_resources,
492         .num_resources  = ARRAY_SIZE(twi_resources),
493 };
494
495 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
496 {
497         /* pins used for TWI interface */
498         at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
499         at91_set_multi_drive(AT91_PIN_PA25, 1);
500
501         at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
502         at91_set_multi_drive(AT91_PIN_PA26, 1);
503
504         i2c_register_board_info(0, devices, nr_devices);
505         platform_device_register(&at91rm9200_twi_device);
506 }
507 #else
508 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
509 #endif
510
511
512 /* --------------------------------------------------------------------
513  *  SPI
514  * -------------------------------------------------------------------- */
515
516 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
517 static u64 spi_dmamask = DMA_BIT_MASK(32);
518
519 static struct resource spi_resources[] = {
520         [0] = {
521                 .start  = AT91RM9200_BASE_SPI,
522                 .end    = AT91RM9200_BASE_SPI + SZ_16K - 1,
523                 .flags  = IORESOURCE_MEM,
524         },
525         [1] = {
526                 .start  = AT91RM9200_ID_SPI,
527                 .end    = AT91RM9200_ID_SPI,
528                 .flags  = IORESOURCE_IRQ,
529         },
530 };
531
532 static struct platform_device at91rm9200_spi_device = {
533         .name           = "atmel_spi",
534         .id             = 0,
535         .dev            = {
536                                 .dma_mask               = &spi_dmamask,
537                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
538         },
539         .resource       = spi_resources,
540         .num_resources  = ARRAY_SIZE(spi_resources),
541 };
542
543 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
544
545 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
546 {
547         int i;
548         unsigned long cs_pin;
549
550         at91_set_A_periph(AT91_PIN_PA0, 0);     /* MISO */
551         at91_set_A_periph(AT91_PIN_PA1, 0);     /* MOSI */
552         at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPCK */
553
554         /* Enable SPI chip-selects */
555         for (i = 0; i < nr_devices; i++) {
556                 if (devices[i].controller_data)
557                         cs_pin = (unsigned long) devices[i].controller_data;
558                 else
559                         cs_pin = spi_standard_cs[devices[i].chip_select];
560
561                 /* enable chip-select pin */
562                 at91_set_gpio_output(cs_pin, 1);
563
564                 /* pass chip-select pin to driver */
565                 devices[i].controller_data = (void *) cs_pin;
566         }
567
568         spi_register_board_info(devices, nr_devices);
569         platform_device_register(&at91rm9200_spi_device);
570 }
571 #else
572 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
573 #endif
574
575
576 /* --------------------------------------------------------------------
577  *  RTC
578  * -------------------------------------------------------------------- */
579
580 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
581 static struct platform_device at91rm9200_rtc_device = {
582         .name           = "at91_rtc",
583         .id             = -1,
584         .num_resources  = 0,
585 };
586
587 static void __init at91_add_device_rtc(void)
588 {
589         platform_device_register(&at91rm9200_rtc_device);
590 }
591 #else
592 static void __init at91_add_device_rtc(void) {}
593 #endif
594
595
596 /* --------------------------------------------------------------------
597  *  Watchdog
598  * -------------------------------------------------------------------- */
599
600 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
601 static struct platform_device at91rm9200_wdt_device = {
602         .name           = "at91_wdt",
603         .id             = -1,
604         .num_resources  = 0,
605 };
606
607 static void __init at91_add_device_watchdog(void)
608 {
609         platform_device_register(&at91rm9200_wdt_device);
610 }
611 #else
612 static void __init at91_add_device_watchdog(void) {}
613 #endif
614
615
616 /* --------------------------------------------------------------------
617  *  LEDs
618  * -------------------------------------------------------------------- */
619
620 #if defined(CONFIG_LEDS)
621 u8 at91_leds_cpu;
622 u8 at91_leds_timer;
623
624 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
625 {
626         /* Enable GPIO to access the LEDs */
627         at91_set_gpio_output(cpu_led, 1);
628         at91_set_gpio_output(timer_led, 1);
629
630         at91_leds_cpu   = cpu_led;
631         at91_leds_timer = timer_led;
632 }
633 #else
634 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
635 #endif
636
637
638 /* --------------------------------------------------------------------
639  *  SSC -- Synchronous Serial Controller
640  * -------------------------------------------------------------------- */
641
642 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
643 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
644
645 static struct resource ssc0_resources[] = {
646         [0] = {
647                 .start  = AT91RM9200_BASE_SSC0,
648                 .end    = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
649                 .flags  = IORESOURCE_MEM,
650         },
651         [1] = {
652                 .start  = AT91RM9200_ID_SSC0,
653                 .end    = AT91RM9200_ID_SSC0,
654                 .flags  = IORESOURCE_IRQ,
655         },
656 };
657
658 static struct platform_device at91rm9200_ssc0_device = {
659         .name   = "ssc",
660         .id     = 0,
661         .dev    = {
662                 .dma_mask               = &ssc0_dmamask,
663                 .coherent_dma_mask      = DMA_BIT_MASK(32),
664         },
665         .resource       = ssc0_resources,
666         .num_resources  = ARRAY_SIZE(ssc0_resources),
667 };
668
669 static inline void configure_ssc0_pins(unsigned pins)
670 {
671         if (pins & ATMEL_SSC_TF)
672                 at91_set_A_periph(AT91_PIN_PB0, 1);
673         if (pins & ATMEL_SSC_TK)
674                 at91_set_A_periph(AT91_PIN_PB1, 1);
675         if (pins & ATMEL_SSC_TD)
676                 at91_set_A_periph(AT91_PIN_PB2, 1);
677         if (pins & ATMEL_SSC_RD)
678                 at91_set_A_periph(AT91_PIN_PB3, 1);
679         if (pins & ATMEL_SSC_RK)
680                 at91_set_A_periph(AT91_PIN_PB4, 1);
681         if (pins & ATMEL_SSC_RF)
682                 at91_set_A_periph(AT91_PIN_PB5, 1);
683 }
684
685 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
686
687 static struct resource ssc1_resources[] = {
688         [0] = {
689                 .start  = AT91RM9200_BASE_SSC1,
690                 .end    = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
691                 .flags  = IORESOURCE_MEM,
692         },
693         [1] = {
694                 .start  = AT91RM9200_ID_SSC1,
695                 .end    = AT91RM9200_ID_SSC1,
696                 .flags  = IORESOURCE_IRQ,
697         },
698 };
699
700 static struct platform_device at91rm9200_ssc1_device = {
701         .name   = "ssc",
702         .id     = 1,
703         .dev    = {
704                 .dma_mask               = &ssc1_dmamask,
705                 .coherent_dma_mask      = DMA_BIT_MASK(32),
706         },
707         .resource       = ssc1_resources,
708         .num_resources  = ARRAY_SIZE(ssc1_resources),
709 };
710
711 static inline void configure_ssc1_pins(unsigned pins)
712 {
713         if (pins & ATMEL_SSC_TF)
714                 at91_set_A_periph(AT91_PIN_PB6, 1);
715         if (pins & ATMEL_SSC_TK)
716                 at91_set_A_periph(AT91_PIN_PB7, 1);
717         if (pins & ATMEL_SSC_TD)
718                 at91_set_A_periph(AT91_PIN_PB8, 1);
719         if (pins & ATMEL_SSC_RD)
720                 at91_set_A_periph(AT91_PIN_PB9, 1);
721         if (pins & ATMEL_SSC_RK)
722                 at91_set_A_periph(AT91_PIN_PB10, 1);
723         if (pins & ATMEL_SSC_RF)
724                 at91_set_A_periph(AT91_PIN_PB11, 1);
725 }
726
727 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
728
729 static struct resource ssc2_resources[] = {
730         [0] = {
731                 .start  = AT91RM9200_BASE_SSC2,
732                 .end    = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
733                 .flags  = IORESOURCE_MEM,
734         },
735         [1] = {
736                 .start  = AT91RM9200_ID_SSC2,
737                 .end    = AT91RM9200_ID_SSC2,
738                 .flags  = IORESOURCE_IRQ,
739         },
740 };
741
742 static struct platform_device at91rm9200_ssc2_device = {
743         .name   = "ssc",
744         .id     = 2,
745         .dev    = {
746                 .dma_mask               = &ssc2_dmamask,
747                 .coherent_dma_mask      = DMA_BIT_MASK(32),
748         },
749         .resource       = ssc2_resources,
750         .num_resources  = ARRAY_SIZE(ssc2_resources),
751 };
752
753 static inline void configure_ssc2_pins(unsigned pins)
754 {
755         if (pins & ATMEL_SSC_TF)
756                 at91_set_A_periph(AT91_PIN_PB12, 1);
757         if (pins & ATMEL_SSC_TK)
758                 at91_set_A_periph(AT91_PIN_PB13, 1);
759         if (pins & ATMEL_SSC_TD)
760                 at91_set_A_periph(AT91_PIN_PB14, 1);
761         if (pins & ATMEL_SSC_RD)
762                 at91_set_A_periph(AT91_PIN_PB15, 1);
763         if (pins & ATMEL_SSC_RK)
764                 at91_set_A_periph(AT91_PIN_PB16, 1);
765         if (pins & ATMEL_SSC_RF)
766                 at91_set_A_periph(AT91_PIN_PB17, 1);
767 }
768
769 /*
770  * SSC controllers are accessed through library code, instead of any
771  * kind of all-singing/all-dancing driver.  For example one could be
772  * used by a particular I2S audio codec's driver, while another one
773  * on the same system might be used by a custom data capture driver.
774  */
775 void __init at91_add_device_ssc(unsigned id, unsigned pins)
776 {
777         struct platform_device *pdev;
778
779         /*
780          * NOTE: caller is responsible for passing information matching
781          * "pins" to whatever will be using each particular controller.
782          */
783         switch (id) {
784         case AT91RM9200_ID_SSC0:
785                 pdev = &at91rm9200_ssc0_device;
786                 configure_ssc0_pins(pins);
787                 at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
788                 break;
789         case AT91RM9200_ID_SSC1:
790                 pdev = &at91rm9200_ssc1_device;
791                 configure_ssc1_pins(pins);
792                 at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
793                 break;
794         case AT91RM9200_ID_SSC2:
795                 pdev = &at91rm9200_ssc2_device;
796                 configure_ssc2_pins(pins);
797                 at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");
798                 break;
799         default:
800                 return;
801         }
802
803         platform_device_register(pdev);
804 }
805
806 #else
807 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
808 #endif
809
810
811 /* --------------------------------------------------------------------
812  *  UART
813  * -------------------------------------------------------------------- */
814
815 #if defined(CONFIG_SERIAL_ATMEL)
816 static struct resource dbgu_resources[] = {
817         [0] = {
818                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
819                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
820                 .flags  = IORESOURCE_MEM,
821         },
822         [1] = {
823                 .start  = AT91_ID_SYS,
824                 .end    = AT91_ID_SYS,
825                 .flags  = IORESOURCE_IRQ,
826         },
827 };
828
829 static struct atmel_uart_data dbgu_data = {
830         .use_dma_tx     = 0,
831         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
832         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
833 };
834
835 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
836
837 static struct platform_device at91rm9200_dbgu_device = {
838         .name           = "atmel_usart",
839         .id             = 0,
840         .dev            = {
841                                 .dma_mask               = &dbgu_dmamask,
842                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
843                                 .platform_data          = &dbgu_data,
844         },
845         .resource       = dbgu_resources,
846         .num_resources  = ARRAY_SIZE(dbgu_resources),
847 };
848
849 static inline void configure_dbgu_pins(void)
850 {
851         at91_set_A_periph(AT91_PIN_PA30, 0);            /* DRXD */
852         at91_set_A_periph(AT91_PIN_PA31, 1);            /* DTXD */
853 }
854
855 static struct resource uart0_resources[] = {
856         [0] = {
857                 .start  = AT91RM9200_BASE_US0,
858                 .end    = AT91RM9200_BASE_US0 + SZ_16K - 1,
859                 .flags  = IORESOURCE_MEM,
860         },
861         [1] = {
862                 .start  = AT91RM9200_ID_US0,
863                 .end    = AT91RM9200_ID_US0,
864                 .flags  = IORESOURCE_IRQ,
865         },
866 };
867
868 static struct atmel_uart_data uart0_data = {
869         .use_dma_tx     = 1,
870         .use_dma_rx     = 1,
871 };
872
873 static u64 uart0_dmamask = DMA_BIT_MASK(32);
874
875 static struct platform_device at91rm9200_uart0_device = {
876         .name           = "atmel_usart",
877         .id             = 1,
878         .dev            = {
879                                 .dma_mask               = &uart0_dmamask,
880                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
881                                 .platform_data          = &uart0_data,
882         },
883         .resource       = uart0_resources,
884         .num_resources  = ARRAY_SIZE(uart0_resources),
885 };
886
887 static inline void configure_usart0_pins(unsigned pins)
888 {
889         at91_set_A_periph(AT91_PIN_PA17, 1);            /* TXD0 */
890         at91_set_A_periph(AT91_PIN_PA18, 0);            /* RXD0 */
891
892         if (pins & ATMEL_UART_CTS)
893                 at91_set_A_periph(AT91_PIN_PA20, 0);    /* CTS0 */
894
895         if (pins & ATMEL_UART_RTS) {
896                 /*
897                  * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
898                  *  We need to drive the pin manually.  Default is off (RTS is active low).
899                  */
900                 at91_set_gpio_output(AT91_PIN_PA21, 1);
901         }
902 }
903
904 static struct resource uart1_resources[] = {
905         [0] = {
906                 .start  = AT91RM9200_BASE_US1,
907                 .end    = AT91RM9200_BASE_US1 + SZ_16K - 1,
908                 .flags  = IORESOURCE_MEM,
909         },
910         [1] = {
911                 .start  = AT91RM9200_ID_US1,
912                 .end    = AT91RM9200_ID_US1,
913                 .flags  = IORESOURCE_IRQ,
914         },
915 };
916
917 static struct atmel_uart_data uart1_data = {
918         .use_dma_tx     = 1,
919         .use_dma_rx     = 1,
920 };
921
922 static u64 uart1_dmamask = DMA_BIT_MASK(32);
923
924 static struct platform_device at91rm9200_uart1_device = {
925         .name           = "atmel_usart",
926         .id             = 2,
927         .dev            = {
928                                 .dma_mask               = &uart1_dmamask,
929                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
930                                 .platform_data          = &uart1_data,
931         },
932         .resource       = uart1_resources,
933         .num_resources  = ARRAY_SIZE(uart1_resources),
934 };
935
936 static inline void configure_usart1_pins(unsigned pins)
937 {
938         at91_set_A_periph(AT91_PIN_PB20, 1);            /* TXD1 */
939         at91_set_A_periph(AT91_PIN_PB21, 0);            /* RXD1 */
940
941         if (pins & ATMEL_UART_RI)
942                 at91_set_A_periph(AT91_PIN_PB18, 0);    /* RI1 */
943         if (pins & ATMEL_UART_DTR)
944                 at91_set_A_periph(AT91_PIN_PB19, 0);    /* DTR1 */
945         if (pins & ATMEL_UART_DCD)
946                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD1 */
947         if (pins & ATMEL_UART_CTS)
948                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* CTS1 */
949         if (pins & ATMEL_UART_DSR)
950                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* DSR1 */
951         if (pins & ATMEL_UART_RTS)
952                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS1 */
953 }
954
955 static struct resource uart2_resources[] = {
956         [0] = {
957                 .start  = AT91RM9200_BASE_US2,
958                 .end    = AT91RM9200_BASE_US2 + SZ_16K - 1,
959                 .flags  = IORESOURCE_MEM,
960         },
961         [1] = {
962                 .start  = AT91RM9200_ID_US2,
963                 .end    = AT91RM9200_ID_US2,
964                 .flags  = IORESOURCE_IRQ,
965         },
966 };
967
968 static struct atmel_uart_data uart2_data = {
969         .use_dma_tx     = 1,
970         .use_dma_rx     = 1,
971 };
972
973 static u64 uart2_dmamask = DMA_BIT_MASK(32);
974
975 static struct platform_device at91rm9200_uart2_device = {
976         .name           = "atmel_usart",
977         .id             = 3,
978         .dev            = {
979                                 .dma_mask               = &uart2_dmamask,
980                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
981                                 .platform_data          = &uart2_data,
982         },
983         .resource       = uart2_resources,
984         .num_resources  = ARRAY_SIZE(uart2_resources),
985 };
986
987 static inline void configure_usart2_pins(unsigned pins)
988 {
989         at91_set_A_periph(AT91_PIN_PA22, 0);            /* RXD2 */
990         at91_set_A_periph(AT91_PIN_PA23, 1);            /* TXD2 */
991
992         if (pins & ATMEL_UART_CTS)
993                 at91_set_B_periph(AT91_PIN_PA30, 0);    /* CTS2 */
994         if (pins & ATMEL_UART_RTS)
995                 at91_set_B_periph(AT91_PIN_PA31, 0);    /* RTS2 */
996 }
997
998 static struct resource uart3_resources[] = {
999         [0] = {
1000                 .start  = AT91RM9200_BASE_US3,
1001                 .end    = AT91RM9200_BASE_US3 + SZ_16K - 1,
1002                 .flags  = IORESOURCE_MEM,
1003         },
1004         [1] = {
1005                 .start  = AT91RM9200_ID_US3,
1006                 .end    = AT91RM9200_ID_US3,
1007                 .flags  = IORESOURCE_IRQ,
1008         },
1009 };
1010
1011 static struct atmel_uart_data uart3_data = {
1012         .use_dma_tx     = 1,
1013         .use_dma_rx     = 1,
1014 };
1015
1016 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1017
1018 static struct platform_device at91rm9200_uart3_device = {
1019         .name           = "atmel_usart",
1020         .id             = 4,
1021         .dev            = {
1022                                 .dma_mask               = &uart3_dmamask,
1023                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1024                                 .platform_data          = &uart3_data,
1025         },
1026         .resource       = uart3_resources,
1027         .num_resources  = ARRAY_SIZE(uart3_resources),
1028 };
1029
1030 static inline void configure_usart3_pins(unsigned pins)
1031 {
1032         at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
1033         at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
1034
1035         if (pins & ATMEL_UART_CTS)
1036                 at91_set_B_periph(AT91_PIN_PB1, 0);     /* CTS3 */
1037         if (pins & ATMEL_UART_RTS)
1038                 at91_set_B_periph(AT91_PIN_PB0, 0);     /* RTS3 */
1039 }
1040
1041 static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
1042 struct platform_device *atmel_default_console_device;   /* the serial console device */
1043
1044 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1045 {
1046         int i;
1047
1048         /* Fill in list of supported UARTs */
1049         for (i = 0; i < config->nr_tty; i++) {
1050                 switch (config->tty_map[i]) {
1051                         case 0:
1052                                 configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
1053                                 at91_uarts[i] = &at91rm9200_uart0_device;
1054                                 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
1055                                 break;
1056                         case 1:
1057                                 configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
1058                                 at91_uarts[i] = &at91rm9200_uart1_device;
1059                                 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
1060                                 break;
1061                         case 2:
1062                                 configure_usart2_pins(0);
1063                                 at91_uarts[i] = &at91rm9200_uart2_device;
1064                                 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
1065                                 break;
1066                         case 3:
1067                                 configure_usart3_pins(0);
1068                                 at91_uarts[i] = &at91rm9200_uart3_device;
1069                                 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
1070                                 break;
1071                         case 4:
1072                                 configure_dbgu_pins();
1073                                 at91_uarts[i] = &at91rm9200_dbgu_device;
1074                                 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
1075                                 break;
1076                         default:
1077                                 continue;
1078                 }
1079                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
1080         }
1081
1082         /* Set serial console device */
1083         if (config->console_tty < ATMEL_MAX_UART)
1084                 atmel_default_console_device = at91_uarts[config->console_tty];
1085         if (!atmel_default_console_device)
1086                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1087 }
1088
1089 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1090 {
1091         struct platform_device *pdev;
1092
1093         switch (id) {
1094                 case 0:         /* DBGU */
1095                         pdev = &at91rm9200_dbgu_device;
1096                         configure_dbgu_pins();
1097                         at91_clock_associate("mck", &pdev->dev, "usart");
1098                         break;
1099                 case AT91RM9200_ID_US0:
1100                         pdev = &at91rm9200_uart0_device;
1101                         configure_usart0_pins(pins);
1102                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1103                         break;
1104                 case AT91RM9200_ID_US1:
1105                         pdev = &at91rm9200_uart1_device;
1106                         configure_usart1_pins(pins);
1107                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1108                         break;
1109                 case AT91RM9200_ID_US2:
1110                         pdev = &at91rm9200_uart2_device;
1111                         configure_usart2_pins(pins);
1112                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1113                         break;
1114                 case AT91RM9200_ID_US3:
1115                         pdev = &at91rm9200_uart3_device;
1116                         configure_usart3_pins(pins);
1117                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1118                         break;
1119                 default:
1120                         return;
1121         }
1122         pdev->id = portnr;              /* update to mapped ID */
1123
1124         if (portnr < ATMEL_MAX_UART)
1125                 at91_uarts[portnr] = pdev;
1126 }
1127
1128 void __init at91_set_serial_console(unsigned portnr)
1129 {
1130         if (portnr < ATMEL_MAX_UART)
1131                 atmel_default_console_device = at91_uarts[portnr];
1132         if (!atmel_default_console_device)
1133                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1134 }
1135
1136 void __init at91_add_device_serial(void)
1137 {
1138         int i;
1139
1140         for (i = 0; i < ATMEL_MAX_UART; i++) {
1141                 if (at91_uarts[i])
1142                         platform_device_register(at91_uarts[i]);
1143         }
1144 }
1145 #else
1146 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1147 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1148 void __init at91_set_serial_console(unsigned portnr) {}
1149 void __init at91_add_device_serial(void) {}
1150 #endif
1151
1152
1153 /* -------------------------------------------------------------------- */
1154
1155 /*
1156  * These devices are always present and don't need any board-specific
1157  * setup.
1158  */
1159 static int __init at91_add_standard_devices(void)
1160 {
1161         at91_add_device_rtc();
1162         at91_add_device_watchdog();
1163         return 0;
1164 }
1165
1166 arch_initcall(at91_add_standard_devices);