Blackfin Serial Driver: move common variables out of serial headers and into the...
[linux-2.6] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2008 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
46 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
47
48 /*
49  * Setup for console. Argument comes from the menuconfig
50  */
51 #define DMA_RX_XCOUNT           512
52 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
53
54 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
55 #define CTS_CHECK_JIFFIES       (HZ / 50)
56
57 #ifdef CONFIG_SERIAL_BFIN_DMA
58 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
59 #else
60 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
61 #endif
62
63 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
64
65 /*
66  * interrupts are disabled on entry
67  */
68 static void bfin_serial_stop_tx(struct uart_port *port)
69 {
70         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
71         struct circ_buf *xmit = &uart->port.info->xmit;
72
73         while (!(UART_GET_LSR(uart) & TEMT))
74                 cpu_relax();
75
76 #ifdef CONFIG_SERIAL_BFIN_DMA
77         disable_dma(uart->tx_dma_channel);
78         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
79         uart->port.icount.tx += uart->tx_count;
80         uart->tx_count = 0;
81         uart->tx_done = 1;
82 #else
83 #ifdef CONFIG_BF54x
84         /* Clear TFI bit */
85         UART_PUT_LSR(uart, TFI);
86 #endif
87         UART_CLEAR_IER(uart, ETBEI);
88 #endif
89 }
90
91 /*
92  * port is locked and interrupts are disabled
93  */
94 static void bfin_serial_start_tx(struct uart_port *port)
95 {
96         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
97
98 #ifdef CONFIG_SERIAL_BFIN_DMA
99         if (uart->tx_done)
100                 bfin_serial_dma_tx_chars(uart);
101 #else
102         UART_SET_IER(uart, ETBEI);
103         bfin_serial_tx_chars(uart);
104 #endif
105 }
106
107 /*
108  * Interrupts are enabled
109  */
110 static void bfin_serial_stop_rx(struct uart_port *port)
111 {
112         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
113 #ifdef CONFIG_KGDB_UART
114         if (uart->port.line != CONFIG_KGDB_UART_PORT)
115 #endif
116         UART_CLEAR_IER(uart, ERBFI);
117 }
118
119 /*
120  * Set the modem control timer to fire immediately.
121  */
122 static void bfin_serial_enable_ms(struct uart_port *port)
123 {
124 }
125
126 #ifdef CONFIG_KGDB_UART
127 static int kgdb_entry_state;
128
129 void kgdb_put_debug_char(int chr)
130 {
131         struct bfin_serial_port *uart;
132
133         if (CONFIG_KGDB_UART_PORT < 0
134                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
135                 uart = &bfin_serial_ports[0];
136         else
137                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
138
139         while (!(UART_GET_LSR(uart) & THRE)) {
140                 SSYNC();
141         }
142
143         UART_CLEAR_DLAB(uart);
144         UART_PUT_CHAR(uart, (unsigned char)chr);
145         SSYNC();
146 }
147
148 int kgdb_get_debug_char(void)
149 {
150         struct bfin_serial_port *uart;
151         unsigned char chr;
152
153         if (CONFIG_KGDB_UART_PORT < 0
154                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
155                 uart = &bfin_serial_ports[0];
156         else
157                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
158
159         while(!(UART_GET_LSR(uart) & DR)) {
160                 SSYNC();
161         }
162         UART_CLEAR_DLAB(uart);
163         chr = UART_GET_CHAR(uart);
164         SSYNC();
165
166         return chr;
167 }
168 #endif
169
170 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
171 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
172 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
173 #else
174 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
175 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
176 #endif
177
178 #ifdef CONFIG_SERIAL_BFIN_PIO
179 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
180 {
181         struct tty_struct *tty = uart->port.info->port.tty;
182         unsigned int status, ch, flg;
183         static struct timeval anomaly_start = { .tv_sec = 0 };
184
185         status = UART_GET_LSR(uart);
186         UART_CLEAR_LSR(uart);
187
188         ch = UART_GET_CHAR(uart);
189         uart->port.icount.rx++;
190
191 #ifdef CONFIG_KGDB_UART
192         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
193                 struct pt_regs *regs = get_irq_regs();
194                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
195                         kgdb_breakkey_pressed(regs);
196                         return;
197                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
198                         kgdb_entry_state = 1;
199                 } else if (kgdb_entry_state == 1 && ch == 'q') {
200                         kgdb_entry_state = 0;
201                         kgdb_breakkey_pressed(regs);
202                         return;
203                 } else if (ch == 0x3) {/* Ctrl + C */
204                         kgdb_entry_state = 0;
205                         kgdb_breakkey_pressed(regs);
206                         return;
207                 } else {
208                         kgdb_entry_state = 0;
209                 }
210         }
211 #endif
212
213         if (ANOMALY_05000363) {
214                 /* The BF533 (and BF561) family of processors have a nice anomaly
215                  * where they continuously generate characters for a "single" break.
216                  * We have to basically ignore this flood until the "next" valid
217                  * character comes across.  Due to the nature of the flood, it is
218                  * not possible to reliably catch bytes that are sent too quickly
219                  * after this break.  So application code talking to the Blackfin
220                  * which sends a break signal must allow at least 1.5 character
221                  * times after the end of the break for things to stabilize.  This
222                  * timeout was picked as it must absolutely be larger than 1
223                  * character time +/- some percent.  So 1.5 sounds good.  All other
224                  * Blackfin families operate properly.  Woo.
225                  */
226                 if (anomaly_start.tv_sec) {
227                         struct timeval curr;
228                         suseconds_t usecs;
229
230                         if ((~ch & (~ch + 1)) & 0xff)
231                                 goto known_good_char;
232
233                         do_gettimeofday(&curr);
234                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
235                                 goto known_good_char;
236
237                         usecs = 0;
238                         if (curr.tv_sec != anomaly_start.tv_sec)
239                                 usecs += USEC_PER_SEC;
240                         usecs += curr.tv_usec - anomaly_start.tv_usec;
241
242                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
243                                 goto known_good_char;
244
245                         if (ch)
246                                 anomaly_start.tv_sec = 0;
247                         else
248                                 anomaly_start = curr;
249
250                         return;
251
252  known_good_char:
253                         anomaly_start.tv_sec = 0;
254                 }
255         }
256
257         if (status & BI) {
258                 if (ANOMALY_05000363)
259                         if (bfin_revid() < 5)
260                                 do_gettimeofday(&anomaly_start);
261                 uart->port.icount.brk++;
262                 if (uart_handle_break(&uart->port))
263                         goto ignore_char;
264                 status &= ~(PE | FE);
265         }
266         if (status & PE)
267                 uart->port.icount.parity++;
268         if (status & OE)
269                 uart->port.icount.overrun++;
270         if (status & FE)
271                 uart->port.icount.frame++;
272
273         status &= uart->port.read_status_mask;
274
275         if (status & BI)
276                 flg = TTY_BREAK;
277         else if (status & PE)
278                 flg = TTY_PARITY;
279         else if (status & FE)
280                 flg = TTY_FRAME;
281         else
282                 flg = TTY_NORMAL;
283
284         if (uart_handle_sysrq_char(&uart->port, ch))
285                 goto ignore_char;
286
287         uart_insert_char(&uart->port, status, OE, ch, flg);
288
289  ignore_char:
290         tty_flip_buffer_push(tty);
291 }
292
293 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
294 {
295         struct circ_buf *xmit = &uart->port.info->xmit;
296
297         /*
298          * Check the modem control lines before
299          * transmitting anything.
300          */
301         bfin_serial_mctrl_check(uart);
302
303         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
304                 bfin_serial_stop_tx(&uart->port);
305                 return;
306         }
307
308         if (uart->port.x_char) {
309                 UART_PUT_CHAR(uart, uart->port.x_char);
310                 uart->port.icount.tx++;
311                 uart->port.x_char = 0;
312         }
313
314         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
315                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
316                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
317                 uart->port.icount.tx++;
318                 SSYNC();
319         }
320
321         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
322                 uart_write_wakeup(&uart->port);
323
324         if (uart_circ_empty(xmit))
325                 bfin_serial_stop_tx(&uart->port);
326 }
327
328 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
329 {
330         struct bfin_serial_port *uart = dev_id;
331
332         spin_lock(&uart->port.lock);
333         while (UART_GET_LSR(uart) & DR)
334                 bfin_serial_rx_chars(uart);
335         spin_unlock(&uart->port.lock);
336
337         return IRQ_HANDLED;
338 }
339
340 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
341 {
342         struct bfin_serial_port *uart = dev_id;
343
344         spin_lock(&uart->port.lock);
345         if (UART_GET_LSR(uart) & THRE)
346                 bfin_serial_tx_chars(uart);
347         spin_unlock(&uart->port.lock);
348
349         return IRQ_HANDLED;
350 }
351 #endif
352
353 #ifdef CONFIG_SERIAL_BFIN_DMA
354 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
355 {
356         struct circ_buf *xmit = &uart->port.info->xmit;
357
358         uart->tx_done = 0;
359
360         /*
361          * Check the modem control lines before
362          * transmitting anything.
363          */
364         bfin_serial_mctrl_check(uart);
365
366         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
367                 uart->tx_count = 0;
368                 uart->tx_done = 1;
369                 return;
370         }
371
372         if (uart->port.x_char) {
373                 UART_PUT_CHAR(uart, uart->port.x_char);
374                 uart->port.icount.tx++;
375                 uart->port.x_char = 0;
376         }
377
378         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
379         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
380                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
381         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
382                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
383         set_dma_config(uart->tx_dma_channel,
384                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
385                         INTR_ON_BUF,
386                         DIMENSION_LINEAR,
387                         DATA_SIZE_8,
388                         DMA_SYNC_RESTART));
389         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
390         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
391         set_dma_x_modify(uart->tx_dma_channel, 1);
392         enable_dma(uart->tx_dma_channel);
393
394         UART_SET_IER(uart, ETBEI);
395 }
396
397 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
398 {
399         struct tty_struct *tty = uart->port.info->port.tty;
400         int i, flg, status;
401
402         status = UART_GET_LSR(uart);
403         UART_CLEAR_LSR(uart);
404
405         uart->port.icount.rx +=
406                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
407                 UART_XMIT_SIZE);
408
409         if (status & BI) {
410                 uart->port.icount.brk++;
411                 if (uart_handle_break(&uart->port))
412                         goto dma_ignore_char;
413                 status &= ~(PE | FE);
414         }
415         if (status & PE)
416                 uart->port.icount.parity++;
417         if (status & OE)
418                 uart->port.icount.overrun++;
419         if (status & FE)
420                 uart->port.icount.frame++;
421
422         status &= uart->port.read_status_mask;
423
424         if (status & BI)
425                 flg = TTY_BREAK;
426         else if (status & PE)
427                 flg = TTY_PARITY;
428         else if (status & FE)
429                 flg = TTY_FRAME;
430         else
431                 flg = TTY_NORMAL;
432
433         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
434                 if (i >= UART_XMIT_SIZE)
435                         i = 0;
436                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
437                         uart_insert_char(&uart->port, status, OE,
438                                 uart->rx_dma_buf.buf[i], flg);
439         }
440
441  dma_ignore_char:
442         tty_flip_buffer_push(tty);
443 }
444
445 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
446 {
447         int x_pos, pos;
448
449         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
450         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
451         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
452         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
453                 uart->rx_dma_nrows = 0;
454         x_pos = DMA_RX_XCOUNT - x_pos;
455         if (x_pos == DMA_RX_XCOUNT)
456                 x_pos = 0;
457
458         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
459         if (pos != uart->rx_dma_buf.tail) {
460                 uart->rx_dma_buf.head = pos;
461                 bfin_serial_dma_rx_chars(uart);
462                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
463         }
464
465         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
466 }
467
468 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
469 {
470         struct bfin_serial_port *uart = dev_id;
471         struct circ_buf *xmit = &uart->port.info->xmit;
472
473         spin_lock(&uart->port.lock);
474         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
475                 disable_dma(uart->tx_dma_channel);
476                 clear_dma_irqstat(uart->tx_dma_channel);
477                 UART_CLEAR_IER(uart, ETBEI);
478                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
479                 uart->port.icount.tx += uart->tx_count;
480
481                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
482                         uart_write_wakeup(&uart->port);
483
484                 bfin_serial_dma_tx_chars(uart);
485         }
486
487         spin_unlock(&uart->port.lock);
488         return IRQ_HANDLED;
489 }
490
491 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
492 {
493         struct bfin_serial_port *uart = dev_id;
494         unsigned short irqstat;
495
496         spin_lock(&uart->port.lock);
497         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
498         clear_dma_irqstat(uart->rx_dma_channel);
499         spin_unlock(&uart->port.lock);
500
501         mod_timer(&(uart->rx_dma_timer), jiffies);
502
503         return IRQ_HANDLED;
504 }
505 #endif
506
507 /*
508  * Return TIOCSER_TEMT when transmitter is not busy.
509  */
510 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
511 {
512         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
513         unsigned short lsr;
514
515         lsr = UART_GET_LSR(uart);
516         if (lsr & TEMT)
517                 return TIOCSER_TEMT;
518         else
519                 return 0;
520 }
521
522 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
523 {
524 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
525         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
526         if (uart->cts_pin < 0)
527                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
528
529         if (UART_GET_CTS(uart))
530                 return TIOCM_DSR | TIOCM_CAR;
531         else
532 #endif
533                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
534 }
535
536 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
537 {
538 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
539         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
540         if (uart->rts_pin < 0)
541                 return;
542
543         if (mctrl & TIOCM_RTS)
544                 UART_CLEAR_RTS(uart);
545         else
546                 UART_SET_RTS(uart);
547 #endif
548 }
549
550 /*
551  * Handle any change of modem status signal since we were last called.
552  */
553 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
554 {
555 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
556         unsigned int status;
557         struct uart_info *info = uart->port.info;
558         struct tty_struct *tty = info->port.tty;
559
560         status = bfin_serial_get_mctrl(&uart->port);
561         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
562         if (!(status & TIOCM_CTS)) {
563                 tty->hw_stopped = 1;
564                 uart->cts_timer.data = (unsigned long)(uart);
565                 uart->cts_timer.function = (void *)bfin_serial_mctrl_check;
566                 uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES;
567                 add_timer(&(uart->cts_timer));
568         } else {
569                 tty->hw_stopped = 0;
570         }
571 #endif
572 }
573
574 /*
575  * Interrupts are always disabled.
576  */
577 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
578 {
579         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
580         u16 lcr = UART_GET_LCR(uart);
581         if (break_state)
582                 lcr |= SB;
583         else
584                 lcr &= ~SB;
585         UART_PUT_LCR(uart, lcr);
586         SSYNC();
587 }
588
589 static int bfin_serial_startup(struct uart_port *port)
590 {
591         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
592
593 #ifdef CONFIG_SERIAL_BFIN_DMA
594         dma_addr_t dma_handle;
595
596         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
597                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
598                 return -EBUSY;
599         }
600
601         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
602                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
603                 free_dma(uart->rx_dma_channel);
604                 return -EBUSY;
605         }
606
607         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
608         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
609
610         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
611         uart->rx_dma_buf.head = 0;
612         uart->rx_dma_buf.tail = 0;
613         uart->rx_dma_nrows = 0;
614
615         set_dma_config(uart->rx_dma_channel,
616                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
617                                 INTR_ON_ROW, DIMENSION_2D,
618                                 DATA_SIZE_8,
619                                 DMA_SYNC_RESTART));
620         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
621         set_dma_x_modify(uart->rx_dma_channel, 1);
622         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
623         set_dma_y_modify(uart->rx_dma_channel, 1);
624         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
625         enable_dma(uart->rx_dma_channel);
626
627         uart->rx_dma_timer.data = (unsigned long)(uart);
628         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
629         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
630         add_timer(&(uart->rx_dma_timer));
631 #else
632         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
633              "BFIN_UART_RX", uart)) {
634 # ifdef CONFIG_KGDB_UART
635                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
636 # endif
637                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
638                 return -EBUSY;
639 # ifdef CONFIG_KGDB_UART
640                 }
641 # endif
642         }
643
644         if (request_irq
645             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
646              "BFIN_UART_TX", uart)) {
647                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
648                 free_irq(uart->port.irq, uart);
649                 return -EBUSY;
650         }
651 #endif
652         UART_SET_IER(uart, ERBFI);
653         return 0;
654 }
655
656 static void bfin_serial_shutdown(struct uart_port *port)
657 {
658         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
659
660 #ifdef CONFIG_SERIAL_BFIN_DMA
661         disable_dma(uart->tx_dma_channel);
662         free_dma(uart->tx_dma_channel);
663         disable_dma(uart->rx_dma_channel);
664         free_dma(uart->rx_dma_channel);
665         del_timer(&(uart->rx_dma_timer));
666         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
667 #else
668 #ifdef  CONFIG_KGDB_UART
669         if (uart->port.line != CONFIG_KGDB_UART_PORT)
670 #endif
671         free_irq(uart->port.irq, uart);
672         free_irq(uart->port.irq+1, uart);
673 #endif
674 }
675
676 static void
677 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
678                    struct ktermios *old)
679 {
680         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
681         unsigned long flags;
682         unsigned int baud, quot;
683         unsigned short val, ier, lcr = 0;
684
685         switch (termios->c_cflag & CSIZE) {
686         case CS8:
687                 lcr = WLS(8);
688                 break;
689         case CS7:
690                 lcr = WLS(7);
691                 break;
692         case CS6:
693                 lcr = WLS(6);
694                 break;
695         case CS5:
696                 lcr = WLS(5);
697                 break;
698         default:
699                 printk(KERN_ERR "%s: word lengh not supported\n",
700                         __func__);
701         }
702
703         if (termios->c_cflag & CSTOPB)
704                 lcr |= STB;
705         if (termios->c_cflag & PARENB)
706                 lcr |= PEN;
707         if (!(termios->c_cflag & PARODD))
708                 lcr |= EPS;
709         if (termios->c_cflag & CMSPAR)
710                 lcr |= STP;
711
712         port->read_status_mask = OE;
713         if (termios->c_iflag & INPCK)
714                 port->read_status_mask |= (FE | PE);
715         if (termios->c_iflag & (BRKINT | PARMRK))
716                 port->read_status_mask |= BI;
717
718         /*
719          * Characters to ignore
720          */
721         port->ignore_status_mask = 0;
722         if (termios->c_iflag & IGNPAR)
723                 port->ignore_status_mask |= FE | PE;
724         if (termios->c_iflag & IGNBRK) {
725                 port->ignore_status_mask |= BI;
726                 /*
727                  * If we're ignoring parity and break indicators,
728                  * ignore overruns too (for real raw support).
729                  */
730                 if (termios->c_iflag & IGNPAR)
731                         port->ignore_status_mask |= OE;
732         }
733
734         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
735         quot = uart_get_divisor(port, baud);
736         spin_lock_irqsave(&uart->port.lock, flags);
737
738         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
739
740         /* Disable UART */
741         ier = UART_GET_IER(uart);
742         UART_DISABLE_INTS(uart);
743
744         /* Set DLAB in LCR to Access DLL and DLH */
745         UART_SET_DLAB(uart);
746
747         UART_PUT_DLL(uart, quot & 0xFF);
748         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
749         SSYNC();
750
751         /* Clear DLAB in LCR to Access THR RBR IER */
752         UART_CLEAR_DLAB(uart);
753
754         UART_PUT_LCR(uart, lcr);
755
756         /* Enable UART */
757         UART_ENABLE_INTS(uart, ier);
758
759         val = UART_GET_GCTL(uart);
760         val |= UCEN;
761         UART_PUT_GCTL(uart, val);
762
763         spin_unlock_irqrestore(&uart->port.lock, flags);
764 }
765
766 static const char *bfin_serial_type(struct uart_port *port)
767 {
768         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
769
770         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
771 }
772
773 /*
774  * Release the memory region(s) being used by 'port'.
775  */
776 static void bfin_serial_release_port(struct uart_port *port)
777 {
778 }
779
780 /*
781  * Request the memory region(s) being used by 'port'.
782  */
783 static int bfin_serial_request_port(struct uart_port *port)
784 {
785         return 0;
786 }
787
788 /*
789  * Configure/autoconfigure the port.
790  */
791 static void bfin_serial_config_port(struct uart_port *port, int flags)
792 {
793         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
794
795         if (flags & UART_CONFIG_TYPE &&
796             bfin_serial_request_port(&uart->port) == 0)
797                 uart->port.type = PORT_BFIN;
798 }
799
800 /*
801  * Verify the new serial_struct (for TIOCSSERIAL).
802  * The only change we allow are to the flags and type, and
803  * even then only between PORT_BFIN and PORT_UNKNOWN
804  */
805 static int
806 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
807 {
808         return 0;
809 }
810
811 /*
812  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
813  * In other cases, disable IrDA function.
814  */
815 static void bfin_serial_set_ldisc(struct uart_port *port)
816 {
817         int line = port->line;
818         unsigned short val;
819
820         if (line >= port->info->port.tty->driver->num)
821                 return;
822
823         switch (port->info->port.tty->termios->c_line) {
824         case N_IRDA:
825                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
826                 val |= (IREN | RPOLC);
827                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
828                 break;
829         default:
830                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
831                 val &= ~(IREN | RPOLC);
832                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
833         }
834 }
835
836 static struct uart_ops bfin_serial_pops = {
837         .tx_empty       = bfin_serial_tx_empty,
838         .set_mctrl      = bfin_serial_set_mctrl,
839         .get_mctrl      = bfin_serial_get_mctrl,
840         .stop_tx        = bfin_serial_stop_tx,
841         .start_tx       = bfin_serial_start_tx,
842         .stop_rx        = bfin_serial_stop_rx,
843         .enable_ms      = bfin_serial_enable_ms,
844         .break_ctl      = bfin_serial_break_ctl,
845         .startup        = bfin_serial_startup,
846         .shutdown       = bfin_serial_shutdown,
847         .set_termios    = bfin_serial_set_termios,
848         .set_ldisc      = bfin_serial_set_ldisc,
849         .type           = bfin_serial_type,
850         .release_port   = bfin_serial_release_port,
851         .request_port   = bfin_serial_request_port,
852         .config_port    = bfin_serial_config_port,
853         .verify_port    = bfin_serial_verify_port,
854 };
855
856 static void __init bfin_serial_init_ports(void)
857 {
858         static int first = 1;
859         int i;
860
861         if (!first)
862                 return;
863         first = 0;
864
865         for (i = 0; i < nr_active_ports; i++) {
866                 bfin_serial_ports[i].port.uartclk   = get_sclk();
867                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
868                 bfin_serial_ports[i].port.line      = i;
869                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
870                 bfin_serial_ports[i].port.membase   =
871                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
872                 bfin_serial_ports[i].port.mapbase   =
873                         bfin_serial_resource[i].uart_base_addr;
874                 bfin_serial_ports[i].port.irq       =
875                         bfin_serial_resource[i].uart_irq;
876                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
877 #ifdef CONFIG_SERIAL_BFIN_DMA
878                 bfin_serial_ports[i].tx_done        = 1;
879                 bfin_serial_ports[i].tx_count       = 0;
880                 bfin_serial_ports[i].tx_dma_channel =
881                         bfin_serial_resource[i].uart_tx_dma_channel;
882                 bfin_serial_ports[i].rx_dma_channel =
883                         bfin_serial_resource[i].uart_rx_dma_channel;
884                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
885 #endif
886 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
887                 init_timer(&(bfin_serial_ports[i].cts_timer));
888                 bfin_serial_ports[i].cts_pin        =
889                         bfin_serial_resource[i].uart_cts_pin;
890                 bfin_serial_ports[i].rts_pin        =
891                         bfin_serial_resource[i].uart_rts_pin;
892 #endif
893                 bfin_serial_hw_init(&bfin_serial_ports[i]);
894         }
895
896 }
897
898 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
899 /*
900  * If the port was already initialised (eg, by a boot loader),
901  * try to determine the current setup.
902  */
903 static void __init
904 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
905                            int *parity, int *bits)
906 {
907         unsigned short status;
908
909         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
910         if (status == (ERBFI | ETBEI)) {
911                 /* ok, the port was enabled */
912                 u16 lcr, dlh, dll;
913
914                 lcr = UART_GET_LCR(uart);
915
916                 *parity = 'n';
917                 if (lcr & PEN) {
918                         if (lcr & EPS)
919                                 *parity = 'e';
920                         else
921                                 *parity = 'o';
922                 }
923                 switch (lcr & 0x03) {
924                         case 0: *bits = 5; break;
925                         case 1: *bits = 6; break;
926                         case 2: *bits = 7; break;
927                         case 3: *bits = 8; break;
928                 }
929                 /* Set DLAB in LCR to Access DLL and DLH */
930                 UART_SET_DLAB(uart);
931
932                 dll = UART_GET_DLL(uart);
933                 dlh = UART_GET_DLH(uart);
934
935                 /* Clear DLAB in LCR to Access THR RBR IER */
936                 UART_CLEAR_DLAB(uart);
937
938                 *baud = get_sclk() / (16*(dll | dlh << 8));
939         }
940         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
941 }
942 #endif
943
944 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
945 static struct uart_driver bfin_serial_reg;
946
947 static int __init
948 bfin_serial_console_setup(struct console *co, char *options)
949 {
950         struct bfin_serial_port *uart;
951 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
952         int baud = 57600;
953         int bits = 8;
954         int parity = 'n';
955 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
956         int flow = 'r';
957 #  else
958         int flow = 'n';
959 #  endif
960 # endif
961
962         /*
963          * Check whether an invalid uart number has been specified, and
964          * if so, search for the first available port that does have
965          * console support.
966          */
967         if (co->index == -1 || co->index >= nr_active_ports)
968                 co->index = 0;
969         uart = &bfin_serial_ports[co->index];
970
971 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
972         if (options)
973                 uart_parse_options(options, &baud, &parity, &bits, &flow);
974         else
975                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
976
977         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
978 # else
979         return 0;
980 # endif
981 }
982 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
983                                  defined (CONFIG_EARLY_PRINTK) */
984
985 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
986 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
987 {
988         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
989         while (!(UART_GET_LSR(uart) & THRE))
990                 barrier();
991         UART_PUT_CHAR(uart, ch);
992         SSYNC();
993 }
994
995 /*
996  * Interrupts are disabled on entering
997  */
998 static void
999 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1000 {
1001         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1002         int flags = 0;
1003
1004         spin_lock_irqsave(&uart->port.lock, flags);
1005         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1006         spin_unlock_irqrestore(&uart->port.lock, flags);
1007
1008 }
1009
1010 static struct console bfin_serial_console = {
1011         .name           = BFIN_SERIAL_NAME,
1012         .write          = bfin_serial_console_write,
1013         .device         = uart_console_device,
1014         .setup          = bfin_serial_console_setup,
1015         .flags          = CON_PRINTBUFFER,
1016         .index          = -1,
1017         .data           = &bfin_serial_reg,
1018 };
1019
1020 static int __init bfin_serial_rs_console_init(void)
1021 {
1022         bfin_serial_init_ports();
1023         register_console(&bfin_serial_console);
1024 #ifdef CONFIG_KGDB_UART
1025         kgdb_entry_state = 0;
1026         init_kgdb_uart();
1027 #endif
1028         return 0;
1029 }
1030 console_initcall(bfin_serial_rs_console_init);
1031
1032 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1033 #else
1034 #define BFIN_SERIAL_CONSOLE     NULL
1035 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1036
1037
1038 #ifdef CONFIG_EARLY_PRINTK
1039 static __init void early_serial_putc(struct uart_port *port, int ch)
1040 {
1041         unsigned timeout = 0xffff;
1042         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1043
1044         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1045                 cpu_relax();
1046         UART_PUT_CHAR(uart, ch);
1047 }
1048
1049 static __init void early_serial_write(struct console *con, const char *s,
1050                                         unsigned int n)
1051 {
1052         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1053         unsigned int i;
1054
1055         for (i = 0; i < n; i++, s++) {
1056                 if (*s == '\n')
1057                         early_serial_putc(&uart->port, '\r');
1058                 early_serial_putc(&uart->port, *s);
1059         }
1060 }
1061
1062 static struct __initdata console bfin_early_serial_console = {
1063         .name = "early_BFuart",
1064         .write = early_serial_write,
1065         .device = uart_console_device,
1066         .flags = CON_PRINTBUFFER,
1067         .setup = bfin_serial_console_setup,
1068         .index = -1,
1069         .data  = &bfin_serial_reg,
1070 };
1071
1072 struct console __init *bfin_earlyserial_init(unsigned int port,
1073                                                 unsigned int cflag)
1074 {
1075         struct bfin_serial_port *uart;
1076         struct ktermios t;
1077
1078         if (port == -1 || port >= nr_active_ports)
1079                 port = 0;
1080         bfin_serial_init_ports();
1081         bfin_early_serial_console.index = port;
1082         uart = &bfin_serial_ports[port];
1083         t.c_cflag = cflag;
1084         t.c_iflag = 0;
1085         t.c_oflag = 0;
1086         t.c_lflag = ICANON;
1087         t.c_line = port;
1088         bfin_serial_set_termios(&uart->port, &t, &t);
1089         return &bfin_early_serial_console;
1090 }
1091
1092 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1093
1094 static struct uart_driver bfin_serial_reg = {
1095         .owner                  = THIS_MODULE,
1096         .driver_name            = "bfin-uart",
1097         .dev_name               = BFIN_SERIAL_NAME,
1098         .major                  = BFIN_SERIAL_MAJOR,
1099         .minor                  = BFIN_SERIAL_MINOR,
1100         .nr                     = BFIN_UART_NR_PORTS,
1101         .cons                   = BFIN_SERIAL_CONSOLE,
1102 };
1103
1104 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1105 {
1106         int i;
1107
1108         for (i = 0; i < nr_active_ports; i++) {
1109                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1110                         continue;
1111                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1112         }
1113
1114         return 0;
1115 }
1116
1117 static int bfin_serial_resume(struct platform_device *dev)
1118 {
1119         int i;
1120
1121         for (i = 0; i < nr_active_ports; i++) {
1122                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1123                         continue;
1124                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1125         }
1126
1127         return 0;
1128 }
1129
1130 static int bfin_serial_probe(struct platform_device *dev)
1131 {
1132         struct resource *res = dev->resource;
1133         int i;
1134
1135         for (i = 0; i < dev->num_resources; i++, res++)
1136                 if (res->flags & IORESOURCE_MEM)
1137                         break;
1138
1139         if (i < dev->num_resources) {
1140                 for (i = 0; i < nr_active_ports; i++, res++) {
1141                         if (bfin_serial_ports[i].port.mapbase != res->start)
1142                                 continue;
1143                         bfin_serial_ports[i].port.dev = &dev->dev;
1144                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1145                 }
1146         }
1147
1148         return 0;
1149 }
1150
1151 static int bfin_serial_remove(struct platform_device *dev)
1152 {
1153         int i;
1154
1155         for (i = 0; i < nr_active_ports; i++) {
1156                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1157                         continue;
1158                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1159                 bfin_serial_ports[i].port.dev = NULL;
1160 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1161                 gpio_free(bfin_serial_ports[i].cts_pin);
1162                 gpio_free(bfin_serial_ports[i].rts_pin);
1163 #endif
1164         }
1165
1166         return 0;
1167 }
1168
1169 static struct platform_driver bfin_serial_driver = {
1170         .probe          = bfin_serial_probe,
1171         .remove         = bfin_serial_remove,
1172         .suspend        = bfin_serial_suspend,
1173         .resume         = bfin_serial_resume,
1174         .driver         = {
1175                 .name   = "bfin-uart",
1176                 .owner  = THIS_MODULE,
1177         },
1178 };
1179
1180 static int __init bfin_serial_init(void)
1181 {
1182         int ret;
1183 #ifdef CONFIG_KGDB_UART
1184         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1185         struct ktermios t;
1186 #endif
1187
1188         pr_info("Serial: Blackfin serial driver\n");
1189
1190         bfin_serial_init_ports();
1191
1192         ret = uart_register_driver(&bfin_serial_reg);
1193         if (ret == 0) {
1194                 ret = platform_driver_register(&bfin_serial_driver);
1195                 if (ret) {
1196                         pr_debug("uart register failed\n");
1197                         uart_unregister_driver(&bfin_serial_reg);
1198                 }
1199         }
1200 #ifdef CONFIG_KGDB_UART
1201         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1202                 request_irq(uart->port.irq, bfin_serial_rx_int,
1203                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1204                 pr_info("Request irq for kgdb uart port\n");
1205                 UART_SET_IER(uart, ERBFI);
1206                 SSYNC();
1207                 t.c_cflag = CS8|B57600;
1208                 t.c_iflag = 0;
1209                 t.c_oflag = 0;
1210                 t.c_lflag = ICANON;
1211                 t.c_line = CONFIG_KGDB_UART_PORT;
1212                 bfin_serial_set_termios(&uart->port, &t, &t);
1213         }
1214 #endif
1215         return ret;
1216 }
1217
1218 static void __exit bfin_serial_exit(void)
1219 {
1220         platform_driver_unregister(&bfin_serial_driver);
1221         uart_unregister_driver(&bfin_serial_reg);
1222 }
1223
1224 module_init(bfin_serial_init);
1225 module_exit(bfin_serial_exit);
1226
1227 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1228 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1229 MODULE_LICENSE("GPL");
1230 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1231 MODULE_ALIAS("platform:bfin-uart");