2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2008 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
31 #include <mach/bfin_serial_5xx.h>
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
37 #include <asm/cacheflush.h>
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
45 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
46 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
49 * Setup for console. Argument comes from the menuconfig
51 #define DMA_RX_XCOUNT 512
52 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
54 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
55 #define CTS_CHECK_JIFFIES (HZ / 50)
57 #ifdef CONFIG_SERIAL_BFIN_DMA
58 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
60 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
63 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
66 * interrupts are disabled on entry
68 static void bfin_serial_stop_tx(struct uart_port *port)
70 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
71 struct circ_buf *xmit = &uart->port.info->xmit;
73 while (!(UART_GET_LSR(uart) & TEMT))
76 #ifdef CONFIG_SERIAL_BFIN_DMA
77 disable_dma(uart->tx_dma_channel);
78 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
79 uart->port.icount.tx += uart->tx_count;
85 UART_PUT_LSR(uart, TFI);
87 UART_CLEAR_IER(uart, ETBEI);
92 * port is locked and interrupts are disabled
94 static void bfin_serial_start_tx(struct uart_port *port)
96 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
98 #ifdef CONFIG_SERIAL_BFIN_DMA
100 bfin_serial_dma_tx_chars(uart);
102 UART_SET_IER(uart, ETBEI);
103 bfin_serial_tx_chars(uart);
108 * Interrupts are enabled
110 static void bfin_serial_stop_rx(struct uart_port *port)
112 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
113 #ifdef CONFIG_KGDB_UART
114 if (uart->port.line != CONFIG_KGDB_UART_PORT)
116 UART_CLEAR_IER(uart, ERBFI);
120 * Set the modem control timer to fire immediately.
122 static void bfin_serial_enable_ms(struct uart_port *port)
126 #ifdef CONFIG_KGDB_UART
127 static int kgdb_entry_state;
129 void kgdb_put_debug_char(int chr)
131 struct bfin_serial_port *uart;
133 if (CONFIG_KGDB_UART_PORT < 0
134 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
135 uart = &bfin_serial_ports[0];
137 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
139 while (!(UART_GET_LSR(uart) & THRE)) {
143 UART_CLEAR_DLAB(uart);
144 UART_PUT_CHAR(uart, (unsigned char)chr);
148 int kgdb_get_debug_char(void)
150 struct bfin_serial_port *uart;
153 if (CONFIG_KGDB_UART_PORT < 0
154 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
155 uart = &bfin_serial_ports[0];
157 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
159 while(!(UART_GET_LSR(uart) & DR)) {
162 UART_CLEAR_DLAB(uart);
163 chr = UART_GET_CHAR(uart);
170 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
171 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
172 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
174 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
175 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
178 #ifdef CONFIG_SERIAL_BFIN_PIO
179 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
181 struct tty_struct *tty = uart->port.info->port.tty;
182 unsigned int status, ch, flg;
183 static struct timeval anomaly_start = { .tv_sec = 0 };
185 status = UART_GET_LSR(uart);
186 UART_CLEAR_LSR(uart);
188 ch = UART_GET_CHAR(uart);
189 uart->port.icount.rx++;
191 #ifdef CONFIG_KGDB_UART
192 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
193 struct pt_regs *regs = get_irq_regs();
194 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
195 kgdb_breakkey_pressed(regs);
197 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
198 kgdb_entry_state = 1;
199 } else if (kgdb_entry_state == 1 && ch == 'q') {
200 kgdb_entry_state = 0;
201 kgdb_breakkey_pressed(regs);
203 } else if (ch == 0x3) {/* Ctrl + C */
204 kgdb_entry_state = 0;
205 kgdb_breakkey_pressed(regs);
208 kgdb_entry_state = 0;
213 if (ANOMALY_05000363) {
214 /* The BF533 (and BF561) family of processors have a nice anomaly
215 * where they continuously generate characters for a "single" break.
216 * We have to basically ignore this flood until the "next" valid
217 * character comes across. Due to the nature of the flood, it is
218 * not possible to reliably catch bytes that are sent too quickly
219 * after this break. So application code talking to the Blackfin
220 * which sends a break signal must allow at least 1.5 character
221 * times after the end of the break for things to stabilize. This
222 * timeout was picked as it must absolutely be larger than 1
223 * character time +/- some percent. So 1.5 sounds good. All other
224 * Blackfin families operate properly. Woo.
226 if (anomaly_start.tv_sec) {
230 if ((~ch & (~ch + 1)) & 0xff)
231 goto known_good_char;
233 do_gettimeofday(&curr);
234 if (curr.tv_sec - anomaly_start.tv_sec > 1)
235 goto known_good_char;
238 if (curr.tv_sec != anomaly_start.tv_sec)
239 usecs += USEC_PER_SEC;
240 usecs += curr.tv_usec - anomaly_start.tv_usec;
242 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
243 goto known_good_char;
246 anomaly_start.tv_sec = 0;
248 anomaly_start = curr;
253 anomaly_start.tv_sec = 0;
258 if (ANOMALY_05000363)
259 if (bfin_revid() < 5)
260 do_gettimeofday(&anomaly_start);
261 uart->port.icount.brk++;
262 if (uart_handle_break(&uart->port))
264 status &= ~(PE | FE);
267 uart->port.icount.parity++;
269 uart->port.icount.overrun++;
271 uart->port.icount.frame++;
273 status &= uart->port.read_status_mask;
277 else if (status & PE)
279 else if (status & FE)
284 if (uart_handle_sysrq_char(&uart->port, ch))
287 uart_insert_char(&uart->port, status, OE, ch, flg);
290 tty_flip_buffer_push(tty);
293 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
295 struct circ_buf *xmit = &uart->port.info->xmit;
298 * Check the modem control lines before
299 * transmitting anything.
301 bfin_serial_mctrl_check(uart);
303 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
304 bfin_serial_stop_tx(&uart->port);
308 if (uart->port.x_char) {
309 UART_PUT_CHAR(uart, uart->port.x_char);
310 uart->port.icount.tx++;
311 uart->port.x_char = 0;
314 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
315 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
316 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
317 uart->port.icount.tx++;
321 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
322 uart_write_wakeup(&uart->port);
324 if (uart_circ_empty(xmit))
325 bfin_serial_stop_tx(&uart->port);
328 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
330 struct bfin_serial_port *uart = dev_id;
332 spin_lock(&uart->port.lock);
333 while (UART_GET_LSR(uart) & DR)
334 bfin_serial_rx_chars(uart);
335 spin_unlock(&uart->port.lock);
340 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
342 struct bfin_serial_port *uart = dev_id;
344 spin_lock(&uart->port.lock);
345 if (UART_GET_LSR(uart) & THRE)
346 bfin_serial_tx_chars(uart);
347 spin_unlock(&uart->port.lock);
353 #ifdef CONFIG_SERIAL_BFIN_DMA
354 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
356 struct circ_buf *xmit = &uart->port.info->xmit;
361 * Check the modem control lines before
362 * transmitting anything.
364 bfin_serial_mctrl_check(uart);
366 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
372 if (uart->port.x_char) {
373 UART_PUT_CHAR(uart, uart->port.x_char);
374 uart->port.icount.tx++;
375 uart->port.x_char = 0;
378 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
379 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
380 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
381 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
382 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
383 set_dma_config(uart->tx_dma_channel,
384 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
389 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
390 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
391 set_dma_x_modify(uart->tx_dma_channel, 1);
392 enable_dma(uart->tx_dma_channel);
394 UART_SET_IER(uart, ETBEI);
397 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
399 struct tty_struct *tty = uart->port.info->port.tty;
402 status = UART_GET_LSR(uart);
403 UART_CLEAR_LSR(uart);
405 uart->port.icount.rx +=
406 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
410 uart->port.icount.brk++;
411 if (uart_handle_break(&uart->port))
412 goto dma_ignore_char;
413 status &= ~(PE | FE);
416 uart->port.icount.parity++;
418 uart->port.icount.overrun++;
420 uart->port.icount.frame++;
422 status &= uart->port.read_status_mask;
426 else if (status & PE)
428 else if (status & FE)
433 for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
434 if (i >= UART_XMIT_SIZE)
436 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
437 uart_insert_char(&uart->port, status, OE,
438 uart->rx_dma_buf.buf[i], flg);
442 tty_flip_buffer_push(tty);
445 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
449 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
450 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
451 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
452 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
453 uart->rx_dma_nrows = 0;
454 x_pos = DMA_RX_XCOUNT - x_pos;
455 if (x_pos == DMA_RX_XCOUNT)
458 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
459 if (pos != uart->rx_dma_buf.tail) {
460 uart->rx_dma_buf.head = pos;
461 bfin_serial_dma_rx_chars(uart);
462 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
465 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
468 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
470 struct bfin_serial_port *uart = dev_id;
471 struct circ_buf *xmit = &uart->port.info->xmit;
473 spin_lock(&uart->port.lock);
474 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
475 disable_dma(uart->tx_dma_channel);
476 clear_dma_irqstat(uart->tx_dma_channel);
477 UART_CLEAR_IER(uart, ETBEI);
478 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
479 uart->port.icount.tx += uart->tx_count;
481 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
482 uart_write_wakeup(&uart->port);
484 bfin_serial_dma_tx_chars(uart);
487 spin_unlock(&uart->port.lock);
491 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
493 struct bfin_serial_port *uart = dev_id;
494 unsigned short irqstat;
496 spin_lock(&uart->port.lock);
497 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
498 clear_dma_irqstat(uart->rx_dma_channel);
499 spin_unlock(&uart->port.lock);
501 mod_timer(&(uart->rx_dma_timer), jiffies);
508 * Return TIOCSER_TEMT when transmitter is not busy.
510 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
512 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
515 lsr = UART_GET_LSR(uart);
522 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
524 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
525 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
526 if (uart->cts_pin < 0)
527 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
529 if (UART_GET_CTS(uart))
530 return TIOCM_DSR | TIOCM_CAR;
533 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
536 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
538 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
539 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
540 if (uart->rts_pin < 0)
543 if (mctrl & TIOCM_RTS)
544 UART_CLEAR_RTS(uart);
551 * Handle any change of modem status signal since we were last called.
553 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
555 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
557 struct uart_info *info = uart->port.info;
558 struct tty_struct *tty = info->port.tty;
560 status = bfin_serial_get_mctrl(&uart->port);
561 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
562 if (!(status & TIOCM_CTS)) {
564 uart->cts_timer.data = (unsigned long)(uart);
565 uart->cts_timer.function = (void *)bfin_serial_mctrl_check;
566 uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES;
567 add_timer(&(uart->cts_timer));
575 * Interrupts are always disabled.
577 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
579 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
580 u16 lcr = UART_GET_LCR(uart);
585 UART_PUT_LCR(uart, lcr);
589 static int bfin_serial_startup(struct uart_port *port)
591 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
593 #ifdef CONFIG_SERIAL_BFIN_DMA
594 dma_addr_t dma_handle;
596 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
597 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
601 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
602 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
603 free_dma(uart->rx_dma_channel);
607 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
608 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
610 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
611 uart->rx_dma_buf.head = 0;
612 uart->rx_dma_buf.tail = 0;
613 uart->rx_dma_nrows = 0;
615 set_dma_config(uart->rx_dma_channel,
616 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
617 INTR_ON_ROW, DIMENSION_2D,
620 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
621 set_dma_x_modify(uart->rx_dma_channel, 1);
622 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
623 set_dma_y_modify(uart->rx_dma_channel, 1);
624 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
625 enable_dma(uart->rx_dma_channel);
627 uart->rx_dma_timer.data = (unsigned long)(uart);
628 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
629 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
630 add_timer(&(uart->rx_dma_timer));
632 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
633 "BFIN_UART_RX", uart)) {
634 # ifdef CONFIG_KGDB_UART
635 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
637 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
639 # ifdef CONFIG_KGDB_UART
645 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
646 "BFIN_UART_TX", uart)) {
647 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
648 free_irq(uart->port.irq, uart);
652 UART_SET_IER(uart, ERBFI);
656 static void bfin_serial_shutdown(struct uart_port *port)
658 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
660 #ifdef CONFIG_SERIAL_BFIN_DMA
661 disable_dma(uart->tx_dma_channel);
662 free_dma(uart->tx_dma_channel);
663 disable_dma(uart->rx_dma_channel);
664 free_dma(uart->rx_dma_channel);
665 del_timer(&(uart->rx_dma_timer));
666 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
668 #ifdef CONFIG_KGDB_UART
669 if (uart->port.line != CONFIG_KGDB_UART_PORT)
671 free_irq(uart->port.irq, uart);
672 free_irq(uart->port.irq+1, uart);
677 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
678 struct ktermios *old)
680 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
682 unsigned int baud, quot;
683 unsigned short val, ier, lcr = 0;
685 switch (termios->c_cflag & CSIZE) {
699 printk(KERN_ERR "%s: word lengh not supported\n",
703 if (termios->c_cflag & CSTOPB)
705 if (termios->c_cflag & PARENB)
707 if (!(termios->c_cflag & PARODD))
709 if (termios->c_cflag & CMSPAR)
712 port->read_status_mask = OE;
713 if (termios->c_iflag & INPCK)
714 port->read_status_mask |= (FE | PE);
715 if (termios->c_iflag & (BRKINT | PARMRK))
716 port->read_status_mask |= BI;
719 * Characters to ignore
721 port->ignore_status_mask = 0;
722 if (termios->c_iflag & IGNPAR)
723 port->ignore_status_mask |= FE | PE;
724 if (termios->c_iflag & IGNBRK) {
725 port->ignore_status_mask |= BI;
727 * If we're ignoring parity and break indicators,
728 * ignore overruns too (for real raw support).
730 if (termios->c_iflag & IGNPAR)
731 port->ignore_status_mask |= OE;
734 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
735 quot = uart_get_divisor(port, baud);
736 spin_lock_irqsave(&uart->port.lock, flags);
738 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
741 ier = UART_GET_IER(uart);
742 UART_DISABLE_INTS(uart);
744 /* Set DLAB in LCR to Access DLL and DLH */
747 UART_PUT_DLL(uart, quot & 0xFF);
748 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
751 /* Clear DLAB in LCR to Access THR RBR IER */
752 UART_CLEAR_DLAB(uart);
754 UART_PUT_LCR(uart, lcr);
757 UART_ENABLE_INTS(uart, ier);
759 val = UART_GET_GCTL(uart);
761 UART_PUT_GCTL(uart, val);
763 spin_unlock_irqrestore(&uart->port.lock, flags);
766 static const char *bfin_serial_type(struct uart_port *port)
768 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
770 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
774 * Release the memory region(s) being used by 'port'.
776 static void bfin_serial_release_port(struct uart_port *port)
781 * Request the memory region(s) being used by 'port'.
783 static int bfin_serial_request_port(struct uart_port *port)
789 * Configure/autoconfigure the port.
791 static void bfin_serial_config_port(struct uart_port *port, int flags)
793 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
795 if (flags & UART_CONFIG_TYPE &&
796 bfin_serial_request_port(&uart->port) == 0)
797 uart->port.type = PORT_BFIN;
801 * Verify the new serial_struct (for TIOCSSERIAL).
802 * The only change we allow are to the flags and type, and
803 * even then only between PORT_BFIN and PORT_UNKNOWN
806 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
812 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
813 * In other cases, disable IrDA function.
815 static void bfin_serial_set_ldisc(struct uart_port *port)
817 int line = port->line;
820 if (line >= port->info->port.tty->driver->num)
823 switch (port->info->port.tty->termios->c_line) {
825 val = UART_GET_GCTL(&bfin_serial_ports[line]);
826 val |= (IREN | RPOLC);
827 UART_PUT_GCTL(&bfin_serial_ports[line], val);
830 val = UART_GET_GCTL(&bfin_serial_ports[line]);
831 val &= ~(IREN | RPOLC);
832 UART_PUT_GCTL(&bfin_serial_ports[line], val);
836 static struct uart_ops bfin_serial_pops = {
837 .tx_empty = bfin_serial_tx_empty,
838 .set_mctrl = bfin_serial_set_mctrl,
839 .get_mctrl = bfin_serial_get_mctrl,
840 .stop_tx = bfin_serial_stop_tx,
841 .start_tx = bfin_serial_start_tx,
842 .stop_rx = bfin_serial_stop_rx,
843 .enable_ms = bfin_serial_enable_ms,
844 .break_ctl = bfin_serial_break_ctl,
845 .startup = bfin_serial_startup,
846 .shutdown = bfin_serial_shutdown,
847 .set_termios = bfin_serial_set_termios,
848 .set_ldisc = bfin_serial_set_ldisc,
849 .type = bfin_serial_type,
850 .release_port = bfin_serial_release_port,
851 .request_port = bfin_serial_request_port,
852 .config_port = bfin_serial_config_port,
853 .verify_port = bfin_serial_verify_port,
856 static void __init bfin_serial_init_ports(void)
858 static int first = 1;
865 for (i = 0; i < nr_active_ports; i++) {
866 bfin_serial_ports[i].port.uartclk = get_sclk();
867 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
868 bfin_serial_ports[i].port.line = i;
869 bfin_serial_ports[i].port.iotype = UPIO_MEM;
870 bfin_serial_ports[i].port.membase =
871 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
872 bfin_serial_ports[i].port.mapbase =
873 bfin_serial_resource[i].uart_base_addr;
874 bfin_serial_ports[i].port.irq =
875 bfin_serial_resource[i].uart_irq;
876 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
877 #ifdef CONFIG_SERIAL_BFIN_DMA
878 bfin_serial_ports[i].tx_done = 1;
879 bfin_serial_ports[i].tx_count = 0;
880 bfin_serial_ports[i].tx_dma_channel =
881 bfin_serial_resource[i].uart_tx_dma_channel;
882 bfin_serial_ports[i].rx_dma_channel =
883 bfin_serial_resource[i].uart_rx_dma_channel;
884 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
886 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
887 init_timer(&(bfin_serial_ports[i].cts_timer));
888 bfin_serial_ports[i].cts_pin =
889 bfin_serial_resource[i].uart_cts_pin;
890 bfin_serial_ports[i].rts_pin =
891 bfin_serial_resource[i].uart_rts_pin;
893 bfin_serial_hw_init(&bfin_serial_ports[i]);
898 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
900 * If the port was already initialised (eg, by a boot loader),
901 * try to determine the current setup.
904 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
905 int *parity, int *bits)
907 unsigned short status;
909 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
910 if (status == (ERBFI | ETBEI)) {
911 /* ok, the port was enabled */
914 lcr = UART_GET_LCR(uart);
923 switch (lcr & 0x03) {
924 case 0: *bits = 5; break;
925 case 1: *bits = 6; break;
926 case 2: *bits = 7; break;
927 case 3: *bits = 8; break;
929 /* Set DLAB in LCR to Access DLL and DLH */
932 dll = UART_GET_DLL(uart);
933 dlh = UART_GET_DLH(uart);
935 /* Clear DLAB in LCR to Access THR RBR IER */
936 UART_CLEAR_DLAB(uart);
938 *baud = get_sclk() / (16*(dll | dlh << 8));
940 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
944 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
945 static struct uart_driver bfin_serial_reg;
948 bfin_serial_console_setup(struct console *co, char *options)
950 struct bfin_serial_port *uart;
951 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
955 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
963 * Check whether an invalid uart number has been specified, and
964 * if so, search for the first available port that does have
967 if (co->index == -1 || co->index >= nr_active_ports)
969 uart = &bfin_serial_ports[co->index];
971 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
973 uart_parse_options(options, &baud, &parity, &bits, &flow);
975 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
977 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
982 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
983 defined (CONFIG_EARLY_PRINTK) */
985 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
986 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
988 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
989 while (!(UART_GET_LSR(uart) & THRE))
991 UART_PUT_CHAR(uart, ch);
996 * Interrupts are disabled on entering
999 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1001 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1004 spin_lock_irqsave(&uart->port.lock, flags);
1005 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1006 spin_unlock_irqrestore(&uart->port.lock, flags);
1010 static struct console bfin_serial_console = {
1011 .name = BFIN_SERIAL_NAME,
1012 .write = bfin_serial_console_write,
1013 .device = uart_console_device,
1014 .setup = bfin_serial_console_setup,
1015 .flags = CON_PRINTBUFFER,
1017 .data = &bfin_serial_reg,
1020 static int __init bfin_serial_rs_console_init(void)
1022 bfin_serial_init_ports();
1023 register_console(&bfin_serial_console);
1024 #ifdef CONFIG_KGDB_UART
1025 kgdb_entry_state = 0;
1030 console_initcall(bfin_serial_rs_console_init);
1032 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1034 #define BFIN_SERIAL_CONSOLE NULL
1035 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1038 #ifdef CONFIG_EARLY_PRINTK
1039 static __init void early_serial_putc(struct uart_port *port, int ch)
1041 unsigned timeout = 0xffff;
1042 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1044 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1046 UART_PUT_CHAR(uart, ch);
1049 static __init void early_serial_write(struct console *con, const char *s,
1052 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1055 for (i = 0; i < n; i++, s++) {
1057 early_serial_putc(&uart->port, '\r');
1058 early_serial_putc(&uart->port, *s);
1062 static struct __initdata console bfin_early_serial_console = {
1063 .name = "early_BFuart",
1064 .write = early_serial_write,
1065 .device = uart_console_device,
1066 .flags = CON_PRINTBUFFER,
1067 .setup = bfin_serial_console_setup,
1069 .data = &bfin_serial_reg,
1072 struct console __init *bfin_earlyserial_init(unsigned int port,
1075 struct bfin_serial_port *uart;
1078 if (port == -1 || port >= nr_active_ports)
1080 bfin_serial_init_ports();
1081 bfin_early_serial_console.index = port;
1082 uart = &bfin_serial_ports[port];
1088 bfin_serial_set_termios(&uart->port, &t, &t);
1089 return &bfin_early_serial_console;
1092 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1094 static struct uart_driver bfin_serial_reg = {
1095 .owner = THIS_MODULE,
1096 .driver_name = "bfin-uart",
1097 .dev_name = BFIN_SERIAL_NAME,
1098 .major = BFIN_SERIAL_MAJOR,
1099 .minor = BFIN_SERIAL_MINOR,
1100 .nr = BFIN_UART_NR_PORTS,
1101 .cons = BFIN_SERIAL_CONSOLE,
1104 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1108 for (i = 0; i < nr_active_ports; i++) {
1109 if (bfin_serial_ports[i].port.dev != &dev->dev)
1111 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1117 static int bfin_serial_resume(struct platform_device *dev)
1121 for (i = 0; i < nr_active_ports; i++) {
1122 if (bfin_serial_ports[i].port.dev != &dev->dev)
1124 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1130 static int bfin_serial_probe(struct platform_device *dev)
1132 struct resource *res = dev->resource;
1135 for (i = 0; i < dev->num_resources; i++, res++)
1136 if (res->flags & IORESOURCE_MEM)
1139 if (i < dev->num_resources) {
1140 for (i = 0; i < nr_active_ports; i++, res++) {
1141 if (bfin_serial_ports[i].port.mapbase != res->start)
1143 bfin_serial_ports[i].port.dev = &dev->dev;
1144 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1151 static int bfin_serial_remove(struct platform_device *dev)
1155 for (i = 0; i < nr_active_ports; i++) {
1156 if (bfin_serial_ports[i].port.dev != &dev->dev)
1158 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1159 bfin_serial_ports[i].port.dev = NULL;
1160 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1161 gpio_free(bfin_serial_ports[i].cts_pin);
1162 gpio_free(bfin_serial_ports[i].rts_pin);
1169 static struct platform_driver bfin_serial_driver = {
1170 .probe = bfin_serial_probe,
1171 .remove = bfin_serial_remove,
1172 .suspend = bfin_serial_suspend,
1173 .resume = bfin_serial_resume,
1175 .name = "bfin-uart",
1176 .owner = THIS_MODULE,
1180 static int __init bfin_serial_init(void)
1183 #ifdef CONFIG_KGDB_UART
1184 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1188 pr_info("Serial: Blackfin serial driver\n");
1190 bfin_serial_init_ports();
1192 ret = uart_register_driver(&bfin_serial_reg);
1194 ret = platform_driver_register(&bfin_serial_driver);
1196 pr_debug("uart register failed\n");
1197 uart_unregister_driver(&bfin_serial_reg);
1200 #ifdef CONFIG_KGDB_UART
1201 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1202 request_irq(uart->port.irq, bfin_serial_rx_int,
1203 IRQF_DISABLED, "BFIN_UART_RX", uart);
1204 pr_info("Request irq for kgdb uart port\n");
1205 UART_SET_IER(uart, ERBFI);
1207 t.c_cflag = CS8|B57600;
1211 t.c_line = CONFIG_KGDB_UART_PORT;
1212 bfin_serial_set_termios(&uart->port, &t, &t);
1218 static void __exit bfin_serial_exit(void)
1220 platform_driver_unregister(&bfin_serial_driver);
1221 uart_unregister_driver(&bfin_serial_reg);
1224 module_init(bfin_serial_init);
1225 module_exit(bfin_serial_exit);
1227 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1228 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1229 MODULE_LICENSE("GPL");
1230 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1231 MODULE_ALIAS("platform:bfin-uart");