Merge master.kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb
[linux-2.6] / sound / oss / ymfpci.h
1 #ifndef __YMFPCI_H
2 #define __YMFPCI_H
3
4 /*
5  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
6  *  Definitions for Yahama YMF724/740/744/754 chips
7  *
8  *
9  *   This program is free software; you can redistribute it and/or modify
10  *   it under the terms of the GNU General Public License as published by
11  *   the Free Software Foundation; either version 2 of the License, or
12  *   (at your option) any later version.
13  *
14  *   This program is distributed in the hope that it will be useful,
15  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *   GNU General Public License for more details.
18  *
19  *   You should have received a copy of the GNU General Public License
20  *   along with this program; if not, write to the Free Software
21  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  */
24 #include <linux/config.h>
25 #include <linux/mutex.h>
26
27 /*
28  *  Direct registers
29  */
30
31 /* #define YMFREG(codec, reg)           (codec->port + YDSXGR_##reg) */
32
33 #define YDSXGR_INTFLAG                  0x0004
34 #define YDSXGR_ACTIVITY                 0x0006
35 #define YDSXGR_GLOBALCTRL               0x0008
36 #define YDSXGR_ZVCTRL                   0x000A
37 #define YDSXGR_TIMERCTRL                0x0010
38 #define YDSXGR_TIMERCTRL_TEN             0x0001
39 #define YDSXGR_TIMERCTRL_TIEN            0x0002
40 #define YDSXGR_TIMERCOUNT               0x0012
41 #define YDSXGR_SPDIFOUTCTRL             0x0018
42 #define YDSXGR_SPDIFOUTSTATUS           0x001C
43 #define YDSXGR_EEPROMCTRL               0x0020
44 #define YDSXGR_SPDIFINCTRL              0x0034
45 #define YDSXGR_SPDIFINSTATUS            0x0038
46 #define YDSXGR_DSPPROGRAMDL             0x0048
47 #define YDSXGR_DLCNTRL                  0x004C
48 #define YDSXGR_GPIOININTFLAG            0x0050
49 #define YDSXGR_GPIOININTENABLE          0x0052
50 #define YDSXGR_GPIOINSTATUS             0x0054
51 #define YDSXGR_GPIOOUTCTRL              0x0056
52 #define YDSXGR_GPIOFUNCENABLE           0x0058
53 #define YDSXGR_GPIOTYPECONFIG           0x005A
54 #define YDSXGR_AC97CMDDATA              0x0060
55 #define YDSXGR_AC97CMDADR               0x0062
56 #define YDSXGR_PRISTATUSDATA            0x0064
57 #define YDSXGR_PRISTATUSADR             0x0066
58 #define YDSXGR_SECSTATUSDATA            0x0068
59 #define YDSXGR_SECSTATUSADR             0x006A
60 #define YDSXGR_SECCONFIG                0x0070
61 #define YDSXGR_LEGACYOUTVOL             0x0080
62 #define YDSXGR_LEGACYOUTVOLL            0x0080
63 #define YDSXGR_LEGACYOUTVOLR            0x0082
64 #define YDSXGR_NATIVEDACOUTVOL          0x0084
65 #define YDSXGR_NATIVEDACOUTVOLL         0x0084
66 #define YDSXGR_NATIVEDACOUTVOLR         0x0086
67 #define YDSXGR_SPDIFOUTVOL              0x0088
68 #define YDSXGR_SPDIFOUTVOLL             0x0088
69 #define YDSXGR_SPDIFOUTVOLR             0x008A
70 #define YDSXGR_AC3OUTVOL                0x008C
71 #define YDSXGR_AC3OUTVOLL               0x008C
72 #define YDSXGR_AC3OUTVOLR               0x008E
73 #define YDSXGR_PRIADCOUTVOL             0x0090
74 #define YDSXGR_PRIADCOUTVOLL            0x0090
75 #define YDSXGR_PRIADCOUTVOLR            0x0092
76 #define YDSXGR_LEGACYLOOPVOL            0x0094
77 #define YDSXGR_LEGACYLOOPVOLL           0x0094
78 #define YDSXGR_LEGACYLOOPVOLR           0x0096
79 #define YDSXGR_NATIVEDACLOOPVOL         0x0098
80 #define YDSXGR_NATIVEDACLOOPVOLL        0x0098
81 #define YDSXGR_NATIVEDACLOOPVOLR        0x009A
82 #define YDSXGR_SPDIFLOOPVOL             0x009C
83 #define YDSXGR_SPDIFLOOPVOLL            0x009E
84 #define YDSXGR_SPDIFLOOPVOLR            0x009E
85 #define YDSXGR_AC3LOOPVOL               0x00A0
86 #define YDSXGR_AC3LOOPVOLL              0x00A0
87 #define YDSXGR_AC3LOOPVOLR              0x00A2
88 #define YDSXGR_PRIADCLOOPVOL            0x00A4
89 #define YDSXGR_PRIADCLOOPVOLL           0x00A4
90 #define YDSXGR_PRIADCLOOPVOLR           0x00A6
91 #define YDSXGR_NATIVEADCINVOL           0x00A8
92 #define YDSXGR_NATIVEADCINVOLL          0x00A8
93 #define YDSXGR_NATIVEADCINVOLR          0x00AA
94 #define YDSXGR_NATIVEDACINVOL           0x00AC
95 #define YDSXGR_NATIVEDACINVOLL          0x00AC
96 #define YDSXGR_NATIVEDACINVOLR          0x00AE
97 #define YDSXGR_BUF441OUTVOL             0x00B0
98 #define YDSXGR_BUF441OUTVOLL            0x00B0
99 #define YDSXGR_BUF441OUTVOLR            0x00B2
100 #define YDSXGR_BUF441LOOPVOL            0x00B4
101 #define YDSXGR_BUF441LOOPVOLL           0x00B4
102 #define YDSXGR_BUF441LOOPVOLR           0x00B6
103 #define YDSXGR_SPDIFOUTVOL2             0x00B8
104 #define YDSXGR_SPDIFOUTVOL2L            0x00B8
105 #define YDSXGR_SPDIFOUTVOL2R            0x00BA
106 #define YDSXGR_SPDIFLOOPVOL2            0x00BC
107 #define YDSXGR_SPDIFLOOPVOL2L           0x00BC
108 #define YDSXGR_SPDIFLOOPVOL2R           0x00BE
109 #define YDSXGR_ADCSLOTSR                0x00C0
110 #define YDSXGR_RECSLOTSR                0x00C4
111 #define YDSXGR_ADCFORMAT                0x00C8
112 #define YDSXGR_RECFORMAT                0x00CC
113 #define YDSXGR_P44SLOTSR                0x00D0
114 #define YDSXGR_STATUS                   0x0100
115 #define YDSXGR_CTRLSELECT               0x0104
116 #define YDSXGR_MODE                     0x0108
117 #define YDSXGR_SAMPLECOUNT              0x010C
118 #define YDSXGR_NUMOFSAMPLES             0x0110
119 #define YDSXGR_CONFIG                   0x0114
120 #define YDSXGR_PLAYCTRLSIZE             0x0140
121 #define YDSXGR_RECCTRLSIZE              0x0144
122 #define YDSXGR_EFFCTRLSIZE              0x0148
123 #define YDSXGR_WORKSIZE                 0x014C
124 #define YDSXGR_MAPOFREC                 0x0150
125 #define YDSXGR_MAPOFEFFECT              0x0154
126 #define YDSXGR_PLAYCTRLBASE             0x0158
127 #define YDSXGR_RECCTRLBASE              0x015C
128 #define YDSXGR_EFFCTRLBASE              0x0160
129 #define YDSXGR_WORKBASE                 0x0164
130 #define YDSXGR_DSPINSTRAM               0x1000
131 #define YDSXGR_CTRLINSTRAM              0x4000
132
133 #define YDSXG_AC97READCMD               0x8000
134 #define YDSXG_AC97WRITECMD              0x0000
135
136 #define PCIR_LEGCTRL                    0x40
137 #define PCIR_ELEGCTRL                   0x42
138 #define PCIR_DSXGCTRL                   0x48
139 #define PCIR_DSXPWRCTRL1                0x4a
140 #define PCIR_DSXPWRCTRL2                0x4e
141 #define PCIR_OPLADR                     0x60
142 #define PCIR_SBADR                      0x62
143 #define PCIR_MPUADR                     0x64
144
145 #define YDSXG_DSPLENGTH                 0x0080
146 #define YDSXG_CTRLLENGTH                0x3000
147
148 #define YDSXG_DEFAULT_WORK_SIZE         0x0400
149
150 #define YDSXG_PLAYBACK_VOICES           64
151 #define YDSXG_CAPTURE_VOICES            2
152 #define YDSXG_EFFECT_VOICES             5
153
154 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
155 #define NR_AC97         2
156
157 #define YMF_SAMPF                       256     /* Samples per frame @48000 */
158
159 /*
160  * The slot/voice control bank (2 of these per voice)
161  */
162
163 typedef struct stru_ymfpci_playback_bank {
164         u32 format;
165         u32 loop_default;
166         u32 base;                       /* 32-bit address */
167         u32 loop_start;                 /* 32-bit offset */
168         u32 loop_end;                   /* 32-bit offset */
169         u32 loop_frac;                  /* 8-bit fraction - loop_start */
170         u32 delta_end;                  /* pitch delta end */
171         u32 lpfK_end;
172         u32 eg_gain_end;
173         u32 left_gain_end;
174         u32 right_gain_end;
175         u32 eff1_gain_end;
176         u32 eff2_gain_end;
177         u32 eff3_gain_end;
178         u32 lpfQ;
179         u32 status;             /* P3: Always 0 for some reason. */
180         u32 num_of_frames;
181         u32 loop_count;
182         u32 start;              /* P3: J. reads this to know where chip is. */
183         u32 start_frac;
184         u32 delta;
185         u32 lpfK;
186         u32 eg_gain;
187         u32 left_gain;
188         u32 right_gain;
189         u32 eff1_gain;
190         u32 eff2_gain;
191         u32 eff3_gain;
192         u32 lpfD1;
193         u32 lpfD2;
194 } ymfpci_playback_bank_t;
195
196 typedef struct stru_ymfpci_capture_bank {
197         u32 base;                       /* 32-bit address (aligned at 4) */
198         u32 loop_end;                   /* size in BYTES (aligned at 4) */
199         u32 start;                      /* 32-bit offset */
200         u32 num_of_loops;               /* counter */
201 } ymfpci_capture_bank_t;
202
203 typedef struct stru_ymfpci_effect_bank {
204         u32 base;                       /* 32-bit address */
205         u32 loop_end;                   /* 32-bit offset */
206         u32 start;                      /* 32-bit offset */
207         u32 temp;
208 } ymfpci_effect_bank_t;
209
210 typedef struct ymf_voice ymfpci_voice_t;
211 /*
212  * Throughout the code Yaroslav names YMF unit pointer "codec"
213  * even though it does not correspond to any codec. Must be historic.
214  * We replace it with "unit" over time.
215  * AC97 parts use "codec" to denote a codec, naturally.
216  */
217 typedef struct ymf_unit ymfpci_t;
218
219 typedef enum {
220         YMFPCI_PCM,
221         YMFPCI_SYNTH,
222         YMFPCI_MIDI
223 } ymfpci_voice_type_t;
224
225 struct ymf_voice {
226         // ymfpci_t *codec;
227         int number;
228         char use, pcm, synth, midi;     // bool
229         ymfpci_playback_bank_t *bank;
230         struct ymf_pcm *ypcm;
231         dma_addr_t bank_ba;
232 };
233
234 struct ymf_capture {
235         // struct ymf_unit *unit;
236         int use;
237         ymfpci_capture_bank_t *bank;
238         struct ymf_pcm *ypcm;
239 };
240
241 struct ymf_unit {
242         u8 rev;                         /* PCI revision */
243         void __iomem *reg_area_virt;
244         void *dma_area_va;
245         dma_addr_t dma_area_ba;
246         unsigned int dma_area_size;
247
248         dma_addr_t bank_base_capture;
249         dma_addr_t bank_base_effect;
250         dma_addr_t work_base;
251         unsigned int work_size;
252
253         u32 *ctrl_playback;
254         dma_addr_t ctrl_playback_ba;
255         ymfpci_playback_bank_t *bank_playback[YDSXG_PLAYBACK_VOICES][2];
256         ymfpci_capture_bank_t *bank_capture[YDSXG_CAPTURE_VOICES][2];
257         ymfpci_effect_bank_t *bank_effect[YDSXG_EFFECT_VOICES][2];
258
259         int start_count;
260         int suspended;
261
262         u32 active_bank;
263         struct ymf_voice voices[YDSXG_PLAYBACK_VOICES];
264         struct ymf_capture capture[YDSXG_CAPTURE_VOICES];
265
266         struct ac97_codec *ac97_codec[NR_AC97];
267         u16 ac97_features;
268
269         struct pci_dev *pci;
270
271 #ifdef CONFIG_SOUND_YMFPCI_LEGACY
272         /* legacy hardware resources */
273         unsigned int iosynth, iomidi;
274         struct address_info opl3_data, mpu_data;
275 #endif
276
277         spinlock_t reg_lock;
278         spinlock_t voice_lock;
279         spinlock_t ac97_lock;
280
281         /* soundcore stuff */
282         int dev_audio;
283         struct mutex open_mutex;
284
285         struct list_head ymf_devs;
286         struct list_head states;        /* List of states for this unit */
287 };
288
289 struct ymf_dmabuf {
290         dma_addr_t dma_addr;
291         void *rawbuf;
292         unsigned buforder;
293
294         /* OSS buffer management stuff */
295         unsigned numfrag;
296         unsigned fragshift;
297
298         /* our buffer acts like a circular ring */
299         unsigned hwptr;         /* where dma last started */
300         unsigned swptr;         /* where driver last clear/filled */
301         int count;              /* fill count */
302         unsigned total_bytes;   /* total bytes dmaed by hardware */
303
304         wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
305
306         /* redundant, but makes calculations easier */
307         unsigned fragsize;
308         unsigned dmasize;       /* Total rawbuf[] size */
309
310         /* OSS stuff */
311         unsigned mapped:1;
312         unsigned ready:1;
313         unsigned ossfragshift;
314         int ossmaxfrags;
315         unsigned subdivision;
316 };
317
318 struct ymf_pcm_format {
319         int format;                     /* OSS format */
320         int rate;                       /* rate in Hz */
321         int voices;                     /* number of voices */
322         int shift;                      /* redundant, computed from the above */
323 };
324
325 typedef enum {
326         PLAYBACK_VOICE,
327         CAPTURE_REC,
328         CAPTURE_AC97,
329         EFFECT_DRY_LEFT,
330         EFFECT_DRY_RIGHT,
331         EFFECT_EFF1,
332         EFFECT_EFF2,
333         EFFECT_EFF3
334 } ymfpci_pcm_type_t;
335
336 /* This is variant record, but we hate unions. Little waste on pointers []. */
337 struct ymf_pcm {
338         ymfpci_pcm_type_t type;
339         struct ymf_state *state;
340
341         ymfpci_voice_t *voices[2];
342         int capture_bank_number;
343
344         struct ymf_dmabuf dmabuf;
345         int running;
346         int spdif;
347 };
348
349 /*
350  * "Software" or virtual channel, an instance of opened /dev/dsp.
351  * It may have two physical channels (pcms) for duplex operations.
352  */
353
354 struct ymf_state {
355         struct list_head chain;
356         struct ymf_unit *unit;                  /* backpointer */
357         struct ymf_pcm rpcm, wpcm;
358         struct ymf_pcm_format format;
359 };
360
361 #endif                          /* __YMFPCI_H */