1 // -------------------------------------------------------------------------
2 // Copyright (c) 2001, Dr Brian Gladman < >, Worcester, UK.
3 // All rights reserved.
7 // The free distribution and use of this software in both source and binary
8 // form is allowed (with or without changes) provided that:
10 // 1. distributions of this source code include the above copyright
11 // notice, this list of conditions and the following disclaimer//
13 // 2. distributions in binary form include the above copyright
14 // notice, this list of conditions and the following disclaimer
15 // in the documentation and/or other associated materials//
17 // 3. the copyright holder's name is not used to endorse products
18 // built using this software without specific written permission.
21 // ALTERNATIVELY, provided that this notice is retained in full, this product
22 // may be distributed under the terms of the GNU General Public License (GPL),
23 // in which case the provisions of the GPL apply INSTEAD OF those given above.
25 // Copyright (c) 2004 Linus Torvalds <torvalds@osdl.org>
26 // Copyright (c) 2004 Red Hat, Inc., James Morris <jmorris@redhat.com>
30 // This software is provided 'as is' with no explicit or implied warranties
31 // in respect of its properties including, but not limited to, correctness
32 // and fitness for purpose.
33 // -------------------------------------------------------------------------
34 // Issue Date: 29/07/2002
36 .file "aes-i586-asm.S"
39 // aes_rval aes_enc_blk(const unsigned char in_blk[], unsigned char out_blk[], const aes_ctx cx[1])//
40 // aes_rval aes_dec_blk(const unsigned char in_blk[], unsigned char out_blk[], const aes_ctx cx[1])//
42 #define tlen 1024 // length of each of 4 'xor' arrays (256 32-bit words)
44 // offsets to parameters with one register pushed onto stack
46 #define in_blk 8 // input byte array address parameter
47 #define out_blk 12 // output byte array address parameter
48 #define ctx 16 // AES context structure
50 // offsets in context structure
52 #define ekey 0 // encryption key schedule base address
53 #define nrnd 256 // number of rounds
54 #define dkey 260 // decryption key schedule base address
56 // register mapping for encrypt and decrypt subroutines
74 #define _h(reg) reg##h
75 #define h(reg) _h(reg)
77 #define _l(reg) reg##l
78 #define l(reg) _l(reg)
80 // This macro takes a 32-bit word representing a column and uses
81 // each of its four bytes to index into four tables of 256 32-bit
82 // words to obtain values that are then xored into the appropriate
83 // output registers r0, r1, r4 or r5.
86 // table table base address
91 // idx input register for the round (destroyed)
92 // tmp scratch register for the round
95 #define do_col(table, a1,a2,a3,a4, idx, tmp) \
97 xor table(,%tmp,4),%a1; \
100 xor table+tlen(,%tmp,4),%a2; \
101 movzx %l(idx),%tmp; \
102 movzx %h(idx),%idx; \
103 xor table+2*tlen(,%tmp,4),%a3; \
104 xor table+3*tlen(,%idx,4),%a4;
106 // initialise output registers from the key schedule
107 // NB1: original value of a3 is in idx on exit
108 // NB2: original values of a1,a2,a4 aren't used
109 #define do_fcol(table, a1,a2,a3,a4, idx, tmp, sched) \
111 movzx %l(idx),%tmp; \
113 xor table(,%tmp,4),%a1; \
115 movzx %h(idx),%tmp; \
117 xor table+tlen(,%tmp,4),%a2; \
118 movzx %l(idx),%tmp; \
119 movzx %h(idx),%idx; \
120 xor table+3*tlen(,%idx,4),%a4; \
123 xor table+2*tlen(,%tmp,4),%a3;
125 // initialise output registers from the key schedule
126 // NB1: original value of a3 is in idx on exit
127 // NB2: original values of a1,a2,a4 aren't used
128 #define do_icol(table, a1,a2,a3,a4, idx, tmp, sched) \
130 movzx %l(idx),%tmp; \
132 xor table(,%tmp,4),%a1; \
134 movzx %h(idx),%tmp; \
136 xor table+tlen(,%tmp,4),%a2; \
137 movzx %l(idx),%tmp; \
138 movzx %h(idx),%idx; \
139 xor table+3*tlen(,%idx,4),%a4; \
142 xor table+2*tlen(,%tmp,4),%a3;
145 // original Gladman had conditional saves to MMX regs.
146 #define save(a1, a2) \
149 #define restore(a1, a2) \
152 // These macros perform a forward encryption cycle. They are entered with
153 // the first previous round column values in r0,r1,r4,r5 and
154 // exit with the final values in the same registers, using stack
155 // for temporary storage.
157 // round column values
158 // on entry: r0,r1,r4,r5
159 // on exit: r2,r1,r4,r5
160 #define fwd_rnd1(arg, table) \
164 /* compute new column values */ \
165 do_fcol(table, r2,r5,r4,r1, r0,r3, arg); /* idx=r0 */ \
166 do_col (table, r4,r1,r2,r5, r0,r3); /* idx=r4 */ \
168 do_col (table, r1,r2,r5,r4, r0,r3); /* idx=r1 */ \
170 do_col (table, r5,r4,r1,r2, r0,r3); /* idx=r5 */
172 // round column values
173 // on entry: r2,r1,r4,r5
174 // on exit: r0,r1,r4,r5
175 #define fwd_rnd2(arg, table) \
179 /* compute new column values */ \
180 do_fcol(table, r0,r5,r4,r1, r2,r3, arg); /* idx=r2 */ \
181 do_col (table, r4,r1,r0,r5, r2,r3); /* idx=r4 */ \
183 do_col (table, r1,r0,r5,r4, r2,r3); /* idx=r1 */ \
185 do_col (table, r5,r4,r1,r0, r2,r3); /* idx=r5 */
187 // These macros performs an inverse encryption cycle. They are entered with
188 // the first previous round column values in r0,r1,r4,r5 and
189 // exit with the final values in the same registers, using stack
190 // for temporary storage
192 // round column values
193 // on entry: r0,r1,r4,r5
194 // on exit: r2,r1,r4,r5
195 #define inv_rnd1(arg, table) \
199 /* compute new column values */ \
200 do_icol(table, r2,r1,r4,r5, r0,r3, arg); /* idx=r0 */ \
201 do_col (table, r4,r5,r2,r1, r0,r3); /* idx=r4 */ \
203 do_col (table, r1,r4,r5,r2, r0,r3); /* idx=r1 */ \
205 do_col (table, r5,r2,r1,r4, r0,r3); /* idx=r5 */
207 // round column values
208 // on entry: r2,r1,r4,r5
209 // on exit: r0,r1,r4,r5
210 #define inv_rnd2(arg, table) \
214 /* compute new column values */ \
215 do_icol(table, r0,r1,r4,r5, r2,r3, arg); /* idx=r2 */ \
216 do_col (table, r4,r5,r0,r1, r2,r3); /* idx=r4 */ \
218 do_col (table, r1,r4,r5,r0, r2,r3); /* idx=r1 */ \
220 do_col (table, r5,r0,r1,r4, r2,r3); /* idx=r5 */
222 // AES (Rijndael) Encryption Subroutine
233 mov ctx(%esp),%ebp // pointer to context
235 // CAUTION: the order and the values used in these assigns
236 // rely on the register mappings
239 mov in_blk+4(%esp),%r2
241 mov nrnd(%ebp),%r3 // number of rounds
244 lea ekey(%ebp),%ebp // key pointer
247 // input four columns and xor in first round key
258 sub $8,%esp // space for register saves on stack
259 add $16,%ebp // increment to next round key
261 je 4f // 10 rounds for 128-bit key
264 je 3f // 12 rounds for 128-bit key
267 2: fwd_rnd1( -64(%ebp) ,ft_tab) // 14 rounds for 128-bit key
268 fwd_rnd2( -48(%ebp) ,ft_tab)
269 3: fwd_rnd1( -32(%ebp) ,ft_tab) // 12 rounds for 128-bit key
270 fwd_rnd2( -16(%ebp) ,ft_tab)
271 4: fwd_rnd1( (%ebp) ,ft_tab) // 10 rounds for 128-bit key
272 fwd_rnd2( +16(%ebp) ,ft_tab)
273 fwd_rnd1( +32(%ebp) ,ft_tab)
274 fwd_rnd2( +48(%ebp) ,ft_tab)
275 fwd_rnd1( +64(%ebp) ,ft_tab)
276 fwd_rnd2( +80(%ebp) ,ft_tab)
277 fwd_rnd1( +96(%ebp) ,ft_tab)
278 fwd_rnd2(+112(%ebp) ,ft_tab)
279 fwd_rnd1(+128(%ebp) ,ft_tab)
280 fwd_rnd2(+144(%ebp) ,fl_tab) // last round uses a different table
282 // move final values to the output array. CAUTION: the
283 // order of these assigns rely on the register mappings
286 mov out_blk+12(%esp),%ebp
298 // AES (Rijndael) Decryption Subroutine
309 mov ctx(%esp),%ebp // pointer to context
311 // CAUTION: the order and the values used in these assigns
312 // rely on the register mappings
315 mov in_blk+4(%esp),%r2
317 mov nrnd(%ebp),%r3 // number of rounds
320 lea dkey(%ebp),%ebp // key pointer
326 // input four columns and xor in first round key
337 sub $8,%esp // space for register saves on stack
338 sub $16,%ebp // increment to next round key
340 je 4f // 10 rounds for 128-bit key
343 je 3f // 12 rounds for 128-bit key
346 2: inv_rnd1( +64(%ebp), it_tab) // 14 rounds for 128-bit key
347 inv_rnd2( +48(%ebp), it_tab)
348 3: inv_rnd1( +32(%ebp), it_tab) // 12 rounds for 128-bit key
349 inv_rnd2( +16(%ebp), it_tab)
350 4: inv_rnd1( (%ebp), it_tab) // 10 rounds for 128-bit key
351 inv_rnd2( -16(%ebp), it_tab)
352 inv_rnd1( -32(%ebp), it_tab)
353 inv_rnd2( -48(%ebp), it_tab)
354 inv_rnd1( -64(%ebp), it_tab)
355 inv_rnd2( -80(%ebp), it_tab)
356 inv_rnd1( -96(%ebp), it_tab)
357 inv_rnd2(-112(%ebp), it_tab)
358 inv_rnd1(-128(%ebp), it_tab)
359 inv_rnd2(-144(%ebp), il_tab) // last round uses a different table
361 // move final values to the output array. CAUTION: the
362 // order of these assigns rely on the register mappings
365 mov out_blk+12(%esp),%ebp