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   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41
  42 #include <linux/mlx4/device.h>
  43 #include <linux/mlx4/doorbell.h>
  44
  45 #include "mlx4.h"
  46 #include "fw.h"
  47 #include "icm.h"
  48
  49 MODULE_AUTHOR("Roland Dreier");
  50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  51 MODULE_LICENSE("Dual BSD/GPL");
  52 MODULE_VERSION(DRV_VERSION);
  53
  54 #ifdef CONFIG_MLX4_DEBUG
  55
  56 int mlx4_debug_level = 0;
  57 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  59
  60 #endif /* CONFIG_MLX4_DEBUG */
  61
  62 #ifdef CONFIG_PCI_MSI
  63
  64 static int msi_x = 1;
  65 module_param(msi_x, int, 0444);
  66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  67
  68 #else /* CONFIG_PCI_MSI */
  69
  70 #define msi_x (0)
  71
  72 #endif /* CONFIG_PCI_MSI */
  73
  74 static char mlx4_version[] __devinitdata =
  75         DRV_NAME ": Mellanox ConnectX core driver v"
  76         DRV_VERSION " (" DRV_RELDATE ")\n";
  77
  78 static struct mlx4_profile default_profile = {
  79         .num_qp         = 1 << 17,
  80         .num_srq        = 1 << 16,
  81         .rdmarc_per_qp  = 1 << 4,
  82         .num_cq         = 1 << 16,
  83         .num_mcg        = 1 << 13,
  84         .num_mpt        = 1 << 17,
  85         .num_mtt        = 1 << 20,
  86 };
  87
  88 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
  89 {
  90         int err;
  91         int i;
  92
  93         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
  94         if (err) {
  95                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
  96                 return err;
  97         }
  98
  99         if (dev_cap->min_page_sz > PAGE_SIZE) {
 100                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 101                          "kernel PAGE_SIZE of %ld, aborting.\n",
 102                          dev_cap->min_page_sz, PAGE_SIZE);
 103                 return -ENODEV;
 104         }
 105         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 106                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 107                          "aborting.\n",
 108                          dev_cap->num_ports, MLX4_MAX_PORTS);
 109                 return -ENODEV;
 110         }
 111
 112         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 113                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 114                          "PCI resource 2 size of 0x%llx, aborting.\n",
 115                          dev_cap->uar_size,
 116                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 117                 return -ENODEV;
 118         }
 119
 120         dev->caps.num_ports          = dev_cap->num_ports;
 121         for (i = 1; i <= dev->caps.num_ports; ++i) {
 122                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 123                 dev->caps.mtu_cap[i]        = dev_cap->max_mtu[i];
 124                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 125                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 126                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 127         }
 128
 129         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 130         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 131         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 132         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 133         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 134         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 135         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 136         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 137         dev->caps.reserved_qps       = dev_cap->reserved_qps;
 138         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 139         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 140         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 141         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 142         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 143         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
 144         /*
 145          * Subtract 1 from the limit because we need to allocate a
 146          * spare CQE so the HCA HW can tell the difference between an
 147          * empty CQ and a full CQ.
 148          */
 149         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 150         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 151         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 152         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
 153                                                     MLX4_MTT_ENTRY_PER_SEG);
 154         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 155         dev->caps.reserved_uars      = dev_cap->reserved_uars;
 156         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 157         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
 158         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 159         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 160         dev->caps.flags              = dev_cap->flags;
 161         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 162         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 163         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 164         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 165
 166         return 0;
 167 }
 168
 169 static int mlx4_load_fw(struct mlx4_dev *dev)
 170 {
 171         struct mlx4_priv *priv = mlx4_priv(dev);
 172         int err;
 173
 174         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 175                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 176         if (!priv->fw.fw_icm) {
 177                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 178                 return -ENOMEM;
 179         }
 180
 181         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 182         if (err) {
 183                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 184                 goto err_free;
 185         }
 186
 187         err = mlx4_RUN_FW(dev);
 188         if (err) {
 189                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 190                 goto err_unmap_fa;
 191         }
 192
 193         return 0;
 194
 195 err_unmap_fa:
 196         mlx4_UNMAP_FA(dev);
 197
 198 err_free:
 199         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 200         return err;
 201 }
 202
 203 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 204                                 int cmpt_entry_sz)
 205 {
 206         struct mlx4_priv *priv = mlx4_priv(dev);
 207         int err;
 208
 209         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 210                                   cmpt_base +
 211                                   ((u64) (MLX4_CMPT_TYPE_QP *
 212                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 213                                   cmpt_entry_sz, dev->caps.num_qps,
 214                                   dev->caps.reserved_qps, 0, 0);
 215         if (err)
 216                 goto err;
 217
 218         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 219                                   cmpt_base +
 220                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 221                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 222                                   cmpt_entry_sz, dev->caps.num_srqs,
 223                                   dev->caps.reserved_srqs, 0, 0);
 224         if (err)
 225                 goto err_qp;
 226
 227         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 228                                   cmpt_base +
 229                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 230                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 231                                   cmpt_entry_sz, dev->caps.num_cqs,
 232                                   dev->caps.reserved_cqs, 0, 0);
 233         if (err)
 234                 goto err_srq;
 235
 236         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 237                                   cmpt_base +
 238                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 239                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 240                                   cmpt_entry_sz,
 241                                   roundup_pow_of_two(MLX4_NUM_EQ +
 242                                                      dev->caps.reserved_eqs),
 243                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
 244         if (err)
 245                 goto err_cq;
 246
 247         return 0;
 248
 249 err_cq:
 250         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 251
 252 err_srq:
 253         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 254
 255 err_qp:
 256         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 257
 258 err:
 259         return err;
 260 }
 261
 262 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 263                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 264 {
 265         struct mlx4_priv *priv = mlx4_priv(dev);
 266         u64 aux_pages;
 267         int err;
 268
 269         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 270         if (err) {
 271                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 272                 return err;
 273         }
 274
 275         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 276                  (unsigned long long) icm_size >> 10,
 277                  (unsigned long long) aux_pages << 2);
 278
 279         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 280                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 281         if (!priv->fw.aux_icm) {
 282                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 283                 return -ENOMEM;
 284         }
 285
 286         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 287         if (err) {
 288                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 289                 goto err_free_aux;
 290         }
 291
 292         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 293         if (err) {
 294                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 295                 goto err_unmap_aux;
 296         }
 297
 298         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
 299         if (err) {
 300                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 301                 goto err_unmap_cmpt;
 302         }
 303
 304         /*
 305          * Reserved MTT entries must be aligned up to a cacheline
 306          * boundary, since the FW will write to them, while the driver
 307          * writes to all other MTT entries. (The variable
 308          * dev->caps.mtt_entry_sz below is really the MTT segment
 309          * size, not the raw entry size)
 310          */
 311         dev->caps.reserved_mtts =
 312                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 313                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 314
 315         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 316                                   init_hca->mtt_base,
 317                                   dev->caps.mtt_entry_sz,
 318                                   dev->caps.num_mtt_segs,
 319                                   dev->caps.reserved_mtts, 1, 0);
 320         if (err) {
 321                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 322                 goto err_unmap_eq;
 323         }
 324
 325         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 326                                   init_hca->dmpt_base,
 327                                   dev_cap->dmpt_entry_sz,
 328                                   dev->caps.num_mpts,
 329                                   dev->caps.reserved_mrws, 1, 1);
 330         if (err) {
 331                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 332                 goto err_unmap_mtt;
 333         }
 334
 335         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 336                                   init_hca->qpc_base,
 337                                   dev_cap->qpc_entry_sz,
 338                                   dev->caps.num_qps,
 339                                   dev->caps.reserved_qps, 0, 0);
 340         if (err) {
 341                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 342                 goto err_unmap_dmpt;
 343         }
 344
 345         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 346                                   init_hca->auxc_base,
 347                                   dev_cap->aux_entry_sz,
 348                                   dev->caps.num_qps,
 349                                   dev->caps.reserved_qps, 0, 0);
 350         if (err) {
 351                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 352                 goto err_unmap_qp;
 353         }
 354
 355         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 356                                   init_hca->altc_base,
 357                                   dev_cap->altc_entry_sz,
 358                                   dev->caps.num_qps,
 359                                   dev->caps.reserved_qps, 0, 0);
 360         if (err) {
 361                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 362                 goto err_unmap_auxc;
 363         }
 364
 365         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 366                                   init_hca->rdmarc_base,
 367                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 368                                   dev->caps.num_qps,
 369                                   dev->caps.reserved_qps, 0, 0);
 370         if (err) {
 371                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 372                 goto err_unmap_altc;
 373         }
 374
 375         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 376                                   init_hca->cqc_base,
 377                                   dev_cap->cqc_entry_sz,
 378                                   dev->caps.num_cqs,
 379                                   dev->caps.reserved_cqs, 0, 0);
 380         if (err) {
 381                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 382                 goto err_unmap_rdmarc;
 383         }
 384
 385         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 386                                   init_hca->srqc_base,
 387                                   dev_cap->srq_entry_sz,
 388                                   dev->caps.num_srqs,
 389                                   dev->caps.reserved_srqs, 0, 0);
 390         if (err) {
 391                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 392                 goto err_unmap_cq;
 393         }
 394
 395         /*
 396          * It's not strictly required, but for simplicity just map the
 397          * whole multicast group table now.  The table isn't very big
 398          * and it's a lot easier than trying to track ref counts.
 399          */
 400         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 401                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
 402                                   dev->caps.num_mgms + dev->caps.num_amgms,
 403                                   dev->caps.num_mgms + dev->caps.num_amgms,
 404                                   0, 0);
 405         if (err) {
 406                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 407                 goto err_unmap_srq;
 408         }
 409
 410         return 0;
 411
 412 err_unmap_srq:
 413         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 414
 415 err_unmap_cq:
 416         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 417
 418 err_unmap_rdmarc:
 419         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 420
 421 err_unmap_altc:
 422         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 423
 424 err_unmap_auxc:
 425         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 426
 427 err_unmap_qp:
 428         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 429
 430 err_unmap_dmpt:
 431         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 432
 433 err_unmap_mtt:
 434         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 435
 436 err_unmap_eq:
 437         mlx4_unmap_eq_icm(dev);
 438
 439 err_unmap_cmpt:
 440         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 441         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 442         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 443         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 444
 445 err_unmap_aux:
 446         mlx4_UNMAP_ICM_AUX(dev);
 447
 448 err_free_aux:
 449         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 450
 451         return err;
 452 }
 453
 454 static void mlx4_free_icms(struct mlx4_dev *dev)
 455 {
 456         struct mlx4_priv *priv = mlx4_priv(dev);
 457
 458         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
 459         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 460         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 461         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 462         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 463         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 464         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 465         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 466         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 467         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 468         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 469         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 470         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 471         mlx4_unmap_eq_icm(dev);
 472
 473         mlx4_UNMAP_ICM_AUX(dev);
 474         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 475 }
 476
 477 static void mlx4_close_hca(struct mlx4_dev *dev)
 478 {
 479         mlx4_CLOSE_HCA(dev, 0);
 480         mlx4_free_icms(dev);
 481         mlx4_UNMAP_FA(dev);
 482         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
 483 }
 484
 485 static int mlx4_init_hca(struct mlx4_dev *dev)
 486 {
 487         struct mlx4_priv          *priv = mlx4_priv(dev);
 488         struct mlx4_adapter        adapter;
 489         struct mlx4_dev_cap        dev_cap;
 490         struct mlx4_mod_stat_cfg   mlx4_cfg;
 491         struct mlx4_profile        profile;
 492         struct mlx4_init_hca_param init_hca;
 493         u64 icm_size;
 494         int err;
 495
 496         err = mlx4_QUERY_FW(dev);
 497         if (err) {
 498                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
 499                 return err;
 500         }
 501
 502         err = mlx4_load_fw(dev);
 503         if (err) {
 504                 mlx4_err(dev, "Failed to start FW, aborting.\n");
 505                 return err;
 506         }
 507
 508         mlx4_cfg.log_pg_sz_m = 1;
 509         mlx4_cfg.log_pg_sz = 0;
 510         err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
 511         if (err)
 512                 mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
 513
 514         err = mlx4_dev_cap(dev, &dev_cap);
 515         if (err) {
 516                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 517                 goto err_stop_fw;
 518         }
 519
 520         profile = default_profile;
 521
 522         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
 523         if ((long long) icm_size < 0) {
 524                 err = icm_size;
 525                 goto err_stop_fw;
 526         }
 527
 528         init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
 529
 530         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
 531         if (err)
 532                 goto err_stop_fw;
 533
 534         err = mlx4_INIT_HCA(dev, &init_hca);
 535         if (err) {
 536                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
 537                 goto err_free_icm;
 538         }
 539
 540         err = mlx4_QUERY_ADAPTER(dev, &adapter);
 541         if (err) {
 542                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
 543                 goto err_close;
 544         }
 545
 546         priv->eq_table.inta_pin = adapter.inta_pin;
 547         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
 548
 549         return 0;
 550
 551 err_close:
 552         mlx4_close_hca(dev);
 553
 554 err_free_icm:
 555         mlx4_free_icms(dev);
 556
 557 err_stop_fw:
 558         mlx4_UNMAP_FA(dev);
 559         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 560
 561         return err;
 562 }
 563
 564 static int mlx4_setup_hca(struct mlx4_dev *dev)
 565 {
 566         struct mlx4_priv *priv = mlx4_priv(dev);
 567         int err;
 568
 569         err = mlx4_init_uar_table(dev);
 570         if (err) {
 571                 mlx4_err(dev, "Failed to initialize "
 572                          "user access region table, aborting.\n");
 573                 return err;
 574         }
 575
 576         err = mlx4_uar_alloc(dev, &priv->driver_uar);
 577         if (err) {
 578                 mlx4_err(dev, "Failed to allocate driver access region, "
 579                          "aborting.\n");
 580                 goto err_uar_table_free;
 581         }
 582
 583         priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
 584         if (!priv->kar) {
 585                 mlx4_err(dev, "Couldn't map kernel access region, "
 586                          "aborting.\n");
 587                 err = -ENOMEM;
 588                 goto err_uar_free;
 589         }
 590
 591         err = mlx4_init_pd_table(dev);
 592         if (err) {
 593                 mlx4_err(dev, "Failed to initialize "
 594                          "protection domain table, aborting.\n");
 595                 goto err_kar_unmap;
 596         }
 597
 598         err = mlx4_init_mr_table(dev);
 599         if (err) {
 600                 mlx4_err(dev, "Failed to initialize "
 601                          "memory region table, aborting.\n");
 602                 goto err_pd_table_free;
 603         }
 604
 605         err = mlx4_init_eq_table(dev);
 606         if (err) {
 607                 mlx4_err(dev, "Failed to initialize "
 608                          "event queue table, aborting.\n");
 609                 goto err_mr_table_free;
 610         }
 611
 612         err = mlx4_cmd_use_events(dev);
 613         if (err) {
 614                 mlx4_err(dev, "Failed to switch to event-driven "
 615                          "firmware commands, aborting.\n");
 616                 goto err_eq_table_free;
 617         }
 618
 619         err = mlx4_NOP(dev);
 620         if (err) {
 621                 if (dev->flags & MLX4_FLAG_MSI_X) {
 622                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
 623                                   "interrupt IRQ %d).\n",
 624                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 625                         mlx4_warn(dev, "Trying again without MSI-X.\n");
 626                 } else {
 627                         mlx4_err(dev, "NOP command failed to generate interrupt "
 628                                  "(IRQ %d), aborting.\n",
 629                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 630                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
 631                 }
 632
 633                 goto err_cmd_poll;
 634         }
 635
 636         mlx4_dbg(dev, "NOP command IRQ test passed\n");
 637
 638         err = mlx4_init_cq_table(dev);
 639         if (err) {
 640                 mlx4_err(dev, "Failed to initialize "
 641                          "completion queue table, aborting.\n");
 642                 goto err_cmd_poll;
 643         }
 644
 645         err = mlx4_init_srq_table(dev);
 646         if (err) {
 647                 mlx4_err(dev, "Failed to initialize "
 648                          "shared receive queue table, aborting.\n");
 649                 goto err_cq_table_free;
 650         }
 651
 652         err = mlx4_init_qp_table(dev);
 653         if (err) {
 654                 mlx4_err(dev, "Failed to initialize "
 655                          "queue pair table, aborting.\n");
 656                 goto err_srq_table_free;
 657         }
 658
 659         err = mlx4_init_mcg_table(dev);
 660         if (err) {
 661                 mlx4_err(dev, "Failed to initialize "
 662                          "multicast group table, aborting.\n");
 663                 goto err_qp_table_free;
 664         }
 665
 666         return 0;
 667
 668 err_qp_table_free:
 669         mlx4_cleanup_qp_table(dev);
 670
 671 err_srq_table_free:
 672         mlx4_cleanup_srq_table(dev);
 673
 674 err_cq_table_free:
 675         mlx4_cleanup_cq_table(dev);
 676
 677 err_cmd_poll:
 678         mlx4_cmd_use_polling(dev);
 679
 680 err_eq_table_free:
 681         mlx4_cleanup_eq_table(dev);
 682
 683 err_mr_table_free:
 684         mlx4_cleanup_mr_table(dev);
 685
 686 err_pd_table_free:
 687         mlx4_cleanup_pd_table(dev);
 688
 689 err_kar_unmap:
 690         iounmap(priv->kar);
 691
 692 err_uar_free:
 693         mlx4_uar_free(dev, &priv->driver_uar);
 694
 695 err_uar_table_free:
 696         mlx4_cleanup_uar_table(dev);
 697         return err;
 698 }
 699
 700 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
 701 {
 702         struct mlx4_priv *priv = mlx4_priv(dev);
 703         struct msix_entry entries[MLX4_NUM_EQ];
 704         int err;
 705         int i;
 706
 707         if (msi_x) {
 708                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 709                         entries[i].entry = i;
 710
 711                 err = pci_enable_msix(dev->pdev, entries, ARRAY_SIZE(entries));
 712                 if (err) {
 713                         if (err > 0)
 714                                 mlx4_info(dev, "Only %d MSI-X vectors available, "
 715                                           "not using MSI-X\n", err);
 716                         goto no_msi;
 717                 }
 718
 719                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 720                         priv->eq_table.eq[i].irq = entries[i].vector;
 721
 722                 dev->flags |= MLX4_FLAG_MSI_X;
 723                 return;
 724         }
 725
 726 no_msi:
 727         for (i = 0; i < MLX4_NUM_EQ; ++i)
 728                 priv->eq_table.eq[i].irq = dev->pdev->irq;
 729 }
 730
 731 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 732 {
 733         struct mlx4_priv *priv;
 734         struct mlx4_dev *dev;
 735         int err;
 736
 737         printk(KERN_INFO PFX "Initializing %s\n",
 738                pci_name(pdev));
 739
 740         err = pci_enable_device(pdev);
 741         if (err) {
 742                 dev_err(&pdev->dev, "Cannot enable PCI device, "
 743                         "aborting.\n");
 744                 return err;
 745         }
 746
 747         /*
 748          * Check for BARs.  We expect 0: 1MB
 749          */
 750         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
 751             pci_resource_len(pdev, 0) != 1 << 20) {
 752                 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
 753                 err = -ENODEV;
 754                 goto err_disable_pdev;
 755         }
 756         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 757                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
 758                 err = -ENODEV;
 759                 goto err_disable_pdev;
 760         }
 761
 762         err = pci_request_region(pdev, 0, DRV_NAME);
 763         if (err) {
 764                 dev_err(&pdev->dev, "Cannot request control region, aborting.\n");
 765                 goto err_disable_pdev;
 766         }
 767
 768         err = pci_request_region(pdev, 2, DRV_NAME);
 769         if (err) {
 770                 dev_err(&pdev->dev, "Cannot request UAR region, aborting.\n");
 771                 goto err_release_bar0;
 772         }
 773
 774         pci_set_master(pdev);
 775
 776         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 777         if (err) {
 778                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
 779                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 780                 if (err) {
 781                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
 782                         goto err_release_bar2;
 783                 }
 784         }
 785         err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 786         if (err) {
 787                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
 788                          "consistent PCI DMA mask.\n");
 789                 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 790                 if (err) {
 791                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
 792                                 "aborting.\n");
 793                         goto err_release_bar2;
 794                 }
 795         }
 796
 797         priv = kzalloc(sizeof *priv, GFP_KERNEL);
 798         if (!priv) {
 799                 dev_err(&pdev->dev, "Device struct alloc failed, "
 800                         "aborting.\n");
 801                 err = -ENOMEM;
 802                 goto err_release_bar2;
 803         }
 804
 805         dev       = &priv->dev;
 806         dev->pdev = pdev;
 807         INIT_LIST_HEAD(&priv->ctx_list);
 808         spin_lock_init(&priv->ctx_lock);
 809
 810         INIT_LIST_HEAD(&priv->pgdir_list);
 811         mutex_init(&priv->pgdir_mutex);
 812
 813         /*
 814          * Now reset the HCA before we touch the PCI capabilities or
 815          * attempt a firmware command, since a boot ROM may have left
 816          * the HCA in an undefined state.
 817          */
 818         err = mlx4_reset(dev);
 819         if (err) {
 820                 mlx4_err(dev, "Failed to reset HCA, aborting.\n");
 821                 goto err_free_dev;
 822         }
 823
 824         if (mlx4_cmd_init(dev)) {
 825                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
 826                 goto err_free_dev;
 827         }
 828
 829         err = mlx4_init_hca(dev);
 830         if (err)
 831                 goto err_cmd;
 832
 833         mlx4_enable_msi_x(dev);
 834
 835         err = mlx4_setup_hca(dev);
 836         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
 837                 dev->flags &= ~MLX4_FLAG_MSI_X;
 838                 pci_disable_msix(pdev);
 839                 err = mlx4_setup_hca(dev);
 840         }
 841
 842         if (err)
 843                 goto err_close;
 844
 845         err = mlx4_register_device(dev);
 846         if (err)
 847                 goto err_cleanup;
 848
 849         pci_set_drvdata(pdev, dev);
 850
 851         return 0;
 852
 853 err_cleanup:
 854         mlx4_cleanup_mcg_table(dev);
 855         mlx4_cleanup_qp_table(dev);
 856         mlx4_cleanup_srq_table(dev);
 857         mlx4_cleanup_cq_table(dev);
 858         mlx4_cmd_use_polling(dev);
 859         mlx4_cleanup_eq_table(dev);
 860         mlx4_cleanup_mr_table(dev);
 861         mlx4_cleanup_pd_table(dev);
 862         mlx4_cleanup_uar_table(dev);
 863
 864 err_close:
 865         if (dev->flags & MLX4_FLAG_MSI_X)
 866                 pci_disable_msix(pdev);
 867
 868         mlx4_close_hca(dev);
 869
 870 err_cmd:
 871         mlx4_cmd_cleanup(dev);
 872
 873 err_free_dev:
 874         kfree(priv);
 875
 876 err_release_bar2:
 877         pci_release_region(pdev, 2);
 878
 879 err_release_bar0:
 880         pci_release_region(pdev, 0);
 881
 882 err_disable_pdev:
 883         pci_disable_device(pdev);
 884         pci_set_drvdata(pdev, NULL);
 885         return err;
 886 }
 887
 888 static int __devinit mlx4_init_one(struct pci_dev *pdev,
 889                                    const struct pci_device_id *id)
 890 {
 891         static int mlx4_version_printed;
 892
 893         if (!mlx4_version_printed) {
 894                 printk(KERN_INFO "%s", mlx4_version);
 895                 ++mlx4_version_printed;
 896         }
 897
 898         return __mlx4_init_one(pdev, id);
 899 }
 900
 901 static void mlx4_remove_one(struct pci_dev *pdev)
 902 {
 903         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
 904         struct mlx4_priv *priv = mlx4_priv(dev);
 905         int p;
 906
 907         if (dev) {
 908                 mlx4_unregister_device(dev);
 909
 910                 for (p = 1; p <= dev->caps.num_ports; ++p)
 911                         mlx4_CLOSE_PORT(dev, p);
 912
 913                 mlx4_cleanup_mcg_table(dev);
 914                 mlx4_cleanup_qp_table(dev);
 915                 mlx4_cleanup_srq_table(dev);
 916                 mlx4_cleanup_cq_table(dev);
 917                 mlx4_cmd_use_polling(dev);
 918                 mlx4_cleanup_eq_table(dev);
 919                 mlx4_cleanup_mr_table(dev);
 920                 mlx4_cleanup_pd_table(dev);
 921
 922                 iounmap(priv->kar);
 923                 mlx4_uar_free(dev, &priv->driver_uar);
 924                 mlx4_cleanup_uar_table(dev);
 925                 mlx4_close_hca(dev);
 926                 mlx4_cmd_cleanup(dev);
 927
 928                 if (dev->flags & MLX4_FLAG_MSI_X)
 929                         pci_disable_msix(pdev);
 930
 931                 kfree(priv);
 932                 pci_release_region(pdev, 2);
 933                 pci_release_region(pdev, 0);
 934                 pci_disable_device(pdev);
 935                 pci_set_drvdata(pdev, NULL);
 936         }
 937 }
 938
 939 int mlx4_restart_one(struct pci_dev *pdev)
 940 {
 941         mlx4_remove_one(pdev);
 942         return __mlx4_init_one(pdev, NULL);
 943 }
 944
 945 static struct pci_device_id mlx4_pci_table[] = {
 946         { PCI_VDEVICE(MELLANOX, 0x6340) }, /* MT25408 "Hermon" SDR */
 947         { PCI_VDEVICE(MELLANOX, 0x634a) }, /* MT25408 "Hermon" DDR */
 948         { PCI_VDEVICE(MELLANOX, 0x6354) }, /* MT25408 "Hermon" QDR */
 949         { PCI_VDEVICE(MELLANOX, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
 950         { PCI_VDEVICE(MELLANOX, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
 951         { 0, }
 952 };
 953
 954 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
 955
 956 static struct pci_driver mlx4_driver = {
 957         .name           = DRV_NAME,
 958         .id_table       = mlx4_pci_table,
 959         .probe          = mlx4_init_one,
 960         .remove         = __devexit_p(mlx4_remove_one)
 961 };
 962
 963 static int __init mlx4_init(void)
 964 {
 965         int ret;
 966
 967         ret = mlx4_catas_init();
 968         if (ret)
 969                 return ret;
 970
 971         ret = pci_register_driver(&mlx4_driver);
 972         return ret < 0 ? ret : 0;
 973 }
 974
 975 static void __exit mlx4_cleanup(void)
 976 {
 977         pci_unregister_driver(&mlx4_driver);
 978         mlx4_catas_cleanup();
 979 }
 980
 981 module_init(mlx4_init);
 982 module_exit(mlx4_cleanup);