2 * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <rdma/ib_mad.h>
35 #include <rdma/ib_user_verbs.h>
37 #include <linux/utsname.h>
39 #include "ipath_kernel.h"
40 #include "ipath_verbs.h"
41 #include "ipath_common.h"
43 static unsigned int ib_ipath_qp_table_size = 251;
44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
45 MODULE_PARM_DESC(qp_table_size, "QP table size");
47 unsigned int ib_ipath_lkey_table_size = 12;
48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
50 MODULE_PARM_DESC(lkey_table_size,
51 "LKEY table size in bits (2^n, 1 <= n <= 23)");
53 static unsigned int ib_ipath_max_pds = 0xFFFF;
54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
55 MODULE_PARM_DESC(max_pds,
56 "Maximum number of protection domains to support");
58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
64 MODULE_PARM_DESC(max_cqes,
65 "Maximum number of completion queue entries to support");
67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
76 unsigned int ib_ipath_max_qps = 16384;
77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
80 unsigned int ib_ipath_max_sges = 0x60;
81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
84 unsigned int ib_ipath_max_mcast_grps = 16384;
85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
87 MODULE_PARM_DESC(max_mcast_grps,
88 "Maximum number of multicast groups to support");
90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
92 uint, S_IWUSR | S_IRUGO);
93 MODULE_PARM_DESC(max_mcast_qp_attached,
94 "Maximum number of attached QPs to support");
96 unsigned int ib_ipath_max_srqs = 1024;
97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
100 unsigned int ib_ipath_max_srq_sges = 128;
101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
102 uint, S_IWUSR | S_IRUGO);
103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
107 uint, S_IWUSR | S_IRUGO);
108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
110 static unsigned int ib_ipath_disable_sma;
111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
116 [IB_QPS_INIT] = IPATH_POST_RECV_OK,
117 [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
118 [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
119 IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
120 [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
122 [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
126 struct ipath_ucontext {
127 struct ib_ucontext ibucontext;
130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
133 return container_of(ibucontext, struct ipath_ucontext, ibucontext);
137 * Translate ib_wr_opcode into ib_wc_opcode.
139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
140 [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
141 [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
142 [IB_WR_SEND] = IB_WC_SEND,
143 [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
144 [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
145 [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
146 [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
152 static __be64 sys_image_guid;
155 * ipath_copy_sge - copy data to SGE memory
157 * @data: the data to copy
158 * @length: the length of the data
160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
162 struct ipath_sge *sge = &ss->sge;
165 u32 len = sge->length;
170 memcpy(sge->vaddr, data, len);
173 sge->sge_length -= len;
174 if (sge->sge_length == 0) {
176 *sge = *ss->sg_list++;
177 } else if (sge->length == 0 && sge->mr != NULL) {
178 if (++sge->n >= IPATH_SEGSZ) {
179 if (++sge->m >= sge->mr->mapsz)
184 sge->mr->map[sge->m]->segs[sge->n].vaddr;
186 sge->mr->map[sge->m]->segs[sge->n].length;
194 * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
196 * @length: the number of bytes to skip
198 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
200 struct ipath_sge *sge = &ss->sge;
203 u32 len = sge->length;
210 sge->sge_length -= len;
211 if (sge->sge_length == 0) {
213 *sge = *ss->sg_list++;
214 } else if (sge->length == 0 && sge->mr != NULL) {
215 if (++sge->n >= IPATH_SEGSZ) {
216 if (++sge->m >= sge->mr->mapsz)
221 sge->mr->map[sge->m]->segs[sge->n].vaddr;
223 sge->mr->map[sge->m]->segs[sge->n].length;
230 * ipath_post_send - post a send on a QP
231 * @ibqp: the QP to post the send on
232 * @wr: the list of work requests to post
233 * @bad_wr: the first bad WR is put here
235 * This may be called from interrupt context.
237 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
238 struct ib_send_wr **bad_wr)
240 struct ipath_qp *qp = to_iqp(ibqp);
243 /* Check that state is OK to post send. */
244 if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK)) {
250 for (; wr; wr = wr->next) {
251 switch (qp->ibqp.qp_type) {
254 err = ipath_post_ruc_send(qp, wr);
260 err = ipath_post_ud_send(qp, wr);
277 * ipath_post_receive - post a receive on a QP
278 * @ibqp: the QP to post the receive on
279 * @wr: the WR to post
280 * @bad_wr: the first bad WR is put here
282 * This may be called from interrupt context.
284 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
285 struct ib_recv_wr **bad_wr)
287 struct ipath_qp *qp = to_iqp(ibqp);
288 struct ipath_rwq *wq = qp->r_rq.wq;
292 /* Check that state is OK to post receive. */
293 if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
299 for (; wr; wr = wr->next) {
300 struct ipath_rwqe *wqe;
304 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
310 spin_lock_irqsave(&qp->r_rq.lock, flags);
312 if (next >= qp->r_rq.size)
314 if (next == wq->tail) {
315 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
321 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
322 wqe->wr_id = wr->wr_id;
323 wqe->num_sge = wr->num_sge;
324 for (i = 0; i < wr->num_sge; i++)
325 wqe->sg_list[i] = wr->sg_list[i];
327 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
336 * ipath_qp_rcv - processing an incoming packet on a QP
337 * @dev: the device the packet came on
338 * @hdr: the packet header
339 * @has_grh: true if the packet has a GRH
340 * @data: the packet data
341 * @tlen: the packet length
342 * @qp: the QP the packet came on
344 * This is called from ipath_ib_rcv() to process an incoming packet
346 * Called at interrupt level.
348 static void ipath_qp_rcv(struct ipath_ibdev *dev,
349 struct ipath_ib_header *hdr, int has_grh,
350 void *data, u32 tlen, struct ipath_qp *qp)
352 /* Check for valid receive state. */
353 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
358 switch (qp->ibqp.qp_type) {
361 if (ib_ipath_disable_sma)
365 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
369 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
373 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
382 * ipath_ib_rcv - process an incoming packet
383 * @arg: the device pointer
384 * @rhdr: the header of the packet
385 * @data: the packet data
386 * @tlen: the packet length
388 * This is called from ipath_kreceive() to process an incoming packet at
389 * interrupt level. Tlen is the length of the header + data + CRC in bytes.
391 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
394 struct ipath_ib_header *hdr = rhdr;
395 struct ipath_other_headers *ohdr;
402 if (unlikely(dev == NULL))
405 if (unlikely(tlen < 24)) { /* LRH+BTH+CRC */
410 /* Check for a valid destination LID (see ch. 7.11.1). */
411 lid = be16_to_cpu(hdr->lrh[1]);
412 if (lid < IPATH_MULTICAST_LID_BASE) {
413 lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
414 if (unlikely(lid != dev->dd->ipath_lid)) {
421 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
422 if (lnh == IPATH_LRH_BTH)
424 else if (lnh == IPATH_LRH_GRH)
425 ohdr = &hdr->u.l.oth;
431 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
432 dev->opstats[opcode].n_bytes += tlen;
433 dev->opstats[opcode].n_packets++;
435 /* Get the destination QP number. */
436 qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
437 if (qp_num == IPATH_MULTICAST_QPN) {
438 struct ipath_mcast *mcast;
439 struct ipath_mcast_qp *p;
441 if (lnh != IPATH_LRH_GRH) {
445 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
450 dev->n_multicast_rcv++;
451 list_for_each_entry_rcu(p, &mcast->qp_list, list)
452 ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
454 * Notify ipath_multicast_detach() if it is waiting for us
457 if (atomic_dec_return(&mcast->refcount) <= 1)
458 wake_up(&mcast->wait);
460 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
462 dev->n_unicast_rcv++;
463 ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
466 * Notify ipath_destroy_qp() if it is waiting
469 if (atomic_dec_and_test(&qp->refcount))
479 * ipath_ib_timer - verbs timer
480 * @arg: the device pointer
482 * This is called from ipath_do_rcv_timer() at interrupt level to check for
483 * QPs which need retransmits and to collect performance numbers.
485 void ipath_ib_timer(struct ipath_ibdev *dev)
487 struct ipath_qp *resend = NULL;
488 struct list_head *last;
495 spin_lock_irqsave(&dev->pending_lock, flags);
496 /* Start filling the next pending queue. */
497 if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
498 dev->pending_index = 0;
499 /* Save any requests still in the new queue, they have timed out. */
500 last = &dev->pending[dev->pending_index];
501 while (!list_empty(last)) {
502 qp = list_entry(last->next, struct ipath_qp, timerwait);
503 list_del_init(&qp->timerwait);
504 qp->timer_next = resend;
506 atomic_inc(&qp->refcount);
508 last = &dev->rnrwait;
509 if (!list_empty(last)) {
510 qp = list_entry(last->next, struct ipath_qp, timerwait);
511 if (--qp->s_rnr_timeout == 0) {
513 list_del_init(&qp->timerwait);
514 tasklet_hi_schedule(&qp->s_task);
515 if (list_empty(last))
517 qp = list_entry(last->next, struct ipath_qp,
519 } while (qp->s_rnr_timeout == 0);
523 * We should only be in the started state if pma_sample_start != 0
525 if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
526 --dev->pma_sample_start == 0) {
527 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
528 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
532 &dev->ipath_xmit_wait);
534 if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
535 if (dev->pma_sample_interval == 0) {
536 u64 ta, tb, tc, td, te;
538 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
539 ipath_snapshot_counters(dev->dd, &ta, &tb,
542 dev->ipath_sword = ta - dev->ipath_sword;
543 dev->ipath_rword = tb - dev->ipath_rword;
544 dev->ipath_spkts = tc - dev->ipath_spkts;
545 dev->ipath_rpkts = td - dev->ipath_rpkts;
546 dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
549 dev->pma_sample_interval--;
551 spin_unlock_irqrestore(&dev->pending_lock, flags);
553 /* XXX What if timer fires again while this is running? */
554 for (qp = resend; qp != NULL; qp = qp->timer_next) {
557 spin_lock_irqsave(&qp->s_lock, flags);
558 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
560 ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
562 spin_unlock_irqrestore(&qp->s_lock, flags);
564 /* Notify ipath_destroy_qp() if it is waiting. */
565 if (atomic_dec_and_test(&qp->refcount))
570 static void update_sge(struct ipath_sge_state *ss, u32 length)
572 struct ipath_sge *sge = &ss->sge;
574 sge->vaddr += length;
575 sge->length -= length;
576 sge->sge_length -= length;
577 if (sge->sge_length == 0) {
579 *sge = *ss->sg_list++;
580 } else if (sge->length == 0 && sge->mr != NULL) {
581 if (++sge->n >= IPATH_SEGSZ) {
582 if (++sge->m >= sge->mr->mapsz)
586 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
587 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
591 #ifdef __LITTLE_ENDIAN
592 static inline u32 get_upper_bits(u32 data, u32 shift)
594 return data >> shift;
597 static inline u32 set_upper_bits(u32 data, u32 shift)
599 return data << shift;
602 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
604 data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
605 data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
609 static inline u32 get_upper_bits(u32 data, u32 shift)
611 return data << shift;
614 static inline u32 set_upper_bits(u32 data, u32 shift)
616 return data >> shift;
619 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
621 data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
622 data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
627 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
635 u32 len = ss->sge.length;
641 if (len > ss->sge.sge_length)
642 len = ss->sge.sge_length;
643 /* If the source address is not aligned, try to align it. */
644 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
646 u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
648 u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
651 y = sizeof(u32) - off;
654 if (len + extra >= sizeof(u32)) {
655 data |= set_upper_bits(v, extra *
657 len = sizeof(u32) - extra;
662 __raw_writel(data, piobuf);
667 /* Clear unused upper bytes */
668 data |= clear_upper_bytes(v, len, extra);
676 /* Source address is aligned. */
677 u32 *addr = (u32 *) ss->sge.vaddr;
678 int shift = extra * BITS_PER_BYTE;
679 int ushift = 32 - shift;
682 while (l >= sizeof(u32)) {
685 data |= set_upper_bits(v, shift);
686 __raw_writel(data, piobuf);
687 data = get_upper_bits(v, ushift);
693 * We still have 'extra' number of bytes leftover.
698 if (l + extra >= sizeof(u32)) {
699 data |= set_upper_bits(v, shift);
700 len -= l + extra - sizeof(u32);
705 __raw_writel(data, piobuf);
710 /* Clear unused upper bytes */
711 data |= clear_upper_bytes(v, l,
719 } else if (len == length) {
723 } else if (len == length) {
727 * Need to round up for the last dword in the
731 __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
733 last = ((u32 *) ss->sge.vaddr)[w - 1];
738 __iowrite32_copy(piobuf, ss->sge.vaddr, w);
741 extra = len & (sizeof(u32) - 1);
743 u32 v = ((u32 *) ss->sge.vaddr)[w];
745 /* Clear unused upper bytes */
746 data = clear_upper_bytes(v, extra, 0);
752 /* Update address before sending packet. */
753 update_sge(ss, length);
754 /* must flush early everything before trigger word */
756 __raw_writel(last, piobuf);
757 /* be sure trigger word is written */
762 * ipath_verbs_send - send a packet
763 * @dd: the infinipath device
764 * @hdrwords: the number of words in the header
765 * @hdr: the packet header
766 * @len: the length of the packet in bytes
767 * @ss: the SGE to send
769 int ipath_verbs_send(struct ipath_devdata *dd, u32 hdrwords,
770 u32 *hdr, u32 len, struct ipath_sge_state *ss)
776 /* +1 is for the qword padding of pbc */
777 plen = hdrwords + ((len + 3) >> 2) + 1;
778 if (unlikely((plen << 2) > dd->ipath_ibmaxlen)) {
783 /* Get a PIO buffer to use. */
784 piobuf = ipath_getpiobuf(dd, NULL);
785 if (unlikely(piobuf == NULL)) {
791 * Write len to control qword, no flags.
792 * We have to flush after the PBC for correctness on some cpus
793 * or WC buffer can be written out of order.
795 writeq(plen, piobuf);
800 * If there is just the header portion, must flush before
801 * writing last word of header for correctness, and after
802 * the last header word (trigger word).
804 __iowrite32_copy(piobuf, hdr, hdrwords - 1);
806 __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
812 __iowrite32_copy(piobuf, hdr, hdrwords);
815 /* The common case is aligned and contained in one segment. */
816 if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
817 !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
819 u32 *addr = (u32 *) ss->sge.vaddr;
821 /* Update address before sending packet. */
823 /* Need to round up for the last dword in the packet. */
825 __iowrite32_copy(piobuf, addr, w - 1);
826 /* must flush early everything before trigger word */
828 __raw_writel(addr[w - 1], piobuf + w - 1);
829 /* be sure trigger word is written */
834 copy_io(piobuf, ss, len);
841 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
842 u64 *rwords, u64 *spkts, u64 *rpkts,
847 if (!(dd->ipath_flags & IPATH_INITTED)) {
848 /* no hardware, freeze, etc. */
849 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
853 *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
854 *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
855 *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
856 *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
857 *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
866 * ipath_get_counters - get various chip counters
867 * @dd: the infinipath device
868 * @cntrs: counters are placed here
870 * Return the counters needed by recv_pma_get_portcounters().
872 int ipath_get_counters(struct ipath_devdata *dd,
873 struct ipath_verbs_counters *cntrs)
877 if (!(dd->ipath_flags & IPATH_INITTED)) {
878 /* no hardware, freeze, etc. */
879 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
883 cntrs->symbol_error_counter =
884 ipath_snap_cntr(dd, dd->ipath_cregs->cr_ibsymbolerrcnt);
885 cntrs->link_error_recovery_counter =
886 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkerrrecovcnt);
888 * The link downed counter counts when the other side downs the
889 * connection. We add in the number of times we downed the link
890 * due to local link integrity errors to compensate.
892 cntrs->link_downed_counter =
893 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkdowncnt);
894 cntrs->port_rcv_errors =
895 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rxdroppktcnt) +
896 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvovflcnt) +
897 ipath_snap_cntr(dd, dd->ipath_cregs->cr_portovflcnt) +
898 ipath_snap_cntr(dd, dd->ipath_cregs->cr_err_rlencnt) +
899 ipath_snap_cntr(dd, dd->ipath_cregs->cr_invalidrlencnt) +
900 ipath_snap_cntr(dd, dd->ipath_cregs->cr_erricrccnt) +
901 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errvcrccnt) +
902 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errlpcrccnt) +
903 ipath_snap_cntr(dd, dd->ipath_cregs->cr_badformatcnt) +
904 dd->ipath_rxfc_unsupvl_errs;
905 cntrs->port_rcv_remphys_errors =
906 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvebpcnt);
907 cntrs->port_xmit_discards =
908 ipath_snap_cntr(dd, dd->ipath_cregs->cr_unsupvlcnt);
909 cntrs->port_xmit_data =
910 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
911 cntrs->port_rcv_data =
912 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
913 cntrs->port_xmit_packets =
914 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
915 cntrs->port_rcv_packets =
916 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
917 cntrs->local_link_integrity_errors =
918 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
919 dd->ipath_lli_errs : dd->ipath_lli_errors;
920 cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
929 * ipath_ib_piobufavail - callback when a PIO buffer is available
930 * @arg: the device pointer
932 * This is called from ipath_intr() at interrupt level when a PIO buffer is
933 * available after ipath_verbs_send() returned an error that no buffers were
934 * available. Return 1 if we consumed all the PIO buffers and we still have
935 * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
938 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
946 spin_lock_irqsave(&dev->pending_lock, flags);
947 while (!list_empty(&dev->piowait)) {
948 qp = list_entry(dev->piowait.next, struct ipath_qp,
950 list_del_init(&qp->piowait);
951 tasklet_hi_schedule(&qp->s_task);
953 spin_unlock_irqrestore(&dev->pending_lock, flags);
959 static int ipath_query_device(struct ib_device *ibdev,
960 struct ib_device_attr *props)
962 struct ipath_ibdev *dev = to_idev(ibdev);
964 memset(props, 0, sizeof(*props));
966 props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
967 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
968 IB_DEVICE_SYS_IMAGE_GUID;
969 props->page_size_cap = PAGE_SIZE;
970 props->vendor_id = dev->dd->ipath_vendorid;
971 props->vendor_part_id = dev->dd->ipath_deviceid;
972 props->hw_ver = dev->dd->ipath_pcirev;
974 props->sys_image_guid = dev->sys_image_guid;
976 props->max_mr_size = ~0ull;
977 props->max_qp = ib_ipath_max_qps;
978 props->max_qp_wr = ib_ipath_max_qp_wrs;
979 props->max_sge = ib_ipath_max_sges;
980 props->max_cq = ib_ipath_max_cqs;
981 props->max_ah = ib_ipath_max_ahs;
982 props->max_cqe = ib_ipath_max_cqes;
983 props->max_mr = dev->lk_table.max;
984 props->max_pd = ib_ipath_max_pds;
985 props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
986 props->max_qp_init_rd_atom = 255;
987 /* props->max_res_rd_atom */
988 props->max_srq = ib_ipath_max_srqs;
989 props->max_srq_wr = ib_ipath_max_srq_wrs;
990 props->max_srq_sge = ib_ipath_max_srq_sges;
991 /* props->local_ca_ack_delay */
992 props->atomic_cap = IB_ATOMIC_GLOB;
993 props->max_pkeys = ipath_get_npkeys(dev->dd);
994 props->max_mcast_grp = ib_ipath_max_mcast_grps;
995 props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
996 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
997 props->max_mcast_grp;
1002 const u8 ipath_cvt_physportstate[16] = {
1003 [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1004 [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1005 [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1006 [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1007 [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1008 [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1009 [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1010 [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1011 [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1012 [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1013 [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1014 [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1015 [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1018 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1020 return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1023 static int ipath_query_port(struct ib_device *ibdev,
1024 u8 port, struct ib_port_attr *props)
1026 struct ipath_ibdev *dev = to_idev(ibdev);
1028 u16 lid = dev->dd->ipath_lid;
1031 memset(props, 0, sizeof(*props));
1032 props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1033 props->lmc = dev->mkeyprot_resv_lmc & 7;
1034 props->sm_lid = dev->sm_lid;
1035 props->sm_sl = dev->sm_sl;
1036 ibcstat = dev->dd->ipath_lastibcstat;
1037 props->state = ((ibcstat >> 4) & 0x3) + 1;
1038 /* See phys_state_show() */
1039 props->phys_state = ipath_cvt_physportstate[
1040 dev->dd->ipath_lastibcstat & 0xf];
1041 props->port_cap_flags = dev->port_cap_flags;
1042 props->gid_tbl_len = 1;
1043 props->max_msg_sz = 0x80000000;
1044 props->pkey_tbl_len = ipath_get_npkeys(dev->dd);
1045 props->bad_pkey_cntr = ipath_get_cr_errpkey(dev->dd) -
1046 dev->z_pkey_violations;
1047 props->qkey_viol_cntr = dev->qkey_violations;
1048 props->active_width = IB_WIDTH_4X;
1049 /* See rate_show() */
1050 props->active_speed = 1; /* Regular 10Mbs speed. */
1051 props->max_vl_num = 1; /* VLCap = VL0 */
1052 props->init_type_reply = 0;
1054 props->max_mtu = IB_MTU_4096;
1055 switch (dev->dd->ipath_ibmtu) {
1074 props->active_mtu = mtu;
1075 props->subnet_timeout = dev->subnet_timeout;
1080 static int ipath_modify_device(struct ib_device *device,
1081 int device_modify_mask,
1082 struct ib_device_modify *device_modify)
1086 if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1087 IB_DEVICE_MODIFY_NODE_DESC)) {
1092 if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1093 memcpy(device->node_desc, device_modify->node_desc, 64);
1095 if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1096 to_idev(device)->sys_image_guid =
1097 cpu_to_be64(device_modify->sys_image_guid);
1105 static int ipath_modify_port(struct ib_device *ibdev,
1106 u8 port, int port_modify_mask,
1107 struct ib_port_modify *props)
1109 struct ipath_ibdev *dev = to_idev(ibdev);
1111 dev->port_cap_flags |= props->set_port_cap_mask;
1112 dev->port_cap_flags &= ~props->clr_port_cap_mask;
1113 if (port_modify_mask & IB_PORT_SHUTDOWN)
1114 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1115 if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1116 dev->qkey_violations = 0;
1120 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1121 int index, union ib_gid *gid)
1123 struct ipath_ibdev *dev = to_idev(ibdev);
1130 gid->global.subnet_prefix = dev->gid_prefix;
1131 gid->global.interface_id = dev->dd->ipath_guid;
1139 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1140 struct ib_ucontext *context,
1141 struct ib_udata *udata)
1143 struct ipath_ibdev *dev = to_idev(ibdev);
1144 struct ipath_pd *pd;
1148 * This is actually totally arbitrary. Some correctness tests
1149 * assume there's a maximum number of PDs that can be allocated.
1150 * We don't actually have this limit, but we fail the test if
1151 * we allow allocations of more than we report for this value.
1154 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1156 ret = ERR_PTR(-ENOMEM);
1160 spin_lock(&dev->n_pds_lock);
1161 if (dev->n_pds_allocated == ib_ipath_max_pds) {
1162 spin_unlock(&dev->n_pds_lock);
1164 ret = ERR_PTR(-ENOMEM);
1168 dev->n_pds_allocated++;
1169 spin_unlock(&dev->n_pds_lock);
1171 /* ib_alloc_pd() will initialize pd->ibpd. */
1172 pd->user = udata != NULL;
1180 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1182 struct ipath_pd *pd = to_ipd(ibpd);
1183 struct ipath_ibdev *dev = to_idev(ibpd->device);
1185 spin_lock(&dev->n_pds_lock);
1186 dev->n_pds_allocated--;
1187 spin_unlock(&dev->n_pds_lock);
1195 * ipath_create_ah - create an address handle
1196 * @pd: the protection domain
1197 * @ah_attr: the attributes of the AH
1199 * This may be called from interrupt context.
1201 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1202 struct ib_ah_attr *ah_attr)
1204 struct ipath_ah *ah;
1206 struct ipath_ibdev *dev = to_idev(pd->device);
1207 unsigned long flags;
1209 /* A multicast address requires a GRH (see ch. 8.4.1). */
1210 if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1211 ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1212 !(ah_attr->ah_flags & IB_AH_GRH)) {
1213 ret = ERR_PTR(-EINVAL);
1217 if (ah_attr->dlid == 0) {
1218 ret = ERR_PTR(-EINVAL);
1222 if (ah_attr->port_num < 1 ||
1223 ah_attr->port_num > pd->device->phys_port_cnt) {
1224 ret = ERR_PTR(-EINVAL);
1228 ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1230 ret = ERR_PTR(-ENOMEM);
1234 spin_lock_irqsave(&dev->n_ahs_lock, flags);
1235 if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1236 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1238 ret = ERR_PTR(-ENOMEM);
1242 dev->n_ahs_allocated++;
1243 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1245 /* ib_create_ah() will initialize ah->ibah. */
1246 ah->attr = *ah_attr;
1255 * ipath_destroy_ah - destroy an address handle
1256 * @ibah: the AH to destroy
1258 * This may be called from interrupt context.
1260 static int ipath_destroy_ah(struct ib_ah *ibah)
1262 struct ipath_ibdev *dev = to_idev(ibah->device);
1263 struct ipath_ah *ah = to_iah(ibah);
1264 unsigned long flags;
1266 spin_lock_irqsave(&dev->n_ahs_lock, flags);
1267 dev->n_ahs_allocated--;
1268 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1275 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1277 struct ipath_ah *ah = to_iah(ibah);
1279 *ah_attr = ah->attr;
1285 * ipath_get_npkeys - return the size of the PKEY table for port 0
1286 * @dd: the infinipath device
1288 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1290 return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1294 * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1295 * @dd: the infinipath device
1296 * @index: the PKEY index
1298 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1302 if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1305 ret = dd->ipath_pd[0]->port_pkeys[index];
1310 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1313 struct ipath_ibdev *dev = to_idev(ibdev);
1316 if (index >= ipath_get_npkeys(dev->dd)) {
1321 *pkey = ipath_get_pkey(dev->dd, index);
1329 * ipath_alloc_ucontext - allocate a ucontest
1330 * @ibdev: the infiniband device
1331 * @udata: not used by the InfiniPath driver
1334 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1335 struct ib_udata *udata)
1337 struct ipath_ucontext *context;
1338 struct ib_ucontext *ret;
1340 context = kmalloc(sizeof *context, GFP_KERNEL);
1342 ret = ERR_PTR(-ENOMEM);
1346 ret = &context->ibucontext;
1352 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1354 kfree(to_iucontext(context));
1358 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1360 static void __verbs_timer(unsigned long arg)
1362 struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1365 * If port 0 receive packet interrupts are not available, or
1366 * can be missed, poll the receive queue
1368 if (dd->ipath_flags & IPATH_POLL_RX_INTR)
1371 /* Handle verbs layer timeouts. */
1372 ipath_ib_timer(dd->verbs_dev);
1374 mod_timer(&dd->verbs_timer, jiffies + 1);
1377 static int enable_timer(struct ipath_devdata *dd)
1380 * Early chips had a design flaw where the chip and kernel idea
1381 * of the tail register don't always agree, and therefore we won't
1382 * get an interrupt on the next packet received.
1383 * If the board supports per packet receive interrupts, use it.
1384 * Otherwise, the timer function periodically checks for packets
1385 * to cover this case.
1386 * Either way, the timer is needed for verbs layer related
1389 if (dd->ipath_flags & IPATH_GPIO_INTR) {
1390 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1391 0x2074076542310ULL);
1392 /* Enable GPIO bit 2 interrupt */
1393 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1394 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1395 dd->ipath_gpio_mask);
1398 init_timer(&dd->verbs_timer);
1399 dd->verbs_timer.function = __verbs_timer;
1400 dd->verbs_timer.data = (unsigned long)dd;
1401 dd->verbs_timer.expires = jiffies + 1;
1402 add_timer(&dd->verbs_timer);
1407 static int disable_timer(struct ipath_devdata *dd)
1409 /* Disable GPIO bit 2 interrupt */
1410 if (dd->ipath_flags & IPATH_GPIO_INTR) {
1412 /* Disable GPIO bit 2 interrupt */
1413 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
1414 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1415 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1416 dd->ipath_gpio_mask);
1418 * We might want to undo changes to debugportselect,
1423 del_timer_sync(&dd->verbs_timer);
1429 * ipath_register_ib_device - register our device with the infiniband core
1430 * @dd: the device data structure
1431 * Return the allocated ipath_ibdev pointer or NULL on error.
1433 int ipath_register_ib_device(struct ipath_devdata *dd)
1435 struct ipath_verbs_counters cntrs;
1436 struct ipath_ibdev *idev;
1437 struct ib_device *dev;
1440 idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1448 /* Only need to initialize non-zero fields. */
1449 spin_lock_init(&idev->n_pds_lock);
1450 spin_lock_init(&idev->n_ahs_lock);
1451 spin_lock_init(&idev->n_cqs_lock);
1452 spin_lock_init(&idev->n_qps_lock);
1453 spin_lock_init(&idev->n_srqs_lock);
1454 spin_lock_init(&idev->n_mcast_grps_lock);
1456 spin_lock_init(&idev->qp_table.lock);
1457 spin_lock_init(&idev->lk_table.lock);
1458 idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1459 /* Set the prefix to the default value (see ch. 4.1.1) */
1460 idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1462 ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1467 * The top ib_ipath_lkey_table_size bits are used to index the
1468 * table. The lower 8 bits can be owned by the user (copied from
1469 * the LKEY). The remaining bits act as a generation number or tag.
1471 idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1472 idev->lk_table.table = kzalloc(idev->lk_table.max *
1473 sizeof(*idev->lk_table.table),
1475 if (idev->lk_table.table == NULL) {
1479 INIT_LIST_HEAD(&idev->pending_mmaps);
1480 spin_lock_init(&idev->pending_lock);
1481 idev->mmap_offset = PAGE_SIZE;
1482 spin_lock_init(&idev->mmap_offset_lock);
1483 INIT_LIST_HEAD(&idev->pending[0]);
1484 INIT_LIST_HEAD(&idev->pending[1]);
1485 INIT_LIST_HEAD(&idev->pending[2]);
1486 INIT_LIST_HEAD(&idev->piowait);
1487 INIT_LIST_HEAD(&idev->rnrwait);
1488 idev->pending_index = 0;
1489 idev->port_cap_flags =
1490 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1491 idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1492 idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1493 idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1494 idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1495 idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1496 idev->link_width_enabled = 3; /* 1x or 4x */
1498 /* Snapshot current HW counters to "clear" them. */
1499 ipath_get_counters(dd, &cntrs);
1500 idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1501 idev->z_link_error_recovery_counter =
1502 cntrs.link_error_recovery_counter;
1503 idev->z_link_downed_counter = cntrs.link_downed_counter;
1504 idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1505 idev->z_port_rcv_remphys_errors =
1506 cntrs.port_rcv_remphys_errors;
1507 idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1508 idev->z_port_xmit_data = cntrs.port_xmit_data;
1509 idev->z_port_rcv_data = cntrs.port_rcv_data;
1510 idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1511 idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1512 idev->z_local_link_integrity_errors =
1513 cntrs.local_link_integrity_errors;
1514 idev->z_excessive_buffer_overrun_errors =
1515 cntrs.excessive_buffer_overrun_errors;
1518 * The system image GUID is supposed to be the same for all
1519 * IB HCAs in a single system but since there can be other
1520 * device types in the system, we can't be sure this is unique.
1522 if (!sys_image_guid)
1523 sys_image_guid = dd->ipath_guid;
1524 idev->sys_image_guid = sys_image_guid;
1525 idev->ib_unit = dd->ipath_unit;
1528 strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1529 dev->owner = THIS_MODULE;
1530 dev->node_guid = dd->ipath_guid;
1531 dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1532 dev->uverbs_cmd_mask =
1533 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1534 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1535 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1536 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1537 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1538 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
1539 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
1540 (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
1541 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1542 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1543 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1544 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1545 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1546 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1547 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
1548 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
1549 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1550 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1551 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1552 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1553 (1ull << IB_USER_VERBS_CMD_POST_SEND) |
1554 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
1555 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1556 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1557 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1558 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1559 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1560 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1561 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1562 dev->node_type = RDMA_NODE_IB_CA;
1563 dev->phys_port_cnt = 1;
1564 dev->num_comp_vectors = 1;
1565 dev->dma_device = &dd->pcidev->dev;
1566 dev->query_device = ipath_query_device;
1567 dev->modify_device = ipath_modify_device;
1568 dev->query_port = ipath_query_port;
1569 dev->modify_port = ipath_modify_port;
1570 dev->query_pkey = ipath_query_pkey;
1571 dev->query_gid = ipath_query_gid;
1572 dev->alloc_ucontext = ipath_alloc_ucontext;
1573 dev->dealloc_ucontext = ipath_dealloc_ucontext;
1574 dev->alloc_pd = ipath_alloc_pd;
1575 dev->dealloc_pd = ipath_dealloc_pd;
1576 dev->create_ah = ipath_create_ah;
1577 dev->destroy_ah = ipath_destroy_ah;
1578 dev->query_ah = ipath_query_ah;
1579 dev->create_srq = ipath_create_srq;
1580 dev->modify_srq = ipath_modify_srq;
1581 dev->query_srq = ipath_query_srq;
1582 dev->destroy_srq = ipath_destroy_srq;
1583 dev->create_qp = ipath_create_qp;
1584 dev->modify_qp = ipath_modify_qp;
1585 dev->query_qp = ipath_query_qp;
1586 dev->destroy_qp = ipath_destroy_qp;
1587 dev->post_send = ipath_post_send;
1588 dev->post_recv = ipath_post_receive;
1589 dev->post_srq_recv = ipath_post_srq_receive;
1590 dev->create_cq = ipath_create_cq;
1591 dev->destroy_cq = ipath_destroy_cq;
1592 dev->resize_cq = ipath_resize_cq;
1593 dev->poll_cq = ipath_poll_cq;
1594 dev->req_notify_cq = ipath_req_notify_cq;
1595 dev->get_dma_mr = ipath_get_dma_mr;
1596 dev->reg_phys_mr = ipath_reg_phys_mr;
1597 dev->reg_user_mr = ipath_reg_user_mr;
1598 dev->dereg_mr = ipath_dereg_mr;
1599 dev->alloc_fmr = ipath_alloc_fmr;
1600 dev->map_phys_fmr = ipath_map_phys_fmr;
1601 dev->unmap_fmr = ipath_unmap_fmr;
1602 dev->dealloc_fmr = ipath_dealloc_fmr;
1603 dev->attach_mcast = ipath_multicast_attach;
1604 dev->detach_mcast = ipath_multicast_detach;
1605 dev->process_mad = ipath_process_mad;
1606 dev->mmap = ipath_mmap;
1607 dev->dma_ops = &ipath_dma_mapping_ops;
1609 snprintf(dev->node_desc, sizeof(dev->node_desc),
1610 IPATH_IDSTR " %s", init_utsname()->nodename);
1612 ret = ib_register_device(dev);
1616 if (ipath_verbs_register_sysfs(dev))
1624 ib_unregister_device(dev);
1626 kfree(idev->lk_table.table);
1628 kfree(idev->qp_table.table);
1630 ib_dealloc_device(dev);
1631 ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1635 dd->verbs_dev = idev;
1639 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1641 struct ib_device *ibdev = &dev->ibdev;
1643 disable_timer(dev->dd);
1645 ib_unregister_device(ibdev);
1647 if (!list_empty(&dev->pending[0]) ||
1648 !list_empty(&dev->pending[1]) ||
1649 !list_empty(&dev->pending[2]))
1650 ipath_dev_err(dev->dd, "pending list not empty!\n");
1651 if (!list_empty(&dev->piowait))
1652 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1653 if (!list_empty(&dev->rnrwait))
1654 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1655 if (!ipath_mcast_tree_empty())
1656 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1658 * Note that ipath_unregister_ib_device() can be called before all
1659 * the QPs are destroyed!
1661 ipath_free_all_qps(&dev->qp_table);
1662 kfree(dev->qp_table.table);
1663 kfree(dev->lk_table.table);
1664 ib_dealloc_device(ibdev);
1667 static ssize_t show_rev(struct class_device *cdev, char *buf)
1669 struct ipath_ibdev *dev =
1670 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1672 return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1675 static ssize_t show_hca(struct class_device *cdev, char *buf)
1677 struct ipath_ibdev *dev =
1678 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1681 ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1691 static ssize_t show_stats(struct class_device *cdev, char *buf)
1693 struct ipath_ibdev *dev =
1694 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1713 dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1714 dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1715 dev->n_other_naks, dev->n_timeouts,
1716 dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1717 dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1718 for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1719 const struct ipath_opcode_stats *si = &dev->opstats[i];
1721 if (!si->n_packets && !si->n_bytes)
1723 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1724 (unsigned long long) si->n_packets,
1725 (unsigned long long) si->n_bytes);
1730 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1731 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1732 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1733 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1735 static struct class_device_attribute *ipath_class_attributes[] = {
1736 &class_device_attr_hw_rev,
1737 &class_device_attr_hca_type,
1738 &class_device_attr_board_id,
1739 &class_device_attr_stats
1742 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1747 for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1748 if (class_device_create_file(&dev->class_dev,
1749 ipath_class_attributes[i])) {