2 * linux/arch/m68knommu/platform/68360/config.c
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 * Copyright (C) 1993 Hamish Macdonald
6 * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
14 #include <linux/types.h>
15 #include <linux/kernel.h>
17 #include <linux/tty.h>
18 #include <linux/console.h>
19 #include <linux/interrupt.h>
21 #include <asm/setup.h>
22 #include <asm/system.h>
23 #include <asm/pgtable.h>
25 #include <asm/machdep.h>
26 #include <asm/m68360.h>
29 #include <asm/bootstd.h>
32 extern void m360_cpm_reset(void);
34 // Mask to select if the PLL prescaler is enabled.
35 #define MCU_PREEN ((unsigned short)(0x0001 << 13))
37 #if defined(CONFIG_UCQUICC)
38 #define OSCILLATOR (unsigned long int)33000000
41 unsigned long int system_clock;
43 void M68360_init_IRQ(void);
47 /* TODO DON"T Hard Code this */
48 /* calculate properly using the right PLL and prescaller */
49 // unsigned int system_clock = 33000000l;
50 extern unsigned long int system_clock; //In kernel setup.c
52 extern void config_M68360_irq(void);
54 void BSP_sched_init(irq_handler_t timer_routine)
56 unsigned char prescaler;
57 unsigned short tgcr_save;
61 /* Restart mode, Enable int, 32KHz, Enable timer */
62 TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
63 /* Set prescaler (Divide 32KHz by 32)*/
65 /* Set compare register 32Khz / 32 / 10 = 100 */
68 request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
71 /* General purpose quicc timers: MC68360UM p7-20 */
73 /* Set up timer 1 (in [1..4]) to do 100Hz */
74 tgcr_save = pquicc->timer_tgcr & 0xfff0;
75 pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
76 /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
79 pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
80 (unsigned short)((prescaler - 1) << 8);
82 pquicc->timer_tcn1 = 0x0000; /* initial count */
83 /* calculate interval for 100Hz based on the _system_clock: */
84 pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
86 pquicc->timer_ter1 = 0x0003; /* clear timer events */
88 /* enable timer 1 interrupt in CIMR */
89 // request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
90 //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
91 return_value = request_irq(CPMVEC_TIMER1 , timer_routine, IRQ_FLG_LOCK,
95 tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
96 pquicc->timer_tgcr = tgcr_save;
105 pquicc->timer_ter1 = 0x0002; /* clear timer event */
108 unsigned long BSP_gettimeoffset (void)
113 void BSP_gettod (int *yearp, int *monp, int *dayp,
114 int *hourp, int *minp, int *secp)
118 int BSP_hwclk(int op, struct rtc_time *t)
128 int BSP_set_clock_mmss (unsigned long nowtime)
131 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
133 tod->second1 = real_seconds / 10;
134 tod->second2 = real_seconds % 10;
135 tod->minute1 = real_minutes / 10;
136 tod->minute2 = real_minutes % 10;
141 void BSP_reset (void)
145 "moveal #_start, %a0;\n"
146 "moveb #0, 0xFFFFF300;\n"
147 "moveal 0(%a0), %sp;\n"
148 "moveal 4(%a0), %a0;\n"
153 unsigned char *scc1_hwaddr;
156 #if defined (CONFIG_UCQUICC)
157 _bsc0(char *, getserialnum)
158 _bsc1(unsigned char *, gethwaddr, int, a)
159 _bsc1(char *, getbenv, char *, a)
163 void config_BSP(char *command, int len)
169 /* Calculate the real system clock value. */
171 unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
172 if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
174 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
175 system_clock = (OSCILLATOR / 128) * (mf + 1);
179 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
180 system_clock = (OSCILLATOR) * (mf + 1);
184 printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
186 #if defined(CONFIG_UCQUICC) && 0
187 printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
188 p = scc1_hwaddr = gethwaddr(0);
189 printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
190 p[0], p[1], p[2], p[3], p[4], p[5]);
192 p = getbenv("APPEND");
198 scc1_hwaddr = "\00\01\02\03\04\05";
201 mach_sched_init = BSP_sched_init;
202 mach_tick = BSP_tick;
203 mach_gettimeoffset = BSP_gettimeoffset;
204 mach_gettod = BSP_gettod;
206 mach_set_clock_mmss = NULL;
207 mach_reset = BSP_reset;