1 #ifndef _M68KNOMMU_BITOPS_H
2 #define _M68KNOMMU_BITOPS_H
5 * Copyright 1992, Linus Torvalds.
8 #include <linux/compiler.h>
9 #include <asm/byteorder.h> /* swab32 */
10 #include <asm/system.h> /* save_flags */
14 #include <asm-generic/bitops/ffs.h>
15 #include <asm-generic/bitops/__ffs.h>
16 #include <asm-generic/bitops/sched.h>
17 #include <asm-generic/bitops/ffz.h>
19 static __inline__ void set_bit(int nr, volatile unsigned long * addr)
21 #ifdef CONFIG_COLDFIRE
22 __asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
23 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
27 __asm__ __volatile__ ("bset %1,%0"
28 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
34 #define __set_bit(nr, addr) set_bit(nr, addr)
37 * clear_bit() doesn't provide any barrier for the compiler.
39 #define smp_mb__before_clear_bit() barrier()
40 #define smp_mb__after_clear_bit() barrier()
42 static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
44 #ifdef CONFIG_COLDFIRE
45 __asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
46 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
50 __asm__ __volatile__ ("bclr %1,%0"
51 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
57 #define __clear_bit(nr, addr) clear_bit(nr, addr)
59 static __inline__ void change_bit(int nr, volatile unsigned long * addr)
61 #ifdef CONFIG_COLDFIRE
62 __asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
63 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
67 __asm__ __volatile__ ("bchg %1,%0"
68 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
74 #define __change_bit(nr, addr) change_bit(nr, addr)
76 static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
80 #ifdef CONFIG_COLDFIRE
81 __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
82 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
86 __asm__ __volatile__ ("bset %2,%1; sne %0"
87 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
95 #define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
97 static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
101 #ifdef CONFIG_COLDFIRE
102 __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
103 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
107 __asm__ __volatile__ ("bclr %2,%1; sne %0"
108 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
116 #define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
118 static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
122 #ifdef CONFIG_COLDFIRE
123 __asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
124 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
128 __asm__ __volatile__ ("bchg %2,%1; sne %0"
129 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
137 #define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
140 * This routine doesn't need to be atomic.
142 static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
144 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
147 static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
149 int * a = (int *) addr;
153 mask = 1 << (nr & 0x1f);
154 return ((mask & *a) != 0);
157 #define test_bit(nr,addr) \
158 (__builtin_constant_p(nr) ? \
159 __constant_test_bit((nr),(addr)) : \
160 __test_bit((nr),(addr)))
162 #include <asm-generic/bitops/find.h>
163 #include <asm-generic/bitops/hweight.h>
165 static __inline__ int ext2_set_bit(int nr, volatile void * addr)
169 #ifdef CONFIG_COLDFIRE
170 __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
171 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
175 __asm__ __volatile__ ("bset %2,%1; sne %0"
176 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
184 static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
188 #ifdef CONFIG_COLDFIRE
189 __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
190 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
194 __asm__ __volatile__ ("bclr %2,%1; sne %0"
195 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
203 #define ext2_set_bit_atomic(lock, nr, addr) \
207 ret = ext2_set_bit((nr), (addr)); \
212 #define ext2_clear_bit_atomic(lock, nr, addr) \
216 ret = ext2_clear_bit((nr), (addr)); \
221 static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
225 #ifdef CONFIG_COLDFIRE
226 __asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
228 : "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
231 __asm__ __volatile__ ("btst %2,%1; sne %0"
233 : "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
240 #define ext2_find_first_zero_bit(addr, size) \
241 ext2_find_next_zero_bit((addr), (size), 0)
243 static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
245 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
246 unsigned long result = offset & ~31UL;
254 /* We hold the little endian value in tmp, but then the
255 * shift is illegal. So we could keep a big endian value
258 * tmp = __swab32(*(p++));
259 * tmp |= ~0UL >> (32-offset);
261 * but this would decrease preformance, so we change the
265 tmp |= __swab32(~0UL >> (32-offset));
273 while(size & ~31UL) {
284 /* tmp is little endian, so we would have to swab the shift,
285 * see above. But then we have to swab tmp below for ffz, so
286 * we might as well do this here.
288 return result + ffz(__swab32(tmp) | (~0UL << size));
290 return result + ffz(__swab32(tmp));
293 #include <asm-generic/bitops/minix.h>
295 #endif /* __KERNEL__ */
297 #include <asm-generic/bitops/fls.h>
298 #include <asm-generic/bitops/fls64.h>
300 #endif /* _M68KNOMMU_BITOPS_H */