Merge branch 'master' into 83xx
[linux-2.6] / drivers / char / watchdog / omap_wdt.c
1 /*
2  * linux/drivers/char/watchdog/omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *       <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
23  *      2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *      Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/smp_lock.h>
38 #include <linux/init.h>
39 #include <linux/err.h>
40 #include <linux/platform_device.h>
41 #include <linux/moduleparam.h>
42 #include <linux/clk.h>
43
44 #include <asm/io.h>
45 #include <asm/uaccess.h>
46 #include <asm/hardware.h>
47 #include <asm/bitops.h>
48
49 #include <asm/arch/prcm.h>
50
51 #include "omap_wdt.h"
52
53 static unsigned timer_margin;
54 module_param(timer_margin, uint, 0);
55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
56
57 static int omap_wdt_users;
58 static struct clk *armwdt_ck = NULL;
59 static struct clk *mpu_wdt_ick = NULL;
60 static struct clk *mpu_wdt_fck = NULL;
61
62 static unsigned int wdt_trgr_pattern = 0x1234;
63
64 static void omap_wdt_ping(void)
65 {
66         /* wait for posted write to complete */
67         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
68                 cpu_relax();
69         wdt_trgr_pattern = ~wdt_trgr_pattern;
70         omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
71         /* wait for posted write to complete */
72         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
73                 cpu_relax();
74         /* reloaded WCRR from WLDR */
75 }
76
77 static void omap_wdt_enable(void)
78 {
79         /* Sequence to enable the watchdog */
80         omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
81         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
82                 cpu_relax();
83         omap_writel(0x4444, OMAP_WATCHDOG_SPR);
84         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
85                 cpu_relax();
86 }
87
88 static void omap_wdt_disable(void)
89 {
90         /* sequence required to disable watchdog */
91         omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
92         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
93                 cpu_relax();
94         omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
95         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
96                 cpu_relax();
97 }
98
99 static void omap_wdt_adjust_timeout(unsigned new_timeout)
100 {
101         if (new_timeout < TIMER_MARGIN_MIN)
102                 new_timeout = TIMER_MARGIN_DEFAULT;
103         if (new_timeout > TIMER_MARGIN_MAX)
104                 new_timeout = TIMER_MARGIN_MAX;
105         timer_margin = new_timeout;
106 }
107
108 static void omap_wdt_set_timeout(void)
109 {
110         u32 pre_margin = GET_WLDR_VAL(timer_margin);
111
112         /* just count up at 32 KHz */
113         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
114                 cpu_relax();
115         omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
116         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
117                 cpu_relax();
118 }
119
120 /*
121  *      Allow only one task to hold it open
122  */
123
124 static int omap_wdt_open(struct inode *inode, struct file *file)
125 {
126         if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
127                 return -EBUSY;
128
129         if (cpu_is_omap16xx())
130                 clk_enable(armwdt_ck);  /* Enable the clock */
131
132         if (cpu_is_omap24xx()) {
133                 clk_enable(mpu_wdt_ick);    /* Enable the interface clock */
134                 clk_enable(mpu_wdt_fck);    /* Enable the functional clock */
135         }
136
137         /* initialize prescaler */
138         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
139                 cpu_relax();
140         omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
141         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
142                 cpu_relax();
143
144         omap_wdt_set_timeout();
145         omap_wdt_enable();
146         return 0;
147 }
148
149 static int omap_wdt_release(struct inode *inode, struct file *file)
150 {
151         /*
152          *      Shut off the timer unless NOWAYOUT is defined.
153          */
154 #ifndef CONFIG_WATCHDOG_NOWAYOUT
155         omap_wdt_disable();
156
157         if (cpu_is_omap16xx()) {
158                 clk_disable(armwdt_ck); /* Disable the clock */
159                 clk_put(armwdt_ck);
160                 armwdt_ck = NULL;
161         }
162
163         if (cpu_is_omap24xx()) {
164                 clk_disable(mpu_wdt_ick);       /* Disable the clock */
165                 clk_disable(mpu_wdt_fck);       /* Disable the clock */
166                 clk_put(mpu_wdt_ick);
167                 clk_put(mpu_wdt_fck);
168                 mpu_wdt_ick = NULL;
169                 mpu_wdt_fck = NULL;
170         }
171 #else
172         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
173 #endif
174         omap_wdt_users = 0;
175         return 0;
176 }
177
178 static ssize_t
179 omap_wdt_write(struct file *file, const char __user *data,
180                 size_t len, loff_t *ppos)
181 {
182         /* Refresh LOAD_TIME. */
183         if (len)
184                 omap_wdt_ping();
185         return len;
186 }
187
188 static int
189 omap_wdt_ioctl(struct inode *inode, struct file *file,
190         unsigned int cmd, unsigned long arg)
191 {
192         int new_margin;
193         static struct watchdog_info ident = {
194                 .identity = "OMAP Watchdog",
195                 .options = WDIOF_SETTIMEOUT,
196                 .firmware_version = 0,
197         };
198
199         switch (cmd) {
200         default:
201                 return -ENOIOCTLCMD;
202         case WDIOC_GETSUPPORT:
203                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
204                                 sizeof(ident));
205         case WDIOC_GETSTATUS:
206                 return put_user(0, (int __user *)arg);
207         case WDIOC_GETBOOTSTATUS:
208                 if (cpu_is_omap16xx())
209                         return put_user(omap_readw(ARM_SYSST),
210                                         (int __user *)arg);
211                 if (cpu_is_omap24xx())
212                         return put_user(omap_prcm_get_reset_sources(),
213                                         (int __user *)arg);
214         case WDIOC_KEEPALIVE:
215                 omap_wdt_ping();
216                 return 0;
217         case WDIOC_SETTIMEOUT:
218                 if (get_user(new_margin, (int __user *)arg))
219                         return -EFAULT;
220                 omap_wdt_adjust_timeout(new_margin);
221
222                 omap_wdt_disable();
223                 omap_wdt_set_timeout();
224                 omap_wdt_enable();
225
226                 omap_wdt_ping();
227                 /* Fall */
228         case WDIOC_GETTIMEOUT:
229                 return put_user(timer_margin, (int __user *)arg);
230         }
231 }
232
233 static const struct file_operations omap_wdt_fops = {
234         .owner = THIS_MODULE,
235         .write = omap_wdt_write,
236         .ioctl = omap_wdt_ioctl,
237         .open = omap_wdt_open,
238         .release = omap_wdt_release,
239 };
240
241 static struct miscdevice omap_wdt_miscdev = {
242         .minor = WATCHDOG_MINOR,
243         .name = "watchdog",
244         .fops = &omap_wdt_fops
245 };
246
247 static int __init omap_wdt_probe(struct platform_device *pdev)
248 {
249         struct resource *res, *mem;
250         int ret;
251
252         /* reserve static register mappings */
253         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
254         if (!res)
255                 return -ENOENT;
256
257         mem = request_mem_region(res->start, res->end - res->start + 1,
258                                  pdev->name);
259         if (mem == NULL)
260                 return -EBUSY;
261
262         platform_set_drvdata(pdev, mem);
263
264         omap_wdt_users = 0;
265
266         if (cpu_is_omap16xx()) {
267                 armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
268                 if (IS_ERR(armwdt_ck)) {
269                         ret = PTR_ERR(armwdt_ck);
270                         armwdt_ck = NULL;
271                         goto fail;
272                 }
273         }
274
275         if (cpu_is_omap24xx()) {
276                 mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
277                 if (IS_ERR(mpu_wdt_ick)) {
278                         ret = PTR_ERR(mpu_wdt_ick);
279                         mpu_wdt_ick = NULL;
280                         goto fail;
281                 }
282                 mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
283                 if (IS_ERR(mpu_wdt_fck)) {
284                         ret = PTR_ERR(mpu_wdt_fck);
285                         mpu_wdt_fck = NULL;
286                         goto fail;
287                 }
288         }
289
290         omap_wdt_disable();
291         omap_wdt_adjust_timeout(timer_margin);
292
293         omap_wdt_miscdev.parent = &pdev->dev;
294         ret = misc_register(&omap_wdt_miscdev);
295         if (ret)
296                 goto fail;
297
298         pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
299
300         /* autogate OCP interface clock */
301         omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
302         return 0;
303
304 fail:
305         if (armwdt_ck)
306                 clk_put(armwdt_ck);
307         if (mpu_wdt_ick)
308                 clk_put(mpu_wdt_ick);
309         if (mpu_wdt_fck)
310                 clk_put(mpu_wdt_fck);
311         release_resource(mem);
312         return ret;
313 }
314
315 static void omap_wdt_shutdown(struct platform_device *pdev)
316 {
317         omap_wdt_disable();
318 }
319
320 static int omap_wdt_remove(struct platform_device *pdev)
321 {
322         struct resource *mem = platform_get_drvdata(pdev);
323         misc_deregister(&omap_wdt_miscdev);
324         release_resource(mem);
325         if (armwdt_ck)
326                 clk_put(armwdt_ck);
327         if (mpu_wdt_ick)
328                 clk_put(mpu_wdt_ick);
329         if (mpu_wdt_fck)
330                 clk_put(mpu_wdt_fck);
331         return 0;
332 }
333
334 #ifdef  CONFIG_PM
335
336 /* REVISIT ... not clear this is the best way to handle system suspend; and
337  * it's very inappropriate for selective device suspend (e.g. suspending this
338  * through sysfs rather than by stopping the watchdog daemon).  Also, this
339  * may not play well enough with NOWAYOUT...
340  */
341
342 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
343 {
344         if (omap_wdt_users)
345                 omap_wdt_disable();
346         return 0;
347 }
348
349 static int omap_wdt_resume(struct platform_device *pdev)
350 {
351         if (omap_wdt_users) {
352                 omap_wdt_enable();
353                 omap_wdt_ping();
354         }
355         return 0;
356 }
357
358 #else
359 #define omap_wdt_suspend        NULL
360 #define omap_wdt_resume         NULL
361 #endif
362
363 static struct platform_driver omap_wdt_driver = {
364         .probe          = omap_wdt_probe,
365         .remove         = omap_wdt_remove,
366         .shutdown       = omap_wdt_shutdown,
367         .suspend        = omap_wdt_suspend,
368         .resume         = omap_wdt_resume,
369         .driver         = {
370                 .owner  = THIS_MODULE,
371                 .name   = "omap_wdt",
372         },
373 };
374
375 static int __init omap_wdt_init(void)
376 {
377         return platform_driver_register(&omap_wdt_driver);
378 }
379
380 static void __exit omap_wdt_exit(void)
381 {
382         platform_driver_unregister(&omap_wdt_driver);
383 }
384
385 module_init(omap_wdt_init);
386 module_exit(omap_wdt_exit);
387
388 MODULE_AUTHOR("George G. Davis");
389 MODULE_LICENSE("GPL");
390 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);