git.oblomov.eu Git - linux-2.6/blob - drivers/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <asm/page.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/module.h>
  25
  26 #include "vmx.h"
  27 #include "kvm.h"
  28
  29 #define pgprintk(x...) do { printk(x); } while (0)
  30 #define rmap_printk(x...) do { printk(x); } while (0)
  31
  32 #define ASSERT(x)                                                       \
  33         if (!(x)) {                                                     \
  34                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
  35                        __FILE__, __LINE__, #x);                         \
  36         }
  37
  38 #define PT64_PT_BITS 9
  39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  40 #define PT32_PT_BITS 10
  41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  42
  43 #define PT_WRITABLE_SHIFT 1
  44
  45 #define PT_PRESENT_MASK (1ULL << 0)
  46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  47 #define PT_USER_MASK (1ULL << 2)
  48 #define PT_PWT_MASK (1ULL << 3)
  49 #define PT_PCD_MASK (1ULL << 4)
  50 #define PT_ACCESSED_MASK (1ULL << 5)
  51 #define PT_DIRTY_MASK (1ULL << 6)
  52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
  53 #define PT_PAT_MASK (1ULL << 7)
  54 #define PT_GLOBAL_MASK (1ULL << 8)
  55 #define PT64_NX_MASK (1ULL << 63)
  56
  57 #define PT_PAT_SHIFT 7
  58 #define PT_DIR_PAT_SHIFT 12
  59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  60
  61 #define PT32_DIR_PSE36_SIZE 4
  62 #define PT32_DIR_PSE36_SHIFT 13
  63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  64
  65
  66 #define PT32_PTE_COPY_MASK \
  67         (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
  68
  69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
  70
  71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
  72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  73
  74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  76
  77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
  78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
  79
  80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
  81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
  82
  83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
  84
  85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  86
  87 #define PT64_LEVEL_BITS 9
  88
  89 #define PT64_LEVEL_SHIFT(level) \
  90                 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  91
  92 #define PT64_LEVEL_MASK(level) \
  93                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  94
  95 #define PT64_INDEX(address, level)\
  96         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  97
  98
  99 #define PT32_LEVEL_BITS 10
 100
 101 #define PT32_LEVEL_SHIFT(level) \
 102                 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
 103
 104 #define PT32_LEVEL_MASK(level) \
 105                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
 106
 107 #define PT32_INDEX(address, level)\
 108         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 109
 110
 111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
 112 #define PT64_DIR_BASE_ADDR_MASK \
 113         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 114
 115 #define PT32_BASE_ADDR_MASK PAGE_MASK
 116 #define PT32_DIR_BASE_ADDR_MASK \
 117         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 118
 119
 120 #define PFERR_PRESENT_MASK (1U << 0)
 121 #define PFERR_WRITE_MASK (1U << 1)
 122 #define PFERR_USER_MASK (1U << 2)
 123
 124 #define PT64_ROOT_LEVEL 4
 125 #define PT32_ROOT_LEVEL 2
 126 #define PT32E_ROOT_LEVEL 3
 127
 128 #define PT_DIRECTORY_LEVEL 2
 129 #define PT_PAGE_TABLE_LEVEL 1
 130
 131 #define RMAP_EXT 4
 132
 133 struct kvm_rmap_desc {
 134         u64 *shadow_ptes[RMAP_EXT];
 135         struct kvm_rmap_desc *more;
 136 };
 137
 138 static int is_write_protection(struct kvm_vcpu *vcpu)
 139 {
 140         return vcpu->cr0 & CR0_WP_MASK;
 141 }
 142
 143 static int is_cpuid_PSE36(void)
 144 {
 145         return 1;
 146 }
 147
 148 static int is_present_pte(unsigned long pte)
 149 {
 150         return pte & PT_PRESENT_MASK;
 151 }
 152
 153 static int is_writeble_pte(unsigned long pte)
 154 {
 155         return pte & PT_WRITABLE_MASK;
 156 }
 157
 158 static int is_io_pte(unsigned long pte)
 159 {
 160         return pte & PT_SHADOW_IO_MARK;
 161 }
 162
 163 static int is_rmap_pte(u64 pte)
 164 {
 165         return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
 166                 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
 167 }
 168
 169 /*
 170  * Reverse mapping data structures:
 171  *
 172  * If page->private bit zero is zero, then page->private points to the
 173  * shadow page table entry that points to page_address(page).
 174  *
 175  * If page->private bit zero is one, (then page->private & ~1) points
 176  * to a struct kvm_rmap_desc containing more mappings.
 177  */
 178 static void rmap_add(struct kvm *kvm, u64 *spte)
 179 {
 180         struct page *page;
 181         struct kvm_rmap_desc *desc;
 182         int i;
 183
 184         if (!is_rmap_pte(*spte))
 185                 return;
 186         page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
 187         if (!page->private) {
 188                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
 189                 page->private = (unsigned long)spte;
 190         } else if (!(page->private & 1)) {
 191                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
 192                 desc = kzalloc(sizeof *desc, GFP_NOWAIT);
 193                 if (!desc)
 194                         BUG(); /* FIXME: return error */
 195                 desc->shadow_ptes[0] = (u64 *)page->private;
 196                 desc->shadow_ptes[1] = spte;
 197                 page->private = (unsigned long)desc | 1;
 198         } else {
 199                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
 200                 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
 201                 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
 202                         desc = desc->more;
 203                 if (desc->shadow_ptes[RMAP_EXT-1]) {
 204                         desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
 205                         if (!desc->more)
 206                                 BUG(); /* FIXME: return error */
 207                         desc = desc->more;
 208                 }
 209                 for (i = 0; desc->shadow_ptes[i]; ++i)
 210                         ;
 211                 desc->shadow_ptes[i] = spte;
 212         }
 213 }
 214
 215 static void rmap_desc_remove_entry(struct page *page,
 216                                    struct kvm_rmap_desc *desc,
 217                                    int i,
 218                                    struct kvm_rmap_desc *prev_desc)
 219 {
 220         int j;
 221
 222         for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
 223                 ;
 224         desc->shadow_ptes[i] = desc->shadow_ptes[j];
 225         desc->shadow_ptes[j] = 0;
 226         if (j != 0)
 227                 return;
 228         if (!prev_desc && !desc->more)
 229                 page->private = (unsigned long)desc->shadow_ptes[0];
 230         else
 231                 if (prev_desc)
 232                         prev_desc->more = desc->more;
 233                 else
 234                         page->private = (unsigned long)desc->more | 1;
 235         kfree(desc);
 236 }
 237
 238 static void rmap_remove(struct kvm *kvm, u64 *spte)
 239 {
 240         struct page *page;
 241         struct kvm_rmap_desc *desc;
 242         struct kvm_rmap_desc *prev_desc;
 243         int i;
 244
 245         if (!is_rmap_pte(*spte))
 246                 return;
 247         page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
 248         if (!page->private) {
 249                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
 250                 BUG();
 251         } else if (!(page->private & 1)) {
 252                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
 253                 if ((u64 *)page->private != spte) {
 254                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
 255                                spte, *spte);
 256                         BUG();
 257                 }
 258                 page->private = 0;
 259         } else {
 260                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
 261                 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
 262                 prev_desc = NULL;
 263                 while (desc) {
 264                         for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
 265                                 if (desc->shadow_ptes[i] == spte) {
 266                                         rmap_desc_remove_entry(page, desc, i,
 267                                                                prev_desc);
 268                                         return;
 269                                 }
 270                         prev_desc = desc;
 271                         desc = desc->more;
 272                 }
 273                 BUG();
 274         }
 275 }
 276
 277 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
 278 {
 279         struct page *page;
 280         struct kvm_memory_slot *slot;
 281         struct kvm_rmap_desc *desc;
 282         u64 *spte;
 283
 284         slot = gfn_to_memslot(kvm, gfn);
 285         BUG_ON(!slot);
 286         page = gfn_to_page(slot, gfn);
 287
 288         while (page->private) {
 289                 if (!(page->private & 1))
 290                         spte = (u64 *)page->private;
 291                 else {
 292                         desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
 293                         spte = desc->shadow_ptes[0];
 294                 }
 295                 BUG_ON(!spte);
 296                 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
 297                        page_to_pfn(page) << PAGE_SHIFT);
 298                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 299                 BUG_ON(!(*spte & PT_WRITABLE_MASK));
 300                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 301                 rmap_remove(kvm, spte);
 302                 *spte &= ~(u64)PT_WRITABLE_MASK;
 303         }
 304 }
 305
 306 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
 307 {
 308         struct kvm_mmu_page *page_head = page_header(page_hpa);
 309
 310         list_del(&page_head->link);
 311         page_head->page_hpa = page_hpa;
 312         list_add(&page_head->link, &vcpu->free_pages);
 313 }
 314
 315 static int is_empty_shadow_page(hpa_t page_hpa)
 316 {
 317         u32 *pos;
 318         u32 *end;
 319         for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
 320                       pos != end; pos++)
 321                 if (*pos != 0)
 322                         return 0;
 323         return 1;
 324 }
 325
 326 static unsigned kvm_page_table_hashfn(gfn_t gfn)
 327 {
 328         return gfn;
 329 }
 330
 331 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
 332                                                u64 *parent_pte)
 333 {
 334         struct kvm_mmu_page *page;
 335
 336         if (list_empty(&vcpu->free_pages))
 337                 return NULL;
 338
 339         page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
 340         list_del(&page->link);
 341         list_add(&page->link, &vcpu->kvm->active_mmu_pages);
 342         ASSERT(is_empty_shadow_page(page->page_hpa));
 343         page->slot_bitmap = 0;
 344         page->global = 1;
 345         page->multimapped = 0;
 346         page->parent_pte = parent_pte;
 347         return page;
 348 }
 349
 350 static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
 351 {
 352         struct kvm_pte_chain *pte_chain;
 353         struct hlist_node *node;
 354         int i;
 355
 356         if (!parent_pte)
 357                 return;
 358         if (!page->multimapped) {
 359                 u64 *old = page->parent_pte;
 360
 361                 if (!old) {
 362                         page->parent_pte = parent_pte;
 363                         return;
 364                 }
 365                 page->multimapped = 1;
 366                 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
 367                 BUG_ON(!pte_chain);
 368                 INIT_HLIST_HEAD(&page->parent_ptes);
 369                 hlist_add_head(&pte_chain->link, &page->parent_ptes);
 370                 pte_chain->parent_ptes[0] = old;
 371         }
 372         hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
 373                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
 374                         continue;
 375                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
 376                         if (!pte_chain->parent_ptes[i]) {
 377                                 pte_chain->parent_ptes[i] = parent_pte;
 378                                 return;
 379                         }
 380         }
 381         pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
 382         BUG_ON(!pte_chain);
 383         hlist_add_head(&pte_chain->link, &page->parent_ptes);
 384         pte_chain->parent_ptes[0] = parent_pte;
 385 }
 386
 387 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
 388                                        u64 *parent_pte)
 389 {
 390         struct kvm_pte_chain *pte_chain;
 391         struct hlist_node *node;
 392         int i;
 393
 394         if (!page->multimapped) {
 395                 BUG_ON(page->parent_pte != parent_pte);
 396                 page->parent_pte = NULL;
 397                 return;
 398         }
 399         hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
 400                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
 401                         if (!pte_chain->parent_ptes[i])
 402                                 break;
 403                         if (pte_chain->parent_ptes[i] != parent_pte)
 404                                 continue;
 405                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
 406                                 && pte_chain->parent_ptes[i + 1]) {
 407                                 pte_chain->parent_ptes[i]
 408                                         = pte_chain->parent_ptes[i + 1];
 409                                 ++i;
 410                         }
 411                         pte_chain->parent_ptes[i] = NULL;
 412                         if (i == 0) {
 413                                 hlist_del(&pte_chain->link);
 414                                 kfree(pte_chain);
 415                                 if (hlist_empty(&page->parent_ptes)) {
 416                                         page->multimapped = 0;
 417                                         page->parent_pte = NULL;
 418                                 }
 419                         }
 420                         return;
 421                 }
 422         BUG();
 423 }
 424
 425 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
 426                                                 gfn_t gfn)
 427 {
 428         unsigned index;
 429         struct hlist_head *bucket;
 430         struct kvm_mmu_page *page;
 431         struct hlist_node *node;
 432
 433         pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
 434         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
 435         bucket = &vcpu->kvm->mmu_page_hash[index];
 436         hlist_for_each_entry(page, node, bucket, hash_link)
 437                 if (page->gfn == gfn && !page->role.metaphysical) {
 438                         pgprintk("%s: found role %x\n",
 439                                  __FUNCTION__, page->role.word);
 440                         return page;
 441                 }
 442         return NULL;
 443 }
 444
 445 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
 446                                              gfn_t gfn,
 447                                              gva_t gaddr,
 448                                              unsigned level,
 449                                              int metaphysical,
 450                                              u64 *parent_pte)
 451 {
 452         union kvm_mmu_page_role role;
 453         unsigned index;
 454         unsigned quadrant;
 455         struct hlist_head *bucket;
 456         struct kvm_mmu_page *page;
 457         struct hlist_node *node;
 458
 459         role.word = 0;
 460         role.glevels = vcpu->mmu.root_level;
 461         role.level = level;
 462         role.metaphysical = metaphysical;
 463         if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
 464                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
 465                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
 466                 role.quadrant = quadrant;
 467         }
 468         pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
 469                  gfn, role.word);
 470         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
 471         bucket = &vcpu->kvm->mmu_page_hash[index];
 472         hlist_for_each_entry(page, node, bucket, hash_link)
 473                 if (page->gfn == gfn && page->role.word == role.word) {
 474                         mmu_page_add_parent_pte(page, parent_pte);
 475                         pgprintk("%s: found\n", __FUNCTION__);
 476                         return page;
 477                 }
 478         page = kvm_mmu_alloc_page(vcpu, parent_pte);
 479         if (!page)
 480                 return page;
 481         pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
 482         page->gfn = gfn;
 483         page->role = role;
 484         hlist_add_head(&page->hash_link, bucket);
 485         if (!metaphysical)
 486                 rmap_write_protect(vcpu->kvm, gfn);
 487         return page;
 488 }
 489
 490 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
 491                                          struct kvm_mmu_page *page)
 492 {
 493         unsigned i;
 494         u64 *pt;
 495         u64 ent;
 496
 497         pt = __va(page->page_hpa);
 498
 499         if (page->role.level == PT_PAGE_TABLE_LEVEL) {
 500                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
 501                         if (pt[i] & PT_PRESENT_MASK)
 502                                 rmap_remove(vcpu->kvm, &pt[i]);
 503                         pt[i] = 0;
 504                 }
 505                 return;
 506         }
 507
 508         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
 509                 ent = pt[i];
 510
 511                 pt[i] = 0;
 512                 if (!(ent & PT_PRESENT_MASK))
 513                         continue;
 514                 ent &= PT64_BASE_ADDR_MASK;
 515                 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
 516         }
 517 }
 518
 519 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
 520                              struct kvm_mmu_page *page,
 521                              u64 *parent_pte)
 522 {
 523         mmu_page_remove_parent_pte(page, parent_pte);
 524 }
 525
 526 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
 527                              struct kvm_mmu_page *page)
 528 {
 529         u64 *parent_pte;
 530
 531         while (page->multimapped || page->parent_pte) {
 532                 if (!page->multimapped)
 533                         parent_pte = page->parent_pte;
 534                 else {
 535                         struct kvm_pte_chain *chain;
 536
 537                         chain = container_of(page->parent_ptes.first,
 538                                              struct kvm_pte_chain, link);
 539                         parent_pte = chain->parent_ptes[0];
 540                 }
 541                 BUG_ON(!parent_pte);
 542                 kvm_mmu_put_page(vcpu, page, parent_pte);
 543                 *parent_pte = 0;
 544         }
 545         kvm_mmu_page_unlink_children(vcpu, page);
 546         hlist_del(&page->hash_link);
 547         list_del(&page->link);
 548         list_add(&page->link, &vcpu->free_pages);
 549 }
 550
 551 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
 552 {
 553         unsigned index;
 554         struct hlist_head *bucket;
 555         struct kvm_mmu_page *page;
 556         struct hlist_node *node, *n;
 557         int r;
 558
 559         pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
 560         r = 0;
 561         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
 562         bucket = &vcpu->kvm->mmu_page_hash[index];
 563         hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
 564                 if (page->gfn == gfn && !page->role.metaphysical) {
 565                         pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
 566                                  page->role.word);
 567                         kvm_mmu_zap_page(vcpu, page);
 568                         r = 1;
 569                 }
 570         return r;
 571 }
 572
 573 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
 574 {
 575         int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
 576         struct kvm_mmu_page *page_head = page_header(__pa(pte));
 577
 578         __set_bit(slot, &page_head->slot_bitmap);
 579 }
 580
 581 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
 582 {
 583         hpa_t hpa = gpa_to_hpa(vcpu, gpa);
 584
 585         return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
 586 }
 587
 588 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
 589 {
 590         struct kvm_memory_slot *slot;
 591         struct page *page;
 592
 593         ASSERT((gpa & HPA_ERR_MASK) == 0);
 594         slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
 595         if (!slot)
 596                 return gpa | HPA_ERR_MASK;
 597         page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
 598         return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
 599                 | (gpa & (PAGE_SIZE-1));
 600 }
 601
 602 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
 603 {
 604         gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
 605
 606         if (gpa == UNMAPPED_GVA)
 607                 return UNMAPPED_GVA;
 608         return gpa_to_hpa(vcpu, gpa);
 609 }
 610
 611
 612 static void release_pt_page_64(struct kvm_vcpu *vcpu, hpa_t page_hpa,
 613                                int level)
 614 {
 615         u64 *pos;
 616         u64 *end;
 617
 618         ASSERT(vcpu);
 619         ASSERT(VALID_PAGE(page_hpa));
 620         ASSERT(level <= PT64_ROOT_LEVEL && level > 0);
 621
 622         for (pos = __va(page_hpa), end = pos + PT64_ENT_PER_PAGE;
 623              pos != end; pos++) {
 624                 u64 current_ent = *pos;
 625
 626                 if (is_present_pte(current_ent)) {
 627                         if (level != 1)
 628                                 release_pt_page_64(vcpu,
 629                                                   current_ent &
 630                                                   PT64_BASE_ADDR_MASK,
 631                                                   level - 1);
 632                         else
 633                                 rmap_remove(vcpu->kvm, pos);
 634                 }
 635                 *pos = 0;
 636         }
 637         kvm_mmu_free_page(vcpu, page_hpa);
 638 }
 639
 640 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
 641 {
 642 }
 643
 644 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
 645 {
 646         int level = PT32E_ROOT_LEVEL;
 647         hpa_t table_addr = vcpu->mmu.root_hpa;
 648
 649         for (; ; level--) {
 650                 u32 index = PT64_INDEX(v, level);
 651                 u64 *table;
 652                 u64 pte;
 653
 654                 ASSERT(VALID_PAGE(table_addr));
 655                 table = __va(table_addr);
 656
 657                 if (level == 1) {
 658                         pte = table[index];
 659                         if (is_present_pte(pte) && is_writeble_pte(pte))
 660                                 return 0;
 661                         mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
 662                         page_header_update_slot(vcpu->kvm, table, v);
 663                         table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
 664                                                                 PT_USER_MASK;
 665                         rmap_add(vcpu->kvm, &table[index]);
 666                         return 0;
 667                 }
 668
 669                 if (table[index] == 0) {
 670                         struct kvm_mmu_page *new_table;
 671                         gfn_t pseudo_gfn;
 672
 673                         pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
 674                                 >> PAGE_SHIFT;
 675                         new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
 676                                                      v, level - 1,
 677                                                      1, &table[index]);
 678                         if (!new_table) {
 679                                 pgprintk("nonpaging_map: ENOMEM\n");
 680                                 return -ENOMEM;
 681                         }
 682
 683                         table[index] = new_table->page_hpa | PT_PRESENT_MASK
 684                                 | PT_WRITABLE_MASK | PT_USER_MASK;
 685                 }
 686                 table_addr = table[index] & PT64_BASE_ADDR_MASK;
 687         }
 688 }
 689
 690 static void mmu_free_roots(struct kvm_vcpu *vcpu)
 691 {
 692         int i;
 693
 694 #ifdef CONFIG_X86_64
 695         if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
 696                 hpa_t root = vcpu->mmu.root_hpa;
 697
 698                 ASSERT(VALID_PAGE(root));
 699                 vcpu->mmu.root_hpa = INVALID_PAGE;
 700                 return;
 701         }
 702 #endif
 703         for (i = 0; i < 4; ++i) {
 704                 hpa_t root = vcpu->mmu.pae_root[i];
 705
 706                 ASSERT(VALID_PAGE(root));
 707                 root &= PT64_BASE_ADDR_MASK;
 708                 vcpu->mmu.pae_root[i] = INVALID_PAGE;
 709         }
 710         vcpu->mmu.root_hpa = INVALID_PAGE;
 711 }
 712
 713 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
 714 {
 715         int i;
 716         gfn_t root_gfn;
 717         root_gfn = vcpu->cr3 >> PAGE_SHIFT;
 718
 719 #ifdef CONFIG_X86_64
 720         if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
 721                 hpa_t root = vcpu->mmu.root_hpa;
 722
 723                 ASSERT(!VALID_PAGE(root));
 724                 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
 725                                         PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
 726                 vcpu->mmu.root_hpa = root;
 727                 return;
 728         }
 729 #endif
 730         for (i = 0; i < 4; ++i) {
 731                 hpa_t root = vcpu->mmu.pae_root[i];
 732
 733                 ASSERT(!VALID_PAGE(root));
 734                 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
 735                         root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
 736                 else if (vcpu->mmu.root_level == 0)
 737                         root_gfn = 0;
 738                 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
 739                                         PT32_ROOT_LEVEL, !is_paging(vcpu),
 740                                         NULL)->page_hpa;
 741                 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
 742         }
 743         vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
 744 }
 745
 746 static void nonpaging_flush(struct kvm_vcpu *vcpu)
 747 {
 748         hpa_t root = vcpu->mmu.root_hpa;
 749
 750         ++kvm_stat.tlb_flush;
 751         pgprintk("nonpaging_flush\n");
 752         mmu_free_roots(vcpu);
 753         mmu_alloc_roots(vcpu);
 754         kvm_arch_ops->set_cr3(vcpu, root);
 755         kvm_arch_ops->tlb_flush(vcpu);
 756 }
 757
 758 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
 759 {
 760         return vaddr;
 761 }
 762
 763 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
 764                                u32 error_code)
 765 {
 766         int ret;
 767         gpa_t addr = gva;
 768
 769         ASSERT(vcpu);
 770         ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
 771
 772         for (;;) {
 773              hpa_t paddr;
 774
 775              paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
 776
 777              if (is_error_hpa(paddr))
 778                      return 1;
 779
 780              ret = nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
 781              if (ret) {
 782                      nonpaging_flush(vcpu);
 783                      continue;
 784              }
 785              break;
 786         }
 787         return ret;
 788 }
 789
 790 static void nonpaging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
 791 {
 792 }
 793
 794 static void nonpaging_free(struct kvm_vcpu *vcpu)
 795 {
 796         mmu_free_roots(vcpu);
 797 }
 798
 799 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
 800 {
 801         struct kvm_mmu *context = &vcpu->mmu;
 802
 803         context->new_cr3 = nonpaging_new_cr3;
 804         context->page_fault = nonpaging_page_fault;
 805         context->inval_page = nonpaging_inval_page;
 806         context->gva_to_gpa = nonpaging_gva_to_gpa;
 807         context->free = nonpaging_free;
 808         context->root_level = 0;
 809         context->shadow_root_level = PT32E_ROOT_LEVEL;
 810         mmu_alloc_roots(vcpu);
 811         ASSERT(VALID_PAGE(context->root_hpa));
 812         kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
 813         return 0;
 814 }
 815
 816 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
 817 {
 818         ++kvm_stat.tlb_flush;
 819         kvm_arch_ops->tlb_flush(vcpu);
 820 }
 821
 822 static void paging_new_cr3(struct kvm_vcpu *vcpu)
 823 {
 824         pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
 825         mmu_free_roots(vcpu);
 826         mmu_alloc_roots(vcpu);
 827         kvm_mmu_flush_tlb(vcpu);
 828         kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
 829 }
 830
 831 static void mark_pagetable_nonglobal(void *shadow_pte)
 832 {
 833         page_header(__pa(shadow_pte))->global = 0;
 834 }
 835
 836 static inline void set_pte_common(struct kvm_vcpu *vcpu,
 837                              u64 *shadow_pte,
 838                              gpa_t gaddr,
 839                              int dirty,
 840                              u64 access_bits,
 841                              gfn_t gfn)
 842 {
 843         hpa_t paddr;
 844
 845         *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
 846         if (!dirty)
 847                 access_bits &= ~PT_WRITABLE_MASK;
 848
 849         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
 850
 851         *shadow_pte |= access_bits;
 852
 853         if (!(*shadow_pte & PT_GLOBAL_MASK))
 854                 mark_pagetable_nonglobal(shadow_pte);
 855
 856         if (is_error_hpa(paddr)) {
 857                 *shadow_pte |= gaddr;
 858                 *shadow_pte |= PT_SHADOW_IO_MARK;
 859                 *shadow_pte &= ~PT_PRESENT_MASK;
 860                 return;
 861         }
 862
 863         *shadow_pte |= paddr;
 864
 865         if (access_bits & PT_WRITABLE_MASK) {
 866                 struct kvm_mmu_page *shadow;
 867
 868                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
 869                 if (shadow) {
 870                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 871                                  __FUNCTION__, gfn);
 872                         access_bits &= ~PT_WRITABLE_MASK;
 873                         *shadow_pte &= ~PT_WRITABLE_MASK;
 874                 }
 875         }
 876
 877         if (access_bits & PT_WRITABLE_MASK)
 878                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 879
 880         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 881         rmap_add(vcpu->kvm, shadow_pte);
 882 }
 883
 884 static void inject_page_fault(struct kvm_vcpu *vcpu,
 885                               u64 addr,
 886                               u32 err_code)
 887 {
 888         kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
 889 }
 890
 891 static inline int fix_read_pf(u64 *shadow_ent)
 892 {
 893         if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
 894             !(*shadow_ent & PT_USER_MASK)) {
 895                 /*
 896                  * If supervisor write protect is disabled, we shadow kernel
 897                  * pages as user pages so we can trap the write access.
 898                  */
 899                 *shadow_ent |= PT_USER_MASK;
 900                 *shadow_ent &= ~PT_WRITABLE_MASK;
 901
 902                 return 1;
 903
 904         }
 905         return 0;
 906 }
 907
 908 static int may_access(u64 pte, int write, int user)
 909 {
 910
 911         if (user && !(pte & PT_USER_MASK))
 912                 return 0;
 913         if (write && !(pte & PT_WRITABLE_MASK))
 914                 return 0;
 915         return 1;
 916 }
 917
 918 /*
 919  * Remove a shadow pte.
 920  */
 921 static void paging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
 922 {
 923         hpa_t page_addr = vcpu->mmu.root_hpa;
 924         int level = vcpu->mmu.shadow_root_level;
 925
 926         ++kvm_stat.invlpg;
 927
 928         for (; ; level--) {
 929                 u32 index = PT64_INDEX(addr, level);
 930                 u64 *table = __va(page_addr);
 931
 932                 if (level == PT_PAGE_TABLE_LEVEL ) {
 933                         rmap_remove(vcpu->kvm, &table[index]);
 934                         table[index] = 0;
 935                         return;
 936                 }
 937
 938                 if (!is_present_pte(table[index]))
 939                         return;
 940
 941                 page_addr = table[index] & PT64_BASE_ADDR_MASK;
 942
 943                 if (level == PT_DIRECTORY_LEVEL &&
 944                           (table[index] & PT_SHADOW_PS_MARK)) {
 945                         table[index] = 0;
 946                         release_pt_page_64(vcpu, page_addr, PT_PAGE_TABLE_LEVEL);
 947
 948                         kvm_arch_ops->tlb_flush(vcpu);
 949                         return;
 950                 }
 951         }
 952 }
 953
 954 static void paging_free(struct kvm_vcpu *vcpu)
 955 {
 956         nonpaging_free(vcpu);
 957 }
 958
 959 #define PTTYPE 64
 960 #include "paging_tmpl.h"
 961 #undef PTTYPE
 962
 963 #define PTTYPE 32
 964 #include "paging_tmpl.h"
 965 #undef PTTYPE
 966
 967 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
 968 {
 969         struct kvm_mmu *context = &vcpu->mmu;
 970
 971         ASSERT(is_pae(vcpu));
 972         context->new_cr3 = paging_new_cr3;
 973         context->page_fault = paging64_page_fault;
 974         context->inval_page = paging_inval_page;
 975         context->gva_to_gpa = paging64_gva_to_gpa;
 976         context->free = paging_free;
 977         context->root_level = level;
 978         context->shadow_root_level = level;
 979         mmu_alloc_roots(vcpu);
 980         ASSERT(VALID_PAGE(context->root_hpa));
 981         kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
 982                     (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
 983         return 0;
 984 }
 985
 986 static int paging64_init_context(struct kvm_vcpu *vcpu)
 987 {
 988         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
 989 }
 990
 991 static int paging32_init_context(struct kvm_vcpu *vcpu)
 992 {
 993         struct kvm_mmu *context = &vcpu->mmu;
 994
 995         context->new_cr3 = paging_new_cr3;
 996         context->page_fault = paging32_page_fault;
 997         context->inval_page = paging_inval_page;
 998         context->gva_to_gpa = paging32_gva_to_gpa;
 999         context->free = paging_free;
1000         context->root_level = PT32_ROOT_LEVEL;
1001         context->shadow_root_level = PT32E_ROOT_LEVEL;
1002         mmu_alloc_roots(vcpu);
1003         ASSERT(VALID_PAGE(context->root_hpa));
1004         kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1005                     (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1006         return 0;
1007 }
1008
1009 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1010 {
1011         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1012 }
1013
1014 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1015 {
1016         ASSERT(vcpu);
1017         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1018
1019         if (!is_paging(vcpu))
1020                 return nonpaging_init_context(vcpu);
1021         else if (is_long_mode(vcpu))
1022                 return paging64_init_context(vcpu);
1023         else if (is_pae(vcpu))
1024                 return paging32E_init_context(vcpu);
1025         else
1026                 return paging32_init_context(vcpu);
1027 }
1028
1029 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1030 {
1031         ASSERT(vcpu);
1032         if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1033                 vcpu->mmu.free(vcpu);
1034                 vcpu->mmu.root_hpa = INVALID_PAGE;
1035         }
1036 }
1037
1038 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1039 {
1040         destroy_kvm_mmu(vcpu);
1041         return init_kvm_mmu(vcpu);
1042 }
1043
1044 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1045 {
1046         gfn_t gfn = gpa >> PAGE_SHIFT;
1047         struct kvm_mmu_page *page;
1048         struct kvm_mmu_page *child;
1049         struct hlist_node *node;
1050         struct hlist_head *bucket;
1051         unsigned index;
1052         u64 *spte;
1053         u64 pte;
1054         unsigned offset = offset_in_page(gpa);
1055         unsigned page_offset;
1056         int level;
1057
1058         pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1059         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1060         bucket = &vcpu->kvm->mmu_page_hash[index];
1061         hlist_for_each_entry(page, node, bucket, hash_link) {
1062                 if (page->gfn != gfn || page->role.metaphysical)
1063                         continue;
1064                 page_offset = offset;
1065                 level = page->role.level;
1066                 if (page->role.glevels == PT32_ROOT_LEVEL) {
1067                         page_offset <<= 1;          /* 32->64 */
1068                         page_offset &= ~PAGE_MASK;
1069                 }
1070                 spte = __va(page->page_hpa);
1071                 spte += page_offset / sizeof(*spte);
1072                 pte = *spte;
1073                 if (is_present_pte(pte)) {
1074                         if (level == PT_PAGE_TABLE_LEVEL)
1075                                 rmap_remove(vcpu->kvm, spte);
1076                         else {
1077                                 child = page_header(pte & PT64_BASE_ADDR_MASK);
1078                                 mmu_page_remove_parent_pte(child, spte);
1079                         }
1080                 }
1081                 *spte = 0;
1082         }
1083 }
1084
1085 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1086 {
1087 }
1088
1089 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1090 {
1091         gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1092
1093         return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1094 }
1095
1096 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1097 {
1098         while (!list_empty(&vcpu->free_pages)) {
1099                 struct kvm_mmu_page *page;
1100
1101                 page = list_entry(vcpu->free_pages.next,
1102                                   struct kvm_mmu_page, link);
1103                 list_del(&page->link);
1104                 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1105                 page->page_hpa = INVALID_PAGE;
1106         }
1107         free_page((unsigned long)vcpu->mmu.pae_root);
1108 }
1109
1110 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1111 {
1112         struct page *page;
1113         int i;
1114
1115         ASSERT(vcpu);
1116
1117         for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1118                 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1119
1120                 INIT_LIST_HEAD(&page_header->link);
1121                 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1122                         goto error_1;
1123                 page->private = (unsigned long)page_header;
1124                 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1125                 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1126                 list_add(&page_header->link, &vcpu->free_pages);
1127         }
1128
1129         /*
1130          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1131          * Therefore we need to allocate shadow page tables in the first
1132          * 4GB of memory, which happens to fit the DMA32 zone.
1133          */
1134         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1135         if (!page)
1136                 goto error_1;
1137         vcpu->mmu.pae_root = page_address(page);
1138         for (i = 0; i < 4; ++i)
1139                 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1140
1141         return 0;
1142
1143 error_1:
1144         free_mmu_pages(vcpu);
1145         return -ENOMEM;
1146 }
1147
1148 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1149 {
1150         ASSERT(vcpu);
1151         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1152         ASSERT(list_empty(&vcpu->free_pages));
1153
1154         return alloc_mmu_pages(vcpu);
1155 }
1156
1157 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1158 {
1159         ASSERT(vcpu);
1160         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1161         ASSERT(!list_empty(&vcpu->free_pages));
1162
1163         return init_kvm_mmu(vcpu);
1164 }
1165
1166 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1167 {
1168         ASSERT(vcpu);
1169
1170         destroy_kvm_mmu(vcpu);
1171         free_mmu_pages(vcpu);
1172 }
1173
1174 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1175 {
1176         struct kvm_mmu_page *page;
1177
1178         list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1179                 int i;
1180                 u64 *pt;
1181
1182                 if (!test_bit(slot, &page->slot_bitmap))
1183                         continue;
1184
1185                 pt = __va(page->page_hpa);
1186                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1187                         /* avoid RMW */
1188                         if (pt[i] & PT_WRITABLE_MASK) {
1189                                 rmap_remove(kvm, &pt[i]);
1190                                 pt[i] &= ~PT_WRITABLE_MASK;
1191                         }
1192         }
1193 }