git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/module.h>
  23 #include <linux/lmb.h>
  24 #include <linux/of_device.h>
  25
  26 #include <asm/prom.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31 #include <asm/smp.h>
  32
  33 extern struct device_node *allnodes;    /* temporary while merging */
  34
  35 extern rwlock_t devtree_lock;   /* temporary while merging */
  36
  37 struct device_node *of_find_node_by_phandle(phandle handle)
  38 {
  39         struct device_node *np;
  40
  41         for (np = allnodes; np != 0; np = np->allnext)
  42                 if (np->node == handle)
  43                         break;
  44
  45         return np;
  46 }
  47 EXPORT_SYMBOL(of_find_node_by_phandle);
  48
  49 int of_getintprop_default(struct device_node *np, const char *name, int def)
  50 {
  51         struct property *prop;
  52         int len;
  53
  54         prop = of_find_property(np, name, &len);
  55         if (!prop || len != 4)
  56                 return def;
  57
  58         return *(int *) prop->value;
  59 }
  60 EXPORT_SYMBOL(of_getintprop_default);
  61
  62 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
  63 {
  64         struct property **prevp;
  65         void *new_val;
  66         int err;
  67
  68         new_val = kmalloc(len, GFP_KERNEL);
  69         if (!new_val)
  70                 return -ENOMEM;
  71
  72         memcpy(new_val, val, len);
  73
  74         err = -ENODEV;
  75
  76         write_lock(&devtree_lock);
  77         prevp = &dp->properties;
  78         while (*prevp) {
  79                 struct property *prop = *prevp;
  80
  81                 if (!strcasecmp(prop->name, name)) {
  82                         void *old_val = prop->value;
  83                         int ret;
  84
  85                         ret = prom_setprop(dp->node, name, val, len);
  86                         err = -EINVAL;
  87                         if (ret >= 0) {
  88                                 prop->value = new_val;
  89                                 prop->length = len;
  90
  91                                 if (OF_IS_DYNAMIC(prop))
  92                                         kfree(old_val);
  93
  94                                 OF_MARK_DYNAMIC(prop);
  95
  96                                 err = 0;
  97                         }
  98                         break;
  99                 }
 100                 prevp = &(*prevp)->next;
 101         }
 102         write_unlock(&devtree_lock);
 103
 104         /* XXX Upate procfs if necessary... */
 105
 106         return err;
 107 }
 108 EXPORT_SYMBOL(of_set_property);
 109
 110 int of_find_in_proplist(const char *list, const char *match, int len)
 111 {
 112         while (len > 0) {
 113                 int l;
 114
 115                 if (!strcmp(list, match))
 116                         return 1;
 117                 l = strlen(list) + 1;
 118                 list += l;
 119                 len -= l;
 120         }
 121         return 0;
 122 }
 123 EXPORT_SYMBOL(of_find_in_proplist);
 124
 125 static unsigned int prom_early_allocated __initdata;
 126
 127 static void * __init prom_early_alloc(unsigned long size)
 128 {
 129         unsigned long paddr = lmb_alloc(size, SMP_CACHE_BYTES);
 130         void *ret;
 131
 132         if (!paddr) {
 133                 prom_printf("prom_early_alloc(%lu) failed\n");
 134                 prom_halt();
 135         }
 136
 137         ret = __va(paddr);
 138         memset(ret, 0, size);
 139         prom_early_allocated += size;
 140
 141         return ret;
 142 }
 143
 144 #ifdef CONFIG_PCI
 145 /* PSYCHO interrupt mapping support. */
 146 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 147 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 148 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 149 {
 150         unsigned int bus =  (ino & 0x10) >> 4;
 151         unsigned int slot = (ino & 0x0c) >> 2;
 152
 153         if (bus == 0)
 154                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 155         else
 156                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 157 }
 158
 159 #define PSYCHO_IMAP_SCSI        0x1000UL
 160 #define PSYCHO_IMAP_ETH         0x1008UL
 161 #define PSYCHO_IMAP_BPP         0x1010UL
 162 #define PSYCHO_IMAP_AU_REC      0x1018UL
 163 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 164 #define PSYCHO_IMAP_PFAIL       0x1028UL
 165 #define PSYCHO_IMAP_KMS         0x1030UL
 166 #define PSYCHO_IMAP_FLPY        0x1038UL
 167 #define PSYCHO_IMAP_SHW         0x1040UL
 168 #define PSYCHO_IMAP_KBD         0x1048UL
 169 #define PSYCHO_IMAP_MS          0x1050UL
 170 #define PSYCHO_IMAP_SER         0x1058UL
 171 #define PSYCHO_IMAP_TIM0        0x1060UL
 172 #define PSYCHO_IMAP_TIM1        0x1068UL
 173 #define PSYCHO_IMAP_UE          0x1070UL
 174 #define PSYCHO_IMAP_CE          0x1078UL
 175 #define PSYCHO_IMAP_A_ERR       0x1080UL
 176 #define PSYCHO_IMAP_B_ERR       0x1088UL
 177 #define PSYCHO_IMAP_PMGMT       0x1090UL
 178 #define PSYCHO_IMAP_GFX         0x1098UL
 179 #define PSYCHO_IMAP_EUPA        0x10a0UL
 180
 181 static unsigned long __psycho_onboard_imap_off[] = {
 182 /*0x20*/        PSYCHO_IMAP_SCSI,
 183 /*0x21*/        PSYCHO_IMAP_ETH,
 184 /*0x22*/        PSYCHO_IMAP_BPP,
 185 /*0x23*/        PSYCHO_IMAP_AU_REC,
 186 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 187 /*0x25*/        PSYCHO_IMAP_PFAIL,
 188 /*0x26*/        PSYCHO_IMAP_KMS,
 189 /*0x27*/        PSYCHO_IMAP_FLPY,
 190 /*0x28*/        PSYCHO_IMAP_SHW,
 191 /*0x29*/        PSYCHO_IMAP_KBD,
 192 /*0x2a*/        PSYCHO_IMAP_MS,
 193 /*0x2b*/        PSYCHO_IMAP_SER,
 194 /*0x2c*/        PSYCHO_IMAP_TIM0,
 195 /*0x2d*/        PSYCHO_IMAP_TIM1,
 196 /*0x2e*/        PSYCHO_IMAP_UE,
 197 /*0x2f*/        PSYCHO_IMAP_CE,
 198 /*0x30*/        PSYCHO_IMAP_A_ERR,
 199 /*0x31*/        PSYCHO_IMAP_B_ERR,
 200 /*0x32*/        PSYCHO_IMAP_PMGMT,
 201 /*0x33*/        PSYCHO_IMAP_GFX,
 202 /*0x34*/        PSYCHO_IMAP_EUPA,
 203 };
 204 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 205 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 206 #define psycho_onboard_imap_offset(__ino) \
 207         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 208
 209 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 210 #define PSYCHO_ICLR_SCSI        0x1800UL
 211
 212 #define psycho_iclr_offset(ino)                                       \
 213         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 214                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 215
 216 static unsigned int psycho_irq_build(struct device_node *dp,
 217                                      unsigned int ino,
 218                                      void *_data)
 219 {
 220         unsigned long controller_regs = (unsigned long) _data;
 221         unsigned long imap, iclr;
 222         unsigned long imap_off, iclr_off;
 223         int inofixup = 0;
 224
 225         ino &= 0x3f;
 226         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 227                 /* PCI slot */
 228                 imap_off = psycho_pcislot_imap_offset(ino);
 229         } else {
 230                 /* Onboard device */
 231                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 232                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 233                         prom_halt();
 234                 }
 235                 imap_off = psycho_onboard_imap_offset(ino);
 236         }
 237
 238         /* Now build the IRQ bucket. */
 239         imap = controller_regs + imap_off;
 240
 241         iclr_off = psycho_iclr_offset(ino);
 242         iclr = controller_regs + iclr_off;
 243
 244         if ((ino & 0x20) == 0)
 245                 inofixup = ino & 0x03;
 246
 247         return build_irq(inofixup, iclr, imap);
 248 }
 249
 250 static void __init psycho_irq_trans_init(struct device_node *dp)
 251 {
 252         const struct linux_prom64_registers *regs;
 253
 254         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 255         dp->irq_trans->irq_build = psycho_irq_build;
 256
 257         regs = of_get_property(dp, "reg", NULL);
 258         dp->irq_trans->data = (void *) regs[2].phys_addr;
 259 }
 260
 261 #define sabre_read(__reg) \
 262 ({      u64 __ret; \
 263         __asm__ __volatile__("ldxa [%1] %2, %0" \
 264                              : "=r" (__ret) \
 265                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 266                              : "memory"); \
 267         __ret; \
 268 })
 269
 270 struct sabre_irq_data {
 271         unsigned long controller_regs;
 272         unsigned int pci_first_busno;
 273 };
 274 #define SABRE_CONFIGSPACE       0x001000000UL
 275 #define SABRE_WRSYNC            0x1c20UL
 276
 277 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 278         (CONFIG_SPACE | (1UL << 24))
 279 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 280         (((unsigned long)(BUS)   << 16) |       \
 281          ((unsigned long)(DEVFN) << 8)  |       \
 282          ((unsigned long)(REG)))
 283
 284 /* When a device lives behind a bridge deeper in the PCI bus topology
 285  * than APB, a special sequence must run to make sure all pending DMA
 286  * transfers at the time of IRQ delivery are visible in the coherency
 287  * domain by the cpu.  This sequence is to perform a read on the far
 288  * side of the non-APB bridge, then perform a read of Sabre's DMA
 289  * write-sync register.
 290  */
 291 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 292 {
 293         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 294         struct sabre_irq_data *irq_data = _arg2;
 295         unsigned long controller_regs = irq_data->controller_regs;
 296         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 297         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 298         unsigned int bus, devfn;
 299         u16 _unused;
 300
 301         config_space = SABRE_CONFIG_BASE(config_space);
 302
 303         bus = (phys_hi >> 16) & 0xff;
 304         devfn = (phys_hi >> 8) & 0xff;
 305
 306         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 307
 308         __asm__ __volatile__("membar #Sync\n\t"
 309                              "lduha [%1] %2, %0\n\t"
 310                              "membar #Sync"
 311                              : "=r" (_unused)
 312                              : "r" ((u16 *) config_space),
 313                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 314                              : "memory");
 315
 316         sabre_read(sync_reg);
 317 }
 318
 319 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 320 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 321 #define SABRE_IMAP_SCSI         0x1000UL
 322 #define SABRE_IMAP_ETH          0x1008UL
 323 #define SABRE_IMAP_BPP          0x1010UL
 324 #define SABRE_IMAP_AU_REC       0x1018UL
 325 #define SABRE_IMAP_AU_PLAY      0x1020UL
 326 #define SABRE_IMAP_PFAIL        0x1028UL
 327 #define SABRE_IMAP_KMS          0x1030UL
 328 #define SABRE_IMAP_FLPY         0x1038UL
 329 #define SABRE_IMAP_SHW          0x1040UL
 330 #define SABRE_IMAP_KBD          0x1048UL
 331 #define SABRE_IMAP_MS           0x1050UL
 332 #define SABRE_IMAP_SER          0x1058UL
 333 #define SABRE_IMAP_UE           0x1070UL
 334 #define SABRE_IMAP_CE           0x1078UL
 335 #define SABRE_IMAP_PCIERR       0x1080UL
 336 #define SABRE_IMAP_GFX          0x1098UL
 337 #define SABRE_IMAP_EUPA         0x10a0UL
 338 #define SABRE_ICLR_A_SLOT0      0x1400UL
 339 #define SABRE_ICLR_B_SLOT0      0x1480UL
 340 #define SABRE_ICLR_SCSI         0x1800UL
 341 #define SABRE_ICLR_ETH          0x1808UL
 342 #define SABRE_ICLR_BPP          0x1810UL
 343 #define SABRE_ICLR_AU_REC       0x1818UL
 344 #define SABRE_ICLR_AU_PLAY      0x1820UL
 345 #define SABRE_ICLR_PFAIL        0x1828UL
 346 #define SABRE_ICLR_KMS          0x1830UL
 347 #define SABRE_ICLR_FLPY         0x1838UL
 348 #define SABRE_ICLR_SHW          0x1840UL
 349 #define SABRE_ICLR_KBD          0x1848UL
 350 #define SABRE_ICLR_MS           0x1850UL
 351 #define SABRE_ICLR_SER          0x1858UL
 352 #define SABRE_ICLR_UE           0x1870UL
 353 #define SABRE_ICLR_CE           0x1878UL
 354 #define SABRE_ICLR_PCIERR       0x1880UL
 355
 356 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 357 {
 358         unsigned int bus =  (ino & 0x10) >> 4;
 359         unsigned int slot = (ino & 0x0c) >> 2;
 360
 361         if (bus == 0)
 362                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 363         else
 364                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 365 }
 366
 367 static unsigned long __sabre_onboard_imap_off[] = {
 368 /*0x20*/        SABRE_IMAP_SCSI,
 369 /*0x21*/        SABRE_IMAP_ETH,
 370 /*0x22*/        SABRE_IMAP_BPP,
 371 /*0x23*/        SABRE_IMAP_AU_REC,
 372 /*0x24*/        SABRE_IMAP_AU_PLAY,
 373 /*0x25*/        SABRE_IMAP_PFAIL,
 374 /*0x26*/        SABRE_IMAP_KMS,
 375 /*0x27*/        SABRE_IMAP_FLPY,
 376 /*0x28*/        SABRE_IMAP_SHW,
 377 /*0x29*/        SABRE_IMAP_KBD,
 378 /*0x2a*/        SABRE_IMAP_MS,
 379 /*0x2b*/        SABRE_IMAP_SER,
 380 /*0x2c*/        0 /* reserved */,
 381 /*0x2d*/        0 /* reserved */,
 382 /*0x2e*/        SABRE_IMAP_UE,
 383 /*0x2f*/        SABRE_IMAP_CE,
 384 /*0x30*/        SABRE_IMAP_PCIERR,
 385 /*0x31*/        0 /* reserved */,
 386 /*0x32*/        0 /* reserved */,
 387 /*0x33*/        SABRE_IMAP_GFX,
 388 /*0x34*/        SABRE_IMAP_EUPA,
 389 };
 390 #define SABRE_ONBOARD_IRQ_BASE          0x20
 391 #define SABRE_ONBOARD_IRQ_LAST          0x30
 392 #define sabre_onboard_imap_offset(__ino) \
 393         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 394
 395 #define sabre_iclr_offset(ino)                                        \
 396         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 397                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 398
 399 static int sabre_device_needs_wsync(struct device_node *dp)
 400 {
 401         struct device_node *parent = dp->parent;
 402         const char *parent_model, *parent_compat;
 403
 404         /* This traversal up towards the root is meant to
 405          * handle two cases:
 406          *
 407          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 408          * 2) the PCI controller interrupts themselves, which
 409          *    will use the sabre_irq_build but do not need
 410          *    the DMA synchronization handling
 411          */
 412         while (parent) {
 413                 if (!strcmp(parent->type, "pci"))
 414                         break;
 415                 parent = parent->parent;
 416         }
 417
 418         if (!parent)
 419                 return 0;
 420
 421         parent_model = of_get_property(parent,
 422                                        "model", NULL);
 423         if (parent_model &&
 424             (!strcmp(parent_model, "SUNW,sabre") ||
 425              !strcmp(parent_model, "SUNW,simba")))
 426                 return 0;
 427
 428         parent_compat = of_get_property(parent,
 429                                         "compatible", NULL);
 430         if (parent_compat &&
 431             (!strcmp(parent_compat, "pci108e,a000") ||
 432              !strcmp(parent_compat, "pci108e,a001")))
 433                 return 0;
 434
 435         return 1;
 436 }
 437
 438 static unsigned int sabre_irq_build(struct device_node *dp,
 439                                     unsigned int ino,
 440                                     void *_data)
 441 {
 442         struct sabre_irq_data *irq_data = _data;
 443         unsigned long controller_regs = irq_data->controller_regs;
 444         const struct linux_prom_pci_registers *regs;
 445         unsigned long imap, iclr;
 446         unsigned long imap_off, iclr_off;
 447         int inofixup = 0;
 448         int virt_irq;
 449
 450         ino &= 0x3f;
 451         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 452                 /* PCI slot */
 453                 imap_off = sabre_pcislot_imap_offset(ino);
 454         } else {
 455                 /* onboard device */
 456                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 457                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 458                         prom_halt();
 459                 }
 460                 imap_off = sabre_onboard_imap_offset(ino);
 461         }
 462
 463         /* Now build the IRQ bucket. */
 464         imap = controller_regs + imap_off;
 465
 466         iclr_off = sabre_iclr_offset(ino);
 467         iclr = controller_regs + iclr_off;
 468
 469         if ((ino & 0x20) == 0)
 470                 inofixup = ino & 0x03;
 471
 472         virt_irq = build_irq(inofixup, iclr, imap);
 473
 474         /* If the parent device is a PCI<->PCI bridge other than
 475          * APB, we have to install a pre-handler to ensure that
 476          * all pending DMA is drained before the interrupt handler
 477          * is run.
 478          */
 479         regs = of_get_property(dp, "reg", NULL);
 480         if (regs && sabre_device_needs_wsync(dp)) {
 481                 irq_install_pre_handler(virt_irq,
 482                                         sabre_wsync_handler,
 483                                         (void *) (long) regs->phys_hi,
 484                                         (void *) irq_data);
 485         }
 486
 487         return virt_irq;
 488 }
 489
 490 static void __init sabre_irq_trans_init(struct device_node *dp)
 491 {
 492         const struct linux_prom64_registers *regs;
 493         struct sabre_irq_data *irq_data;
 494         const u32 *busrange;
 495
 496         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 497         dp->irq_trans->irq_build = sabre_irq_build;
 498
 499         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 500
 501         regs = of_get_property(dp, "reg", NULL);
 502         irq_data->controller_regs = regs[0].phys_addr;
 503
 504         busrange = of_get_property(dp, "bus-range", NULL);
 505         irq_data->pci_first_busno = busrange[0];
 506
 507         dp->irq_trans->data = irq_data;
 508 }
 509
 510 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 511  * imap/iclr registers are per-PBM.
 512  */
 513 #define SCHIZO_IMAP_BASE        0x1000UL
 514 #define SCHIZO_ICLR_BASE        0x1400UL
 515
 516 static unsigned long schizo_imap_offset(unsigned long ino)
 517 {
 518         return SCHIZO_IMAP_BASE + (ino * 8UL);
 519 }
 520
 521 static unsigned long schizo_iclr_offset(unsigned long ino)
 522 {
 523         return SCHIZO_ICLR_BASE + (ino * 8UL);
 524 }
 525
 526 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 527                                         unsigned int ino)
 528 {
 529
 530         return pbm_regs + schizo_iclr_offset(ino);
 531 }
 532
 533 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 534                                         unsigned int ino)
 535 {
 536         return pbm_regs + schizo_imap_offset(ino);
 537 }
 538
 539 #define schizo_read(__reg) \
 540 ({      u64 __ret; \
 541         __asm__ __volatile__("ldxa [%1] %2, %0" \
 542                              : "=r" (__ret) \
 543                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 544                              : "memory"); \
 545         __ret; \
 546 })
 547 #define schizo_write(__reg, __val) \
 548         __asm__ __volatile__("stxa %0, [%1] %2" \
 549                              : /* no outputs */ \
 550                              : "r" (__val), "r" (__reg), \
 551                                "i" (ASI_PHYS_BYPASS_EC_E) \
 552                              : "memory")
 553
 554 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 555 {
 556         unsigned long sync_reg = (unsigned long) _arg2;
 557         u64 mask = 1UL << (ino & IMAP_INO);
 558         u64 val;
 559         int limit;
 560
 561         schizo_write(sync_reg, mask);
 562
 563         limit = 100000;
 564         val = 0;
 565         while (--limit) {
 566                 val = schizo_read(sync_reg);
 567                 if (!(val & mask))
 568                         break;
 569         }
 570         if (limit <= 0) {
 571                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 572                        val, mask);
 573         }
 574
 575         if (_arg1) {
 576                 static unsigned char cacheline[64]
 577                         __attribute__ ((aligned (64)));
 578
 579                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 580                                      "or %0, %4, %1\n\t"
 581                                      "wr %1, 0x0, %%fprs\n\t"
 582                                      "stda %%f0, [%5] %6\n\t"
 583                                      "wr %0, 0x0, %%fprs\n\t"
 584                                      "membar #Sync"
 585                                      : "=&r" (mask), "=&r" (val)
 586                                      : "0" (mask), "1" (val),
 587                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 588                                      "i" (ASI_BLK_COMMIT_P));
 589         }
 590 }
 591
 592 struct schizo_irq_data {
 593         unsigned long pbm_regs;
 594         unsigned long sync_reg;
 595         u32 portid;
 596         int chip_version;
 597 };
 598
 599 static unsigned int schizo_irq_build(struct device_node *dp,
 600                                      unsigned int ino,
 601                                      void *_data)
 602 {
 603         struct schizo_irq_data *irq_data = _data;
 604         unsigned long pbm_regs = irq_data->pbm_regs;
 605         unsigned long imap, iclr;
 606         int ign_fixup;
 607         int virt_irq;
 608         int is_tomatillo;
 609
 610         ino &= 0x3f;
 611
 612         /* Now build the IRQ bucket. */
 613         imap = schizo_ino_to_imap(pbm_regs, ino);
 614         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 615
 616         /* On Schizo, no inofixup occurs.  This is because each
 617          * INO has it's own IMAP register.  On Psycho and Sabre
 618          * there is only one IMAP register for each PCI slot even
 619          * though four different INOs can be generated by each
 620          * PCI slot.
 621          *
 622          * But, for JBUS variants (essentially, Tomatillo), we have
 623          * to fixup the lowest bit of the interrupt group number.
 624          */
 625         ign_fixup = 0;
 626
 627         is_tomatillo = (irq_data->sync_reg != 0UL);
 628
 629         if (is_tomatillo) {
 630                 if (irq_data->portid & 1)
 631                         ign_fixup = (1 << 6);
 632         }
 633
 634         virt_irq = build_irq(ign_fixup, iclr, imap);
 635
 636         if (is_tomatillo) {
 637                 irq_install_pre_handler(virt_irq,
 638                                         tomatillo_wsync_handler,
 639                                         ((irq_data->chip_version <= 4) ?
 640                                          (void *) 1 : (void *) 0),
 641                                         (void *) irq_data->sync_reg);
 642         }
 643
 644         return virt_irq;
 645 }
 646
 647 static void __init __schizo_irq_trans_init(struct device_node *dp,
 648                                            int is_tomatillo)
 649 {
 650         const struct linux_prom64_registers *regs;
 651         struct schizo_irq_data *irq_data;
 652
 653         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 654         dp->irq_trans->irq_build = schizo_irq_build;
 655
 656         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 657
 658         regs = of_get_property(dp, "reg", NULL);
 659         dp->irq_trans->data = irq_data;
 660
 661         irq_data->pbm_regs = regs[0].phys_addr;
 662         if (is_tomatillo)
 663                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 664         else
 665                 irq_data->sync_reg = 0UL;
 666         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 667         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 668 }
 669
 670 static void __init schizo_irq_trans_init(struct device_node *dp)
 671 {
 672         __schizo_irq_trans_init(dp, 0);
 673 }
 674
 675 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 676 {
 677         __schizo_irq_trans_init(dp, 1);
 678 }
 679
 680 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 681                                         unsigned int devino,
 682                                         void *_data)
 683 {
 684         u32 devhandle = (u32) (unsigned long) _data;
 685
 686         return sun4v_build_irq(devhandle, devino);
 687 }
 688
 689 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 690 {
 691         const struct linux_prom64_registers *regs;
 692
 693         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 694         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 695
 696         regs = of_get_property(dp, "reg", NULL);
 697         dp->irq_trans->data = (void *) (unsigned long)
 698                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 699 }
 700
 701 struct fire_irq_data {
 702         unsigned long pbm_regs;
 703         u32 portid;
 704 };
 705
 706 #define FIRE_IMAP_BASE  0x001000
 707 #define FIRE_ICLR_BASE  0x001400
 708
 709 static unsigned long fire_imap_offset(unsigned long ino)
 710 {
 711         return FIRE_IMAP_BASE + (ino * 8UL);
 712 }
 713
 714 static unsigned long fire_iclr_offset(unsigned long ino)
 715 {
 716         return FIRE_ICLR_BASE + (ino * 8UL);
 717 }
 718
 719 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 720                                             unsigned int ino)
 721 {
 722         return pbm_regs + fire_iclr_offset(ino);
 723 }
 724
 725 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 726                                             unsigned int ino)
 727 {
 728         return pbm_regs + fire_imap_offset(ino);
 729 }
 730
 731 static unsigned int fire_irq_build(struct device_node *dp,
 732                                          unsigned int ino,
 733                                          void *_data)
 734 {
 735         struct fire_irq_data *irq_data = _data;
 736         unsigned long pbm_regs = irq_data->pbm_regs;
 737         unsigned long imap, iclr;
 738         unsigned long int_ctrlr;
 739
 740         ino &= 0x3f;
 741
 742         /* Now build the IRQ bucket. */
 743         imap = fire_ino_to_imap(pbm_regs, ino);
 744         iclr = fire_ino_to_iclr(pbm_regs, ino);
 745
 746         /* Set the interrupt controller number.  */
 747         int_ctrlr = 1 << 6;
 748         upa_writeq(int_ctrlr, imap);
 749
 750         /* The interrupt map registers do not have an INO field
 751          * like other chips do.  They return zero in the INO
 752          * field, and the interrupt controller number is controlled
 753          * in bits 6 to 9.  So in order for build_irq() to get
 754          * the INO right we pass it in as part of the fixup
 755          * which will get added to the map register zero value
 756          * read by build_irq().
 757          */
 758         ino |= (irq_data->portid << 6);
 759         ino -= int_ctrlr;
 760         return build_irq(ino, iclr, imap);
 761 }
 762
 763 static void __init fire_irq_trans_init(struct device_node *dp)
 764 {
 765         const struct linux_prom64_registers *regs;
 766         struct fire_irq_data *irq_data;
 767
 768         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 769         dp->irq_trans->irq_build = fire_irq_build;
 770
 771         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 772
 773         regs = of_get_property(dp, "reg", NULL);
 774         dp->irq_trans->data = irq_data;
 775
 776         irq_data->pbm_regs = regs[0].phys_addr;
 777         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 778 }
 779 #endif /* CONFIG_PCI */
 780
 781 #ifdef CONFIG_SBUS
 782 /* INO number to IMAP register offset for SYSIO external IRQ's.
 783  * This should conform to both Sunfire/Wildfire server and Fusion
 784  * desktop designs.
 785  */
 786 #define SYSIO_IMAP_SLOT0        0x2c00UL
 787 #define SYSIO_IMAP_SLOT1        0x2c08UL
 788 #define SYSIO_IMAP_SLOT2        0x2c10UL
 789 #define SYSIO_IMAP_SLOT3        0x2c18UL
 790 #define SYSIO_IMAP_SCSI         0x3000UL
 791 #define SYSIO_IMAP_ETH          0x3008UL
 792 #define SYSIO_IMAP_BPP          0x3010UL
 793 #define SYSIO_IMAP_AUDIO        0x3018UL
 794 #define SYSIO_IMAP_PFAIL        0x3020UL
 795 #define SYSIO_IMAP_KMS          0x3028UL
 796 #define SYSIO_IMAP_FLPY         0x3030UL
 797 #define SYSIO_IMAP_SHW          0x3038UL
 798 #define SYSIO_IMAP_KBD          0x3040UL
 799 #define SYSIO_IMAP_MS           0x3048UL
 800 #define SYSIO_IMAP_SER          0x3050UL
 801 #define SYSIO_IMAP_TIM0         0x3060UL
 802 #define SYSIO_IMAP_TIM1         0x3068UL
 803 #define SYSIO_IMAP_UE           0x3070UL
 804 #define SYSIO_IMAP_CE           0x3078UL
 805 #define SYSIO_IMAP_SBERR        0x3080UL
 806 #define SYSIO_IMAP_PMGMT        0x3088UL
 807 #define SYSIO_IMAP_GFX          0x3090UL
 808 #define SYSIO_IMAP_EUPA         0x3098UL
 809
 810 #define bogon     ((unsigned long) -1)
 811 static unsigned long sysio_irq_offsets[] = {
 812         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 813         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 814         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 815         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 816         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 817         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 818         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 819         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 820         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 821
 822         /* Onboard devices (not relevant/used on SunFire). */
 823         SYSIO_IMAP_SCSI,
 824         SYSIO_IMAP_ETH,
 825         SYSIO_IMAP_BPP,
 826         bogon,
 827         SYSIO_IMAP_AUDIO,
 828         SYSIO_IMAP_PFAIL,
 829         bogon,
 830         bogon,
 831         SYSIO_IMAP_KMS,
 832         SYSIO_IMAP_FLPY,
 833         SYSIO_IMAP_SHW,
 834         SYSIO_IMAP_KBD,
 835         SYSIO_IMAP_MS,
 836         SYSIO_IMAP_SER,
 837         bogon,
 838         bogon,
 839         SYSIO_IMAP_TIM0,
 840         SYSIO_IMAP_TIM1,
 841         bogon,
 842         bogon,
 843         SYSIO_IMAP_UE,
 844         SYSIO_IMAP_CE,
 845         SYSIO_IMAP_SBERR,
 846         SYSIO_IMAP_PMGMT,
 847         SYSIO_IMAP_GFX,
 848         SYSIO_IMAP_EUPA,
 849 };
 850
 851 #undef bogon
 852
 853 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 854
 855 /* Convert Interrupt Mapping register pointer to associated
 856  * Interrupt Clear register pointer, SYSIO specific version.
 857  */
 858 #define SYSIO_ICLR_UNUSED0      0x3400UL
 859 #define SYSIO_ICLR_SLOT0        0x3408UL
 860 #define SYSIO_ICLR_SLOT1        0x3448UL
 861 #define SYSIO_ICLR_SLOT2        0x3488UL
 862 #define SYSIO_ICLR_SLOT3        0x34c8UL
 863 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 864 {
 865         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 866         return imap + diff;
 867 }
 868
 869 static unsigned int sbus_of_build_irq(struct device_node *dp,
 870                                       unsigned int ino,
 871                                       void *_data)
 872 {
 873         unsigned long reg_base = (unsigned long) _data;
 874         const struct linux_prom_registers *regs;
 875         unsigned long imap, iclr;
 876         int sbus_slot = 0;
 877         int sbus_level = 0;
 878
 879         ino &= 0x3f;
 880
 881         regs = of_get_property(dp, "reg", NULL);
 882         if (regs)
 883                 sbus_slot = regs->which_io;
 884
 885         if (ino < 0x20)
 886                 ino += (sbus_slot * 8);
 887
 888         imap = sysio_irq_offsets[ino];
 889         if (imap == ((unsigned long)-1)) {
 890                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 891                             ino);
 892                 prom_halt();
 893         }
 894         imap += reg_base;
 895
 896         /* SYSIO inconsistency.  For external SLOTS, we have to select
 897          * the right ICLR register based upon the lower SBUS irq level
 898          * bits.
 899          */
 900         if (ino >= 0x20) {
 901                 iclr = sysio_imap_to_iclr(imap);
 902         } else {
 903                 sbus_level = ino & 0x7;
 904
 905                 switch(sbus_slot) {
 906                 case 0:
 907                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 908                         break;
 909                 case 1:
 910                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 911                         break;
 912                 case 2:
 913                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 914                         break;
 915                 default:
 916                 case 3:
 917                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 918                         break;
 919                 };
 920
 921                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 922         }
 923         return build_irq(sbus_level, iclr, imap);
 924 }
 925
 926 static void __init sbus_irq_trans_init(struct device_node *dp)
 927 {
 928         const struct linux_prom64_registers *regs;
 929
 930         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 931         dp->irq_trans->irq_build = sbus_of_build_irq;
 932
 933         regs = of_get_property(dp, "reg", NULL);
 934         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
 935 }
 936 #endif /* CONFIG_SBUS */
 937
 938
 939 static unsigned int central_build_irq(struct device_node *dp,
 940                                       unsigned int ino,
 941                                       void *_data)
 942 {
 943         struct device_node *central_dp = _data;
 944         struct of_device *central_op = of_find_device_by_node(central_dp);
 945         struct resource *res;
 946         unsigned long imap, iclr;
 947         u32 tmp;
 948
 949         if (!strcmp(dp->name, "eeprom")) {
 950                 res = &central_op->resource[5];
 951         } else if (!strcmp(dp->name, "zs")) {
 952                 res = &central_op->resource[4];
 953         } else if (!strcmp(dp->name, "clock-board")) {
 954                 res = &central_op->resource[3];
 955         } else {
 956                 return ino;
 957         }
 958
 959         imap = res->start + 0x00UL;
 960         iclr = res->start + 0x10UL;
 961
 962         /* Set the INO state to idle, and disable.  */
 963         upa_writel(0, iclr);
 964         upa_readl(iclr);
 965
 966         tmp = upa_readl(imap);
 967         tmp &= ~0x80000000;
 968         upa_writel(tmp, imap);
 969
 970         return build_irq(0, iclr, imap);
 971 }
 972
 973 static void __init central_irq_trans_init(struct device_node *dp)
 974 {
 975         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 976         dp->irq_trans->irq_build = central_build_irq;
 977
 978         dp->irq_trans->data = dp;
 979 }
 980
 981 struct irq_trans {
 982         const char *name;
 983         void (*init)(struct device_node *);
 984 };
 985
 986 #ifdef CONFIG_PCI
 987 static struct irq_trans __initdata pci_irq_trans_table[] = {
 988         { "SUNW,sabre", sabre_irq_trans_init },
 989         { "pci108e,a000", sabre_irq_trans_init },
 990         { "pci108e,a001", sabre_irq_trans_init },
 991         { "SUNW,psycho", psycho_irq_trans_init },
 992         { "pci108e,8000", psycho_irq_trans_init },
 993         { "SUNW,schizo", schizo_irq_trans_init },
 994         { "pci108e,8001", schizo_irq_trans_init },
 995         { "SUNW,schizo+", schizo_irq_trans_init },
 996         { "pci108e,8002", schizo_irq_trans_init },
 997         { "SUNW,tomatillo", tomatillo_irq_trans_init },
 998         { "pci108e,a801", tomatillo_irq_trans_init },
 999         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1000         { "pciex108e,80f0", fire_irq_trans_init },
1001 };
1002 #endif
1003
1004 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1005                                          unsigned int devino,
1006                                          void *_data)
1007 {
1008         u32 devhandle = (u32) (unsigned long) _data;
1009
1010         return sun4v_build_irq(devhandle, devino);
1011 }
1012
1013 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1014 {
1015         const struct linux_prom64_registers *regs;
1016
1017         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1018         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1019
1020         regs = of_get_property(dp, "reg", NULL);
1021         dp->irq_trans->data = (void *) (unsigned long)
1022                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1023 }
1024
1025 static void __init irq_trans_init(struct device_node *dp)
1026 {
1027 #ifdef CONFIG_PCI
1028         const char *model;
1029         int i;
1030 #endif
1031
1032 #ifdef CONFIG_PCI
1033         model = of_get_property(dp, "model", NULL);
1034         if (!model)
1035                 model = of_get_property(dp, "compatible", NULL);
1036         if (model) {
1037                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1038                         struct irq_trans *t = &pci_irq_trans_table[i];
1039
1040                         if (!strcmp(model, t->name))
1041                                 return t->init(dp);
1042                 }
1043         }
1044 #endif
1045 #ifdef CONFIG_SBUS
1046         if (!strcmp(dp->name, "sbus") ||
1047             !strcmp(dp->name, "sbi"))
1048                 return sbus_irq_trans_init(dp);
1049 #endif
1050         if (!strcmp(dp->name, "fhc") &&
1051             !strcmp(dp->parent->name, "central"))
1052                 return central_irq_trans_init(dp);
1053         if (!strcmp(dp->name, "virtual-devices") ||
1054             !strcmp(dp->name, "niu"))
1055                 return sun4v_vdev_irq_trans_init(dp);
1056 }
1057
1058 static int is_root_node(const struct device_node *dp)
1059 {
1060         if (!dp)
1061                 return 0;
1062
1063         return (dp->parent == NULL);
1064 }
1065
1066 /* The following routines deal with the black magic of fully naming a
1067  * node.
1068  *
1069  * Certain well known named nodes are just the simple name string.
1070  *
1071  * Actual devices have an address specifier appended to the base name
1072  * string, like this "foo@addr".  The "addr" can be in any number of
1073  * formats, and the platform plus the type of the node determine the
1074  * format and how it is constructed.
1075  *
1076  * For children of the ROOT node, the naming convention is fixed and
1077  * determined by whether this is a sun4u or sun4v system.
1078  *
1079  * For children of other nodes, it is bus type specific.  So
1080  * we walk up the tree until we discover a "device_type" property
1081  * we recognize and we go from there.
1082  *
1083  * As an example, the boot device on my workstation has a full path:
1084  *
1085  *      /pci@1e,600000/ide@d/disk@0,0:c
1086  */
1087 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1088 {
1089         struct linux_prom64_registers *regs;
1090         struct property *rprop;
1091         u32 high_bits, low_bits, type;
1092
1093         rprop = of_find_property(dp, "reg", NULL);
1094         if (!rprop)
1095                 return;
1096
1097         regs = rprop->value;
1098         if (!is_root_node(dp->parent)) {
1099                 sprintf(tmp_buf, "%s@%x,%x",
1100                         dp->name,
1101                         (unsigned int) (regs->phys_addr >> 32UL),
1102                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1103                 return;
1104         }
1105
1106         type = regs->phys_addr >> 60UL;
1107         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1108         low_bits = (regs->phys_addr & 0xffffffffUL);
1109
1110         if (type == 0 || type == 8) {
1111                 const char *prefix = (type == 0) ? "m" : "i";
1112
1113                 if (low_bits)
1114                         sprintf(tmp_buf, "%s@%s%x,%x",
1115                                 dp->name, prefix,
1116                                 high_bits, low_bits);
1117                 else
1118                         sprintf(tmp_buf, "%s@%s%x",
1119                                 dp->name,
1120                                 prefix,
1121                                 high_bits);
1122         } else if (type == 12) {
1123                 sprintf(tmp_buf, "%s@%x",
1124                         dp->name, high_bits);
1125         }
1126 }
1127
1128 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1129 {
1130         struct linux_prom64_registers *regs;
1131         struct property *prop;
1132
1133         prop = of_find_property(dp, "reg", NULL);
1134         if (!prop)
1135                 return;
1136
1137         regs = prop->value;
1138         if (!is_root_node(dp->parent)) {
1139                 sprintf(tmp_buf, "%s@%x,%x",
1140                         dp->name,
1141                         (unsigned int) (regs->phys_addr >> 32UL),
1142                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1143                 return;
1144         }
1145
1146         prop = of_find_property(dp, "upa-portid", NULL);
1147         if (!prop)
1148                 prop = of_find_property(dp, "portid", NULL);
1149         if (prop) {
1150                 unsigned long mask = 0xffffffffUL;
1151
1152                 if (tlb_type >= cheetah)
1153                         mask = 0x7fffff;
1154
1155                 sprintf(tmp_buf, "%s@%x,%x",
1156                         dp->name,
1157                         *(u32 *)prop->value,
1158                         (unsigned int) (regs->phys_addr & mask));
1159         }
1160 }
1161
1162 /* "name@slot,offset"  */
1163 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1164 {
1165         struct linux_prom_registers *regs;
1166         struct property *prop;
1167
1168         prop = of_find_property(dp, "reg", NULL);
1169         if (!prop)
1170                 return;
1171
1172         regs = prop->value;
1173         sprintf(tmp_buf, "%s@%x,%x",
1174                 dp->name,
1175                 regs->which_io,
1176                 regs->phys_addr);
1177 }
1178
1179 /* "name@devnum[,func]" */
1180 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1181 {
1182         struct linux_prom_pci_registers *regs;
1183         struct property *prop;
1184         unsigned int devfn;
1185
1186         prop = of_find_property(dp, "reg", NULL);
1187         if (!prop)
1188                 return;
1189
1190         regs = prop->value;
1191         devfn = (regs->phys_hi >> 8) & 0xff;
1192         if (devfn & 0x07) {
1193                 sprintf(tmp_buf, "%s@%x,%x",
1194                         dp->name,
1195                         devfn >> 3,
1196                         devfn & 0x07);
1197         } else {
1198                 sprintf(tmp_buf, "%s@%x",
1199                         dp->name,
1200                         devfn >> 3);
1201         }
1202 }
1203
1204 /* "name@UPA_PORTID,offset" */
1205 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1206 {
1207         struct linux_prom64_registers *regs;
1208         struct property *prop;
1209
1210         prop = of_find_property(dp, "reg", NULL);
1211         if (!prop)
1212                 return;
1213
1214         regs = prop->value;
1215
1216         prop = of_find_property(dp, "upa-portid", NULL);
1217         if (!prop)
1218                 return;
1219
1220         sprintf(tmp_buf, "%s@%x,%x",
1221                 dp->name,
1222                 *(u32 *) prop->value,
1223                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1224 }
1225
1226 /* "name@reg" */
1227 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1228 {
1229         struct property *prop;
1230         u32 *regs;
1231
1232         prop = of_find_property(dp, "reg", NULL);
1233         if (!prop)
1234                 return;
1235
1236         regs = prop->value;
1237
1238         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1239 }
1240
1241 /* "name@addrhi,addrlo" */
1242 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1243 {
1244         struct linux_prom64_registers *regs;
1245         struct property *prop;
1246
1247         prop = of_find_property(dp, "reg", NULL);
1248         if (!prop)
1249                 return;
1250
1251         regs = prop->value;
1252
1253         sprintf(tmp_buf, "%s@%x,%x",
1254                 dp->name,
1255                 (unsigned int) (regs->phys_addr >> 32UL),
1256                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1257 }
1258
1259 /* "name@bus,addr" */
1260 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1261 {
1262         struct property *prop;
1263         u32 *regs;
1264
1265         prop = of_find_property(dp, "reg", NULL);
1266         if (!prop)
1267                 return;
1268
1269         regs = prop->value;
1270
1271         /* This actually isn't right... should look at the #address-cells
1272          * property of the i2c bus node etc. etc.
1273          */
1274         sprintf(tmp_buf, "%s@%x,%x",
1275                 dp->name, regs[0], regs[1]);
1276 }
1277
1278 /* "name@reg0[,reg1]" */
1279 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1280 {
1281         struct property *prop;
1282         u32 *regs;
1283
1284         prop = of_find_property(dp, "reg", NULL);
1285         if (!prop)
1286                 return;
1287
1288         regs = prop->value;
1289
1290         if (prop->length == sizeof(u32) || regs[1] == 1) {
1291                 sprintf(tmp_buf, "%s@%x",
1292                         dp->name, regs[0]);
1293         } else {
1294                 sprintf(tmp_buf, "%s@%x,%x",
1295                         dp->name, regs[0], regs[1]);
1296         }
1297 }
1298
1299 /* "name@reg0reg1[,reg2reg3]" */
1300 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1301 {
1302         struct property *prop;
1303         u32 *regs;
1304
1305         prop = of_find_property(dp, "reg", NULL);
1306         if (!prop)
1307                 return;
1308
1309         regs = prop->value;
1310
1311         if (regs[2] || regs[3]) {
1312                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1313                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1314         } else {
1315                 sprintf(tmp_buf, "%s@%08x%08x",
1316                         dp->name, regs[0], regs[1]);
1317         }
1318 }
1319
1320 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1321 {
1322         struct device_node *parent = dp->parent;
1323
1324         if (parent != NULL) {
1325                 if (!strcmp(parent->type, "pci") ||
1326                     !strcmp(parent->type, "pciex"))
1327                         return pci_path_component(dp, tmp_buf);
1328                 if (!strcmp(parent->type, "sbus"))
1329                         return sbus_path_component(dp, tmp_buf);
1330                 if (!strcmp(parent->type, "upa"))
1331                         return upa_path_component(dp, tmp_buf);
1332                 if (!strcmp(parent->type, "ebus"))
1333                         return ebus_path_component(dp, tmp_buf);
1334                 if (!strcmp(parent->name, "usb") ||
1335                     !strcmp(parent->name, "hub"))
1336                         return usb_path_component(dp, tmp_buf);
1337                 if (!strcmp(parent->type, "i2c"))
1338                         return i2c_path_component(dp, tmp_buf);
1339                 if (!strcmp(parent->type, "firewire"))
1340                         return ieee1394_path_component(dp, tmp_buf);
1341                 if (!strcmp(parent->type, "virtual-devices"))
1342                         return vdev_path_component(dp, tmp_buf);
1343
1344                 /* "isa" is handled with platform naming */
1345         }
1346
1347         /* Use platform naming convention.  */
1348         if (tlb_type == hypervisor)
1349                 return sun4v_path_component(dp, tmp_buf);
1350         else
1351                 return sun4u_path_component(dp, tmp_buf);
1352 }
1353
1354 static char * __init build_path_component(struct device_node *dp)
1355 {
1356         char tmp_buf[64], *n;
1357
1358         tmp_buf[0] = '\0';
1359         __build_path_component(dp, tmp_buf);
1360         if (tmp_buf[0] == '\0')
1361                 strcpy(tmp_buf, dp->name);
1362
1363         n = prom_early_alloc(strlen(tmp_buf) + 1);
1364         strcpy(n, tmp_buf);
1365
1366         return n;
1367 }
1368
1369 static char * __init build_full_name(struct device_node *dp)
1370 {
1371         int len, ourlen, plen;
1372         char *n;
1373
1374         plen = strlen(dp->parent->full_name);
1375         ourlen = strlen(dp->path_component_name);
1376         len = ourlen + plen + 2;
1377
1378         n = prom_early_alloc(len);
1379         strcpy(n, dp->parent->full_name);
1380         if (!is_root_node(dp->parent)) {
1381                 strcpy(n + plen, "/");
1382                 plen++;
1383         }
1384         strcpy(n + plen, dp->path_component_name);
1385
1386         return n;
1387 }
1388
1389 static unsigned int unique_id;
1390
1391 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1392 {
1393         static struct property *tmp = NULL;
1394         struct property *p;
1395
1396         if (tmp) {
1397                 p = tmp;
1398                 memset(p, 0, sizeof(*p) + 32);
1399                 tmp = NULL;
1400         } else {
1401                 p = prom_early_alloc(sizeof(struct property) + 32);
1402                 p->unique_id = unique_id++;
1403         }
1404
1405         p->name = (char *) (p + 1);
1406         if (special_name) {
1407                 strcpy(p->name, special_name);
1408                 p->length = special_len;
1409                 p->value = prom_early_alloc(special_len);
1410                 memcpy(p->value, special_val, special_len);
1411         } else {
1412                 if (prev == NULL) {
1413                         prom_firstprop(node, p->name);
1414                 } else {
1415                         prom_nextprop(node, prev, p->name);
1416                 }
1417                 if (strlen(p->name) == 0) {
1418                         tmp = p;
1419                         return NULL;
1420                 }
1421                 p->length = prom_getproplen(node, p->name);
1422                 if (p->length <= 0) {
1423                         p->length = 0;
1424                 } else {
1425                         p->value = prom_early_alloc(p->length + 1);
1426                         prom_getproperty(node, p->name, p->value, p->length);
1427                         ((unsigned char *)p->value)[p->length] = '\0';
1428                 }
1429         }
1430         return p;
1431 }
1432
1433 static struct property * __init build_prop_list(phandle node)
1434 {
1435         struct property *head, *tail;
1436
1437         head = tail = build_one_prop(node, NULL,
1438                                      ".node", &node, sizeof(node));
1439
1440         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1441         tail = tail->next;
1442         while(tail) {
1443                 tail->next = build_one_prop(node, tail->name,
1444                                             NULL, NULL, 0);
1445                 tail = tail->next;
1446         }
1447
1448         return head;
1449 }
1450
1451 static char * __init get_one_property(phandle node, const char *name)
1452 {
1453         char *buf = "<NULL>";
1454         int len;
1455
1456         len = prom_getproplen(node, name);
1457         if (len > 0) {
1458                 buf = prom_early_alloc(len);
1459                 prom_getproperty(node, name, buf, len);
1460         }
1461
1462         return buf;
1463 }
1464
1465 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1466 {
1467         struct device_node *dp;
1468
1469         if (!node)
1470                 return NULL;
1471
1472         dp = prom_early_alloc(sizeof(*dp));
1473         dp->unique_id = unique_id++;
1474         dp->parent = parent;
1475
1476         kref_init(&dp->kref);
1477
1478         dp->name = get_one_property(node, "name");
1479         dp->type = get_one_property(node, "device_type");
1480         dp->node = node;
1481
1482         dp->properties = build_prop_list(node);
1483
1484         irq_trans_init(dp);
1485
1486         return dp;
1487 }
1488
1489 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1490 {
1491         struct device_node *ret = NULL, *prev_sibling = NULL;
1492         struct device_node *dp;
1493
1494         while (1) {
1495                 dp = create_node(node, parent);
1496                 if (!dp)
1497                         break;
1498
1499                 if (prev_sibling)
1500                         prev_sibling->sibling = dp;
1501
1502                 if (!ret)
1503                         ret = dp;
1504                 prev_sibling = dp;
1505
1506                 *(*nextp) = dp;
1507                 *nextp = &dp->allnext;
1508
1509                 dp->path_component_name = build_path_component(dp);
1510                 dp->full_name = build_full_name(dp);
1511
1512                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1513
1514                 node = prom_getsibling(node);
1515         }
1516
1517         return ret;
1518 }
1519
1520 static const char *get_mid_prop(void)
1521 {
1522         return (tlb_type == spitfire ? "upa-portid" : "portid");
1523 }
1524
1525 struct device_node *of_find_node_by_cpuid(int cpuid)
1526 {
1527         struct device_node *dp;
1528         const char *mid_prop = get_mid_prop();
1529
1530         for_each_node_by_type(dp, "cpu") {
1531                 int id = of_getintprop_default(dp, mid_prop, -1);
1532                 const char *this_mid_prop = mid_prop;
1533
1534                 if (id < 0) {
1535                         this_mid_prop = "cpuid";
1536                         id = of_getintprop_default(dp, this_mid_prop, -1);
1537                 }
1538
1539                 if (id < 0) {
1540                         prom_printf("OF: Serious problem, cpu lacks "
1541                                     "%s property", this_mid_prop);
1542                         prom_halt();
1543                 }
1544                 if (cpuid == id)
1545                         return dp;
1546         }
1547         return NULL;
1548 }
1549
1550 static void __init of_fill_in_cpu_data(void)
1551 {
1552         struct device_node *dp;
1553         const char *mid_prop = get_mid_prop();
1554
1555         ncpus_probed = 0;
1556         for_each_node_by_type(dp, "cpu") {
1557                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1558                 const char *this_mid_prop = mid_prop;
1559                 struct device_node *portid_parent;
1560                 int portid = -1;
1561
1562                 portid_parent = NULL;
1563                 if (cpuid < 0) {
1564                         this_mid_prop = "cpuid";
1565                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1566                         if (cpuid >= 0) {
1567                                 int limit = 2;
1568
1569                                 portid_parent = dp;
1570                                 while (limit--) {
1571                                         portid_parent = portid_parent->parent;
1572                                         if (!portid_parent)
1573                                                 break;
1574                                         portid = of_getintprop_default(portid_parent,
1575                                                                        "portid", -1);
1576                                         if (portid >= 0)
1577                                                 break;
1578                                 }
1579                         }
1580                 }
1581
1582                 if (cpuid < 0) {
1583                         prom_printf("OF: Serious problem, cpu lacks "
1584                                     "%s property", this_mid_prop);
1585                         prom_halt();
1586                 }
1587
1588                 ncpus_probed++;
1589
1590 #ifdef CONFIG_SMP
1591                 if (cpuid >= NR_CPUS) {
1592                         printk(KERN_WARNING "Ignoring CPU %d which is "
1593                                ">= NR_CPUS (%d)\n",
1594                                cpuid, NR_CPUS);
1595                         continue;
1596                 }
1597 #else
1598                 /* On uniprocessor we only want the values for the
1599                  * real physical cpu the kernel booted onto, however
1600                  * cpu_data() only has one entry at index 0.
1601                  */
1602                 if (cpuid != real_hard_smp_processor_id())
1603                         continue;
1604                 cpuid = 0;
1605 #endif
1606
1607                 cpu_data(cpuid).clock_tick =
1608                         of_getintprop_default(dp, "clock-frequency", 0);
1609
1610                 if (portid_parent) {
1611                         cpu_data(cpuid).dcache_size =
1612                                 of_getintprop_default(dp, "l1-dcache-size",
1613                                                       16 * 1024);
1614                         cpu_data(cpuid).dcache_line_size =
1615                                 of_getintprop_default(dp, "l1-dcache-line-size",
1616                                                       32);
1617                         cpu_data(cpuid).icache_size =
1618                                 of_getintprop_default(dp, "l1-icache-size",
1619                                                       8 * 1024);
1620                         cpu_data(cpuid).icache_line_size =
1621                                 of_getintprop_default(dp, "l1-icache-line-size",
1622                                                       32);
1623                         cpu_data(cpuid).ecache_size =
1624                                 of_getintprop_default(dp, "l2-cache-size", 0);
1625                         cpu_data(cpuid).ecache_line_size =
1626                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1627                         if (!cpu_data(cpuid).ecache_size ||
1628                             !cpu_data(cpuid).ecache_line_size) {
1629                                 cpu_data(cpuid).ecache_size =
1630                                         of_getintprop_default(portid_parent,
1631                                                               "l2-cache-size",
1632                                                               (4 * 1024 * 1024));
1633                                 cpu_data(cpuid).ecache_line_size =
1634                                         of_getintprop_default(portid_parent,
1635                                                               "l2-cache-line-size", 64);
1636                         }
1637
1638                         cpu_data(cpuid).core_id = portid + 1;
1639                         cpu_data(cpuid).proc_id = portid;
1640 #ifdef CONFIG_SMP
1641                         sparc64_multi_core = 1;
1642 #endif
1643                 } else {
1644                         cpu_data(cpuid).dcache_size =
1645                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1646                         cpu_data(cpuid).dcache_line_size =
1647                                 of_getintprop_default(dp, "dcache-line-size", 32);
1648
1649                         cpu_data(cpuid).icache_size =
1650                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1651                         cpu_data(cpuid).icache_line_size =
1652                                 of_getintprop_default(dp, "icache-line-size", 32);
1653
1654                         cpu_data(cpuid).ecache_size =
1655                                 of_getintprop_default(dp, "ecache-size",
1656                                                       (4 * 1024 * 1024));
1657                         cpu_data(cpuid).ecache_line_size =
1658                                 of_getintprop_default(dp, "ecache-line-size", 64);
1659
1660                         cpu_data(cpuid).core_id = 0;
1661                         cpu_data(cpuid).proc_id = -1;
1662                 }
1663
1664 #ifdef CONFIG_SMP
1665                 cpu_set(cpuid, cpu_present_map);
1666                 cpu_set(cpuid, cpu_possible_map);
1667 #endif
1668         }
1669
1670         smp_fill_in_sib_core_maps();
1671 }
1672
1673 struct device_node *of_console_device;
1674 EXPORT_SYMBOL(of_console_device);
1675
1676 char *of_console_path;
1677 EXPORT_SYMBOL(of_console_path);
1678
1679 char *of_console_options;
1680 EXPORT_SYMBOL(of_console_options);
1681
1682 static void __init of_console_init(void)
1683 {
1684         char *msg = "OF stdout device is: %s\n";
1685         struct device_node *dp;
1686         const char *type;
1687         phandle node;
1688
1689         of_console_path = prom_early_alloc(256);
1690         if (prom_ihandle2path(prom_stdout, of_console_path, 256) < 0) {
1691                 prom_printf("Cannot obtain path of stdout.\n");
1692                 prom_halt();
1693         }
1694         of_console_options = strrchr(of_console_path, ':');
1695         if (of_console_options) {
1696                 of_console_options++;
1697                 if (*of_console_options == '\0')
1698                         of_console_options = NULL;
1699         }
1700
1701         node = prom_inst2pkg(prom_stdout);
1702         if (!node) {
1703                 prom_printf("Cannot resolve stdout node from "
1704                             "instance %08x.\n", prom_stdout);
1705                 prom_halt();
1706         }
1707
1708         dp = of_find_node_by_phandle(node);
1709         type = of_get_property(dp, "device_type", NULL);
1710         if (!type) {
1711                 prom_printf("Console stdout lacks device_type property.\n");
1712                 prom_halt();
1713         }
1714
1715         if (strcmp(type, "display") && strcmp(type, "serial")) {
1716                 prom_printf("Console device_type is neither display "
1717                             "nor serial.\n");
1718                 prom_halt();
1719         }
1720
1721         of_console_device = dp;
1722
1723         printk(msg, of_console_path);
1724 }
1725
1726 void __init prom_build_devicetree(void)
1727 {
1728         struct device_node **nextp;
1729
1730         allnodes = create_node(prom_root_node, NULL);
1731         allnodes->path_component_name = "";
1732         allnodes->full_name = "/";
1733
1734         nextp = &allnodes->allnext;
1735         allnodes->child = build_tree(allnodes,
1736                                      prom_getchild(allnodes->node),
1737                                      &nextp);
1738         of_console_init();
1739
1740         printk("PROM: Built device tree with %u bytes of memory.\n",
1741                prom_early_allocated);
1742
1743         if (tlb_type != hypervisor)
1744                 of_fill_in_cpu_data();
1745 }