Merge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6] / drivers / rtc / rtc-vr41xx.c
1 /*
2  *  Driver for NEC VR4100 series Real Time Clock unit.
3  *
4  *  Copyright (C) 2003-2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #include <linux/err.h>
21 #include <linux/fs.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/interrupt.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/rtc.h>
28 #include <linux/spinlock.h>
29 #include <linux/types.h>
30
31 #include <asm/div64.h>
32 #include <asm/io.h>
33 #include <asm/uaccess.h>
34
35 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
36 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
37 MODULE_LICENSE("GPL v2");
38
39 /* RTC 1 registers */
40 #define ETIMELREG               0x00
41 #define ETIMEMREG               0x02
42 #define ETIMEHREG               0x04
43 /* RFU */
44 #define ECMPLREG                0x08
45 #define ECMPMREG                0x0a
46 #define ECMPHREG                0x0c
47 /* RFU */
48 #define RTCL1LREG               0x10
49 #define RTCL1HREG               0x12
50 #define RTCL1CNTLREG            0x14
51 #define RTCL1CNTHREG            0x16
52 #define RTCL2LREG               0x18
53 #define RTCL2HREG               0x1a
54 #define RTCL2CNTLREG            0x1c
55 #define RTCL2CNTHREG            0x1e
56
57 /* RTC 2 registers */
58 #define TCLKLREG                0x00
59 #define TCLKHREG                0x02
60 #define TCLKCNTLREG             0x04
61 #define TCLKCNTHREG             0x06
62 /* RFU */
63 #define RTCINTREG               0x1e
64  #define TCLOCK_INT             0x08
65  #define RTCLONG2_INT           0x04
66  #define RTCLONG1_INT           0x02
67  #define ELAPSEDTIME_INT        0x01
68
69 #define RTC_FREQUENCY           32768
70 #define MAX_PERIODIC_RATE       6553
71
72 static void __iomem *rtc1_base;
73 static void __iomem *rtc2_base;
74
75 #define rtc1_read(offset)               readw(rtc1_base + (offset))
76 #define rtc1_write(offset, value)       writew((value), rtc1_base + (offset))
77
78 #define rtc2_read(offset)               readw(rtc2_base + (offset))
79 #define rtc2_write(offset, value)       writew((value), rtc2_base + (offset))
80
81 static unsigned long epoch = 1970;      /* Jan 1 1970 00:00:00 */
82
83 static DEFINE_SPINLOCK(rtc_lock);
84 static char rtc_name[] = "RTC";
85 static unsigned long periodic_count;
86 static unsigned int alarm_enabled;
87 static int aie_irq = -1;
88 static int pie_irq = -1;
89
90 static inline unsigned long read_elapsed_second(void)
91 {
92
93         unsigned long first_low, first_mid, first_high;
94
95         unsigned long second_low, second_mid, second_high;
96
97         do {
98                 first_low = rtc1_read(ETIMELREG);
99                 first_mid = rtc1_read(ETIMEMREG);
100                 first_high = rtc1_read(ETIMEHREG);
101                 second_low = rtc1_read(ETIMELREG);
102                 second_mid = rtc1_read(ETIMEMREG);
103                 second_high = rtc1_read(ETIMEHREG);
104         } while (first_low != second_low || first_mid != second_mid ||
105                  first_high != second_high);
106
107         return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
108 }
109
110 static inline void write_elapsed_second(unsigned long sec)
111 {
112         spin_lock_irq(&rtc_lock);
113
114         rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
115         rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
116         rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
117
118         spin_unlock_irq(&rtc_lock);
119 }
120
121 static void vr41xx_rtc_release(struct device *dev)
122 {
123
124         spin_lock_irq(&rtc_lock);
125
126         rtc1_write(ECMPLREG, 0);
127         rtc1_write(ECMPMREG, 0);
128         rtc1_write(ECMPHREG, 0);
129         rtc1_write(RTCL1LREG, 0);
130         rtc1_write(RTCL1HREG, 0);
131
132         spin_unlock_irq(&rtc_lock);
133
134         disable_irq(aie_irq);
135         disable_irq(pie_irq);
136 }
137
138 static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
139 {
140         unsigned long epoch_sec, elapsed_sec;
141
142         epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
143         elapsed_sec = read_elapsed_second();
144
145         rtc_time_to_tm(epoch_sec + elapsed_sec, time);
146
147         return 0;
148 }
149
150 static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
151 {
152         unsigned long epoch_sec, current_sec;
153
154         epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
155         current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
156                              time->tm_hour, time->tm_min, time->tm_sec);
157
158         write_elapsed_second(current_sec - epoch_sec);
159
160         return 0;
161 }
162
163 static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
164 {
165         unsigned long low, mid, high;
166         struct rtc_time *time = &wkalrm->time;
167
168         spin_lock_irq(&rtc_lock);
169
170         low = rtc1_read(ECMPLREG);
171         mid = rtc1_read(ECMPMREG);
172         high = rtc1_read(ECMPHREG);
173         wkalrm->enabled = alarm_enabled;
174
175         spin_unlock_irq(&rtc_lock);
176
177         rtc_time_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
178
179         return 0;
180 }
181
182 static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
183 {
184         unsigned long alarm_sec;
185         struct rtc_time *time = &wkalrm->time;
186
187         alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
188                            time->tm_hour, time->tm_min, time->tm_sec);
189
190         spin_lock_irq(&rtc_lock);
191
192         if (alarm_enabled)
193                 disable_irq(aie_irq);
194
195         rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
196         rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
197         rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
198
199         if (wkalrm->enabled)
200                 enable_irq(aie_irq);
201
202         alarm_enabled = wkalrm->enabled;
203
204         spin_unlock_irq(&rtc_lock);
205
206         return 0;
207 }
208
209 static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
210 {
211         unsigned long count;
212
213         count = RTC_FREQUENCY;
214         do_div(count, freq);
215
216         periodic_count = count;
217
218         spin_lock_irq(&rtc_lock);
219
220         rtc1_write(RTCL1LREG, count);
221         rtc1_write(RTCL1HREG, count >> 16);
222
223         spin_unlock_irq(&rtc_lock);
224
225         return 0;
226 }
227
228 static int vr41xx_rtc_irq_set_state(struct device *dev, int enabled)
229 {
230         if (enabled)
231                 enable_irq(pie_irq);
232         else
233                 disable_irq(pie_irq);
234
235         return 0;
236 }
237
238 static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
239 {
240         switch (cmd) {
241         case RTC_AIE_ON:
242                 spin_lock_irq(&rtc_lock);
243
244                 if (!alarm_enabled) {
245                         enable_irq(aie_irq);
246                         alarm_enabled = 1;
247                 }
248
249                 spin_unlock_irq(&rtc_lock);
250                 break;
251         case RTC_AIE_OFF:
252                 spin_lock_irq(&rtc_lock);
253
254                 if (alarm_enabled) {
255                         disable_irq(aie_irq);
256                         alarm_enabled = 0;
257                 }
258
259                 spin_unlock_irq(&rtc_lock);
260                 break;
261         case RTC_EPOCH_READ:
262                 return put_user(epoch, (unsigned long __user *)arg);
263         case RTC_EPOCH_SET:
264                 /* Doesn't support before 1900 */
265                 if (arg < 1900)
266                         return -EINVAL;
267                 epoch = arg;
268                 break;
269         default:
270                 return -ENOIOCTLCMD;
271         }
272
273         return 0;
274 }
275
276 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
277 {
278         struct platform_device *pdev = (struct platform_device *)dev_id;
279         struct rtc_device *rtc = platform_get_drvdata(pdev);
280
281         rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
282
283         rtc_update_irq(rtc, 1, RTC_AF);
284
285         return IRQ_HANDLED;
286 }
287
288 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
289 {
290         struct platform_device *pdev = (struct platform_device *)dev_id;
291         struct rtc_device *rtc = platform_get_drvdata(pdev);
292         unsigned long count = periodic_count;
293
294         rtc2_write(RTCINTREG, RTCLONG1_INT);
295
296         rtc1_write(RTCL1LREG, count);
297         rtc1_write(RTCL1HREG, count >> 16);
298
299         rtc_update_irq(rtc, 1, RTC_PF);
300
301         return IRQ_HANDLED;
302 }
303
304 static const struct rtc_class_ops vr41xx_rtc_ops = {
305         .release        = vr41xx_rtc_release,
306         .ioctl          = vr41xx_rtc_ioctl,
307         .read_time      = vr41xx_rtc_read_time,
308         .set_time       = vr41xx_rtc_set_time,
309         .read_alarm     = vr41xx_rtc_read_alarm,
310         .set_alarm      = vr41xx_rtc_set_alarm,
311         .irq_set_freq   = vr41xx_rtc_irq_set_freq,
312         .irq_set_state  = vr41xx_rtc_irq_set_state,
313 };
314
315 static int __devinit rtc_probe(struct platform_device *pdev)
316 {
317         struct resource *res;
318         struct rtc_device *rtc;
319         int retval;
320
321         if (pdev->num_resources != 4)
322                 return -EBUSY;
323
324         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
325         if (!res)
326                 return -EBUSY;
327
328         rtc1_base = ioremap(res->start, res->end - res->start + 1);
329         if (!rtc1_base)
330                 return -EBUSY;
331
332         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
333         if (!res) {
334                 retval = -EBUSY;
335                 goto err_rtc1_iounmap;
336         }
337
338         rtc2_base = ioremap(res->start, res->end - res->start + 1);
339         if (!rtc2_base) {
340                 retval = -EBUSY;
341                 goto err_rtc1_iounmap;
342         }
343
344         rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE);
345         if (IS_ERR(rtc)) {
346                 retval = PTR_ERR(rtc);
347                 goto err_iounmap_all;
348         }
349
350         rtc->max_user_freq = MAX_PERIODIC_RATE;
351
352         spin_lock_irq(&rtc_lock);
353
354         rtc1_write(ECMPLREG, 0);
355         rtc1_write(ECMPMREG, 0);
356         rtc1_write(ECMPHREG, 0);
357         rtc1_write(RTCL1LREG, 0);
358         rtc1_write(RTCL1HREG, 0);
359
360         spin_unlock_irq(&rtc_lock);
361
362         aie_irq = platform_get_irq(pdev, 0);
363         if (aie_irq < 0 || aie_irq >= NR_IRQS) {
364                 retval = -EBUSY;
365                 goto err_device_unregister;
366         }
367
368         retval = request_irq(aie_irq, elapsedtime_interrupt, IRQF_DISABLED,
369                              "elapsed_time", pdev);
370         if (retval < 0)
371                 goto err_device_unregister;
372
373         pie_irq = platform_get_irq(pdev, 1);
374         if (pie_irq < 0 || pie_irq >= NR_IRQS)
375                 goto err_free_irq;
376
377         retval = request_irq(pie_irq, rtclong1_interrupt, IRQF_DISABLED,
378                              "rtclong1", pdev);
379         if (retval < 0)
380                 goto err_free_irq;
381
382         platform_set_drvdata(pdev, rtc);
383
384         disable_irq(aie_irq);
385         disable_irq(pie_irq);
386
387         printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
388
389         return 0;
390
391 err_free_irq:
392         free_irq(aie_irq, pdev);
393
394 err_device_unregister:
395         rtc_device_unregister(rtc);
396
397 err_iounmap_all:
398         iounmap(rtc2_base);
399         rtc2_base = NULL;
400
401 err_rtc1_iounmap:
402         iounmap(rtc1_base);
403         rtc1_base = NULL;
404
405         return retval;
406 }
407
408 static int __devexit rtc_remove(struct platform_device *pdev)
409 {
410         struct rtc_device *rtc;
411
412         rtc = platform_get_drvdata(pdev);
413         if (rtc)
414                 rtc_device_unregister(rtc);
415
416         platform_set_drvdata(pdev, NULL);
417
418         free_irq(aie_irq, pdev);
419         free_irq(pie_irq, pdev);
420         if (rtc1_base)
421                 iounmap(rtc1_base);
422         if (rtc2_base)
423                 iounmap(rtc2_base);
424
425         return 0;
426 }
427
428 /* work with hotplug and coldplug */
429 MODULE_ALIAS("platform:RTC");
430
431 static struct platform_driver rtc_platform_driver = {
432         .probe          = rtc_probe,
433         .remove         = __devexit_p(rtc_remove),
434         .driver         = {
435                 .name   = rtc_name,
436                 .owner  = THIS_MODULE,
437         },
438 };
439
440 static int __init vr41xx_rtc_init(void)
441 {
442         return platform_driver_register(&rtc_platform_driver);
443 }
444
445 static void __exit vr41xx_rtc_exit(void)
446 {
447         platform_driver_unregister(&rtc_platform_driver);
448 }
449
450 module_init(vr41xx_rtc_init);
451 module_exit(vr41xx_rtc_exit);