Merge branch 'devel' into for-linus
[linux-2.6] / arch / x86 / kernel / apic / bigsmp_32.c
1 /*
2  * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
3  *
4  * Drives the local APIC in "clustered mode".
5  */
6 #include <linux/threads.h>
7 #include <linux/cpumask.h>
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/dmi.h>
11 #include <linux/smp.h>
12
13 #include <asm/apicdef.h>
14 #include <asm/fixmap.h>
15 #include <asm/mpspec.h>
16 #include <asm/apic.h>
17 #include <asm/ipi.h>
18
19 static unsigned bigsmp_get_apic_id(unsigned long x)
20 {
21         return (x >> 24) & 0xFF;
22 }
23
24 static int bigsmp_apic_id_registered(void)
25 {
26         return 1;
27 }
28
29 static const cpumask_t *bigsmp_target_cpus(void)
30 {
31 #ifdef CONFIG_SMP
32         return &cpu_online_map;
33 #else
34         return &cpumask_of_cpu(0);
35 #endif
36 }
37
38 static unsigned long bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
39 {
40         return 0;
41 }
42
43 static unsigned long bigsmp_check_apicid_present(int bit)
44 {
45         return 1;
46 }
47
48 static inline unsigned long calculate_ldr(int cpu)
49 {
50         unsigned long val, id;
51
52         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
53         id = per_cpu(x86_bios_cpu_apicid, cpu);
54         val |= SET_APIC_LOGICAL_ID(id);
55
56         return val;
57 }
58
59 /*
60  * Set up the logical destination ID.
61  *
62  * Intel recommends to set DFR, LDR and TPR before enabling
63  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
64  * document number 292116).  So here it goes...
65  */
66 static void bigsmp_init_apic_ldr(void)
67 {
68         unsigned long val;
69         int cpu = smp_processor_id();
70
71         apic_write(APIC_DFR, APIC_DFR_FLAT);
72         val = calculate_ldr(cpu);
73         apic_write(APIC_LDR, val);
74 }
75
76 static void bigsmp_setup_apic_routing(void)
77 {
78         printk(KERN_INFO
79                 "Enabling APIC mode:  Physflat.  Using %d I/O APICs\n",
80                 nr_ioapics);
81 }
82
83 static int bigsmp_apicid_to_node(int logical_apicid)
84 {
85         return apicid_2_node[hard_smp_processor_id()];
86 }
87
88 static int bigsmp_cpu_present_to_apicid(int mps_cpu)
89 {
90         if (mps_cpu < nr_cpu_ids)
91                 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
92
93         return BAD_APICID;
94 }
95
96 static physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
97 {
98         return physid_mask_of_physid(phys_apicid);
99 }
100
101 /* Mapping from cpu number to logical apicid */
102 static inline int bigsmp_cpu_to_logical_apicid(int cpu)
103 {
104         if (cpu >= nr_cpu_ids)
105                 return BAD_APICID;
106         return cpu_physical_id(cpu);
107 }
108
109 static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
110 {
111         /* For clustered we don't have a good way to do this yet - hack */
112         return physids_promote(0xFFL);
113 }
114
115 static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
116 {
117         return 1;
118 }
119
120 /* As we are using single CPU as destination, pick only one CPU here */
121 static unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
122 {
123         return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
124 }
125
126 static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
127                               const struct cpumask *andmask)
128 {
129         int cpu;
130
131         /*
132          * We're using fixed IRQ delivery, can only return one phys APIC ID.
133          * May as well be the first.
134          */
135         for_each_cpu_and(cpu, cpumask, andmask) {
136                 if (cpumask_test_cpu(cpu, cpu_online_mask))
137                         break;
138         }
139         if (cpu < nr_cpu_ids)
140                 return bigsmp_cpu_to_logical_apicid(cpu);
141
142         return BAD_APICID;
143 }
144
145 static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
146 {
147         return cpuid_apic >> index_msb;
148 }
149
150 static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
151 {
152         default_send_IPI_mask_sequence_phys(mask, vector);
153 }
154
155 static void bigsmp_send_IPI_allbutself(int vector)
156 {
157         default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
158 }
159
160 static void bigsmp_send_IPI_all(int vector)
161 {
162         bigsmp_send_IPI_mask(cpu_online_mask, vector);
163 }
164
165 static int dmi_bigsmp; /* can be set by dmi scanners */
166
167 static int hp_ht_bigsmp(const struct dmi_system_id *d)
168 {
169         printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
170         dmi_bigsmp = 1;
171
172         return 0;
173 }
174
175
176 static const struct dmi_system_id bigsmp_dmi_table[] = {
177         { hp_ht_bigsmp, "HP ProLiant DL760 G2",
178                 {       DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
179                         DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
180                 }
181         },
182
183         { hp_ht_bigsmp, "HP ProLiant DL740",
184                 {       DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
185                         DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
186                 }
187         },
188         { } /* NULL entry stops DMI scanning */
189 };
190
191 static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
192 {
193         cpus_clear(*retmask);
194         cpu_set(cpu, *retmask);
195 }
196
197 static int probe_bigsmp(void)
198 {
199         if (def_to_bigsmp)
200                 dmi_bigsmp = 1;
201         else
202                 dmi_check_system(bigsmp_dmi_table);
203
204         return dmi_bigsmp;
205 }
206
207 struct apic apic_bigsmp = {
208
209         .name                           = "bigsmp",
210         .probe                          = probe_bigsmp,
211         .acpi_madt_oem_check            = NULL,
212         .apic_id_registered             = bigsmp_apic_id_registered,
213
214         .irq_delivery_mode              = dest_Fixed,
215         /* phys delivery to target CPU: */
216         .irq_dest_mode                  = 0,
217
218         .target_cpus                    = bigsmp_target_cpus,
219         .disable_esr                    = 1,
220         .dest_logical                   = 0,
221         .check_apicid_used              = bigsmp_check_apicid_used,
222         .check_apicid_present           = bigsmp_check_apicid_present,
223
224         .vector_allocation_domain       = bigsmp_vector_allocation_domain,
225         .init_apic_ldr                  = bigsmp_init_apic_ldr,
226
227         .ioapic_phys_id_map             = bigsmp_ioapic_phys_id_map,
228         .setup_apic_routing             = bigsmp_setup_apic_routing,
229         .multi_timer_check              = NULL,
230         .apicid_to_node                 = bigsmp_apicid_to_node,
231         .cpu_to_logical_apicid          = bigsmp_cpu_to_logical_apicid,
232         .cpu_present_to_apicid          = bigsmp_cpu_present_to_apicid,
233         .apicid_to_cpu_present          = bigsmp_apicid_to_cpu_present,
234         .setup_portio_remap             = NULL,
235         .check_phys_apicid_present      = bigsmp_check_phys_apicid_present,
236         .enable_apic_mode               = NULL,
237         .phys_pkg_id                    = bigsmp_phys_pkg_id,
238         .mps_oem_check                  = NULL,
239
240         .get_apic_id                    = bigsmp_get_apic_id,
241         .set_apic_id                    = NULL,
242         .apic_id_mask                   = 0xFF << 24,
243
244         .cpu_mask_to_apicid             = bigsmp_cpu_mask_to_apicid,
245         .cpu_mask_to_apicid_and         = bigsmp_cpu_mask_to_apicid_and,
246
247         .send_IPI_mask                  = bigsmp_send_IPI_mask,
248         .send_IPI_mask_allbutself       = NULL,
249         .send_IPI_allbutself            = bigsmp_send_IPI_allbutself,
250         .send_IPI_all                   = bigsmp_send_IPI_all,
251         .send_IPI_self                  = default_send_IPI_self,
252
253         .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
254         .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
255
256         .wait_for_init_deassert         = default_wait_for_init_deassert,
257
258         .smp_callin_clear_local_apic    = NULL,
259         .inquire_remote_apic            = default_inquire_remote_apic,
260
261         .read                           = native_apic_mem_read,
262         .write                          = native_apic_mem_write,
263         .icr_read                       = native_apic_icr_read,
264         .icr_write                      = native_apic_icr_write,
265         .wait_icr_idle                  = native_apic_wait_icr_idle,
266         .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
267 };