2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <sound/driver.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/pci.h>
37 #include <linux/slab.h>
38 #include <linux/vmalloc.h>
40 #include <sound/core.h>
41 #include <sound/emu10k1.h>
46 /*************************************************************************
48 *************************************************************************/
50 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
52 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
53 snd_emu10k1_ptr_write(emu, IP, ch, 0);
54 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
55 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
56 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
57 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
58 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
60 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
61 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
62 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
63 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
64 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
65 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
67 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
68 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
69 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
70 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
71 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
72 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
73 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
74 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
76 /*** these are last so OFF prevents writing ***/
77 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
78 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
79 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
80 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
81 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
83 /* Audigy extra stuffs */
85 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
86 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
87 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
88 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
89 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
90 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
91 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
95 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
97 unsigned int silent_page;
100 /* disable audio and lock cache */
101 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
104 /* reset recording buffers */
105 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
106 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
107 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
108 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
109 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
110 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
112 /* disable channel interrupt */
113 outl(0, emu->port + INTE);
114 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
115 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
116 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
117 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
120 /* set SPDIF bypass mode */
121 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
122 /* enable rear left + rear right AC97 slots */
123 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
127 /* init envelope engine */
128 for (ch = 0; ch < NUM_G; ch++)
129 snd_emu10k1_voice_init(emu, ch);
131 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
132 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
133 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
135 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
136 /* Hacks for Alice3 to work independent of haP16V driver */
139 //Setup SRCMulti_I2S SamplingRate
140 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
143 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
145 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
146 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
147 /* Setup SRCMulti Input Audio Enable */
148 /* Use 0xFFFFFFFF to enable P16V sounds. */
149 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
151 /* Enabled Phased (8-channel) P16V playback */
152 outl(0x0201, emu->port + HCFG2);
153 /* Set playback routing. */
154 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
156 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
157 /* Hacks for Alice3 to work independent of haP16V driver */
160 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
161 //Setup SRCMulti_I2S SamplingRate
162 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
165 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
167 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
168 outl(0x600000, emu->port + 0x20);
169 outl(0x14, emu->port + 0x24);
171 /* Setup SRCMulti Input Audio Enable */
172 outl(0x7b0000, emu->port + 0x20);
173 outl(0xFF000000, emu->port + 0x24);
175 /* Setup SPDIF Out Audio Enable */
176 /* The Audigy 2 Value has a separate SPDIF out,
177 * so no need for a mixer switch
179 outl(0x7a0000, emu->port + 0x20);
180 outl(0xFF000000, emu->port + 0x24);
181 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
182 outl(tmp, emu->port + A_IOCFG);
184 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
186 tmp = snd_emu10k1_spi_write(emu, 0x00ff);
187 tmp = snd_emu10k1_spi_write(emu, 0x02ff);
188 tmp = snd_emu10k1_spi_write(emu, 0x0400);
189 tmp = snd_emu10k1_spi_write(emu, 0x0520);
190 tmp = snd_emu10k1_spi_write(emu, 0x0600);
191 tmp = snd_emu10k1_spi_write(emu, 0x08ff);
192 tmp = snd_emu10k1_spi_write(emu, 0x0aff);
193 tmp = snd_emu10k1_spi_write(emu, 0x0cff);
194 tmp = snd_emu10k1_spi_write(emu, 0x0eff);
195 tmp = snd_emu10k1_spi_write(emu, 0x10ff);
196 tmp = snd_emu10k1_spi_write(emu, 0x1200);
197 tmp = snd_emu10k1_spi_write(emu, 0x1400);
198 tmp = snd_emu10k1_spi_write(emu, 0x1480);
199 tmp = snd_emu10k1_spi_write(emu, 0x1800);
200 tmp = snd_emu10k1_spi_write(emu, 0x1aff);
201 tmp = snd_emu10k1_spi_write(emu, 0x1cff);
202 tmp = snd_emu10k1_spi_write(emu, 0x1e00);
203 tmp = snd_emu10k1_spi_write(emu, 0x0530);
204 tmp = snd_emu10k1_spi_write(emu, 0x0602);
205 tmp = snd_emu10k1_spi_write(emu, 0x0622);
206 tmp = snd_emu10k1_spi_write(emu, 0x1400);
207 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
210 * GPIO1: Speakers-enabled.
213 * GPIO4: IEC958 Output on.
218 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
222 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
223 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
224 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
226 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
227 for (ch = 0; ch < NUM_G; ch++) {
228 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
229 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
234 * Mute Disable Audio = 0
235 * Lock Tank Memory = 1
236 * Lock Sound Memory = 0
240 if (emu->revision == 4) /* audigy2 */
241 outl(HCFG_AUDIOENABLE |
242 HCFG_AC3ENABLE_CDSPDIF |
243 HCFG_AC3ENABLE_GPSPDIF |
244 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
246 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
247 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
248 * e.g. card_capabilities->joystick */
249 } else if (emu->model == 0x20 ||
250 emu->model == 0xc400 ||
251 (emu->model == 0x21 && emu->revision < 6))
252 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
254 // With on-chip joystick
255 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
257 if (enable_ir) { /* enable IR for SB Live */
258 if ( emu->card_capabilities->emu1212m) {
259 ; /* Disable all access to A_IOCFG for the emu1212m */
260 } else if (emu->audigy) {
261 unsigned int reg = inl(emu->port + A_IOCFG);
262 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
264 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
266 outl(reg, emu->port + A_IOCFG);
268 unsigned int reg = inl(emu->port + HCFG);
269 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
271 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
273 outl(reg, emu->port + HCFG);
277 if ( emu->card_capabilities->emu1212m) {
278 ; /* Disable all access to A_IOCFG for the emu1212m */
279 } else if (emu->audigy) { /* enable analog output */
280 unsigned int reg = inl(emu->port + A_IOCFG);
281 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
287 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
290 * Enable the audio bit
292 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
294 /* Enable analog/digital outs on audigy */
295 if ( emu->card_capabilities->emu1212m) {
296 ; /* Disable all access to A_IOCFG for the emu1212m */
297 } else if (emu->audigy) {
298 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
300 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
301 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
302 * This has to be done after init ALice3 I2SOut beyond 48KHz.
303 * So, sequence is important. */
304 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
305 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
306 /* Unmute Analog now. */
307 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
309 /* Disable routing from AC97 line out to Front speakers */
310 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
317 /* FIXME: the following routine disables LiveDrive-II !! */
320 tmp = inl(emu->port + HCFG);
321 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
322 outl(tmp|0x800, emu->port + HCFG);
324 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
326 outl(tmp, emu->port + HCFG);
332 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
335 int snd_emu10k1_done(struct snd_emu10k1 * emu)
339 outl(0, emu->port + INTE);
344 for (ch = 0; ch < NUM_G; ch++)
345 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
346 for (ch = 0; ch < NUM_G; ch++) {
347 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
348 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
349 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
350 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
353 /* reset recording buffers */
354 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
355 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
356 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
357 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
358 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
359 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
360 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
361 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
362 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
364 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
366 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
368 /* disable channel interrupt */
369 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
370 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
371 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
372 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
374 /* disable audio and lock cache */
375 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
376 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
381 /*************************************************************************
382 * ECARD functional implementation
383 *************************************************************************/
385 /* In A1 Silicon, these bits are in the HC register */
386 #define HOOKN_BIT (1L << 12)
387 #define HANDN_BIT (1L << 11)
388 #define PULSEN_BIT (1L << 10)
390 #define EC_GDI1 (1 << 13)
391 #define EC_GDI0 (1 << 14)
393 #define EC_NUM_CONTROL_BITS 20
395 #define EC_AC3_DATA_SELN 0x0001L
396 #define EC_EE_DATA_SEL 0x0002L
397 #define EC_EE_CNTRL_SELN 0x0004L
398 #define EC_EECLK 0x0008L
399 #define EC_EECS 0x0010L
400 #define EC_EESDO 0x0020L
401 #define EC_TRIM_CSN 0x0040L
402 #define EC_TRIM_SCLK 0x0080L
403 #define EC_TRIM_SDATA 0x0100L
404 #define EC_TRIM_MUTEN 0x0200L
405 #define EC_ADCCAL 0x0400L
406 #define EC_ADCRSTN 0x0800L
407 #define EC_DACCAL 0x1000L
408 #define EC_DACMUTEN 0x2000L
409 #define EC_LEDN 0x4000L
411 #define EC_SPDIF0_SEL_SHIFT 15
412 #define EC_SPDIF1_SEL_SHIFT 17
413 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
414 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
415 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
416 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
417 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
418 * be incremented any time the EEPROM's
419 * format is changed. */
421 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
423 /* Addresses for special values stored in to EEPROM */
424 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
425 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
426 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
428 #define EC_LAST_PROMFILE_ADDR 0x2f
430 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
431 * can be up to 30 characters in length
432 * and is stored as a NULL-terminated
433 * ASCII string. Any unused bytes must be
434 * filled with zeros */
435 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
438 /* Most of this stuff is pretty self-evident. According to the hardware
439 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
440 * offset problem. Weird.
442 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
446 #define EC_DEFAULT_ADC_GAIN 0xC4C4
447 #define EC_DEFAULT_SPDIF0_SEL 0x0
448 #define EC_DEFAULT_SPDIF1_SEL 0x4
450 /**************************************************************************
451 * @func Clock bits into the Ecard's control latch. The Ecard uses a
452 * control latch will is loaded bit-serially by toggling the Modem control
453 * lines from function 2 on the E8010. This function hides these details
454 * and presents the illusion that we are actually writing to a distinct
458 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
460 unsigned short count;
462 unsigned long hc_port;
463 unsigned int hc_value;
465 hc_port = emu->port + HCFG;
466 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
467 outl(hc_value, hc_port);
469 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
471 /* Set up the value */
472 data = ((value & 0x1) ? PULSEN_BIT : 0);
475 outl(hc_value | data, hc_port);
477 /* Clock the shift register */
478 outl(hc_value | data | HANDN_BIT, hc_port);
479 outl(hc_value | data, hc_port);
483 outl(hc_value | HOOKN_BIT, hc_port);
484 outl(hc_value, hc_port);
487 /**************************************************************************
488 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
489 * trim value consists of a 16bit value which is composed of two
490 * 8 bit gain/trim values, one for the left channel and one for the
491 * right channel. The following table maps from the Gain/Attenuation
492 * value in decibels into the corresponding bit pattern for a single
496 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
501 /* Enable writing to the TRIM registers */
502 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
504 /* Do it again to insure that we meet hold time requirements */
505 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
507 for (bit = (1 << 15); bit; bit >>= 1) {
510 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
513 value |= EC_TRIM_SDATA;
516 snd_emu10k1_ecard_write(emu, value);
517 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
518 snd_emu10k1_ecard_write(emu, value);
521 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
524 static int __devinit snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
526 unsigned int hc_value;
528 /* Set up the initial settings */
529 emu->ecard_ctrl = EC_RAW_RUN_MODE |
530 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
531 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
533 /* Step 0: Set the codec type in the hardware control register
534 * and enable audio output */
535 hc_value = inl(emu->port + HCFG);
536 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
537 inl(emu->port + HCFG);
539 /* Step 1: Turn off the led and deassert TRIM_CS */
540 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
542 /* Step 2: Calibrate the ADC and DAC */
543 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
545 /* Step 3: Wait for awhile; XXX We can't get away with this
546 * under a real operating system; we'll need to block and wait that
548 snd_emu10k1_wait(emu, 48000);
550 /* Step 4: Switch off the DAC and ADC calibration. Note
551 * That ADC_CAL is actually an inverted signal, so we assert
552 * it here to stop calibration. */
553 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
555 /* Step 4: Switch into run mode */
556 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
558 /* Step 5: Set the analog input gain */
559 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
564 static int __devinit snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
566 unsigned long special_port;
569 /* Special initialisation routine
570 * before the rest of the IO-Ports become active.
572 special_port = emu->port + 0x38;
573 value = inl(special_port);
574 outl(0x00d00000, special_port);
575 value = inl(special_port);
576 outl(0x00d00001, special_port);
577 value = inl(special_port);
578 outl(0x00d0005f, special_port);
579 value = inl(special_port);
580 outl(0x00d0007f, special_port);
581 value = inl(special_port);
582 outl(0x0090007f, special_port);
583 value = inl(special_port);
585 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
589 static int snd_emu1212m_fpga_write(struct snd_emu10k1 * emu, int reg, int value)
591 if (reg<0 || reg>0x3f)
593 reg+=0x40; /* 0x40 upwards are registers. */
594 if (value<0 || value>0x3f) /* 0 to 0x3f are values */
596 outl(reg, emu->port + A_IOCFG);
597 outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
598 outl(value, emu->port + A_IOCFG);
599 outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
604 static int snd_emu1212m_fpga_read(struct snd_emu10k1 * emu, int reg, int *value)
606 if (reg<0 || reg>0x3f)
608 reg+=0x40; /* 0x40 upwards are registers. */
609 outl(reg, emu->port + A_IOCFG);
610 outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
611 *value = inl(emu->port + A_IOCFG);
616 static int snd_emu1212m_fpga_netlist_write(struct snd_emu10k1 * emu, int reg, int value)
618 snd_emu1212m_fpga_write(emu, 0x00, ((reg >> 8) & 0x3f) );
619 snd_emu1212m_fpga_write(emu, 0x01, (reg & 0x3f) );
620 snd_emu1212m_fpga_write(emu, 0x02, ((value >> 8) & 0x3f) );
621 snd_emu1212m_fpga_write(emu, 0x03, (value & 0x3f) );
626 static int __devinit snd_emu10k1_emu1212m_init(struct snd_emu10k1 * emu)
631 snd_printk(KERN_ERR "emu1212m: Special config.\n");
632 outl(0x0005a00c, emu->port + HCFG);
633 outl(0x0005a004, emu->port + HCFG);
634 outl(0x0005a000, emu->port + HCFG);
635 outl(0x0005a000, emu->port + HCFG);
637 snd_emu1212m_fpga_read(emu, 0x22, &tmp );
638 snd_emu1212m_fpga_read(emu, 0x23, &tmp );
639 snd_emu1212m_fpga_read(emu, 0x24, &tmp );
640 snd_emu1212m_fpga_write(emu, 0x04, 0x01 );
641 snd_emu1212m_fpga_read(emu, 0x0b, &tmp );
642 snd_emu1212m_fpga_write(emu, 0x0b, 0x01 );
643 snd_emu1212m_fpga_read(emu, 0x10, &tmp );
644 snd_emu1212m_fpga_write(emu, 0x10, 0x00 );
645 snd_emu1212m_fpga_read(emu, 0x11, &tmp );
646 snd_emu1212m_fpga_write(emu, 0x11, 0x30 );
647 snd_emu1212m_fpga_read(emu, 0x13, &tmp );
648 snd_emu1212m_fpga_write(emu, 0x13, 0x0f );
649 snd_emu1212m_fpga_read(emu, 0x11, &tmp );
650 snd_emu1212m_fpga_write(emu, 0x11, 0x30 );
651 snd_emu1212m_fpga_read(emu, 0x0a, &tmp );
652 snd_emu1212m_fpga_write(emu, 0x0a, 0x10 );
653 snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
654 snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
655 snd_emu1212m_fpga_write(emu, 0x09, 0x0f );
656 snd_emu1212m_fpga_write(emu, 0x06, 0x00 );
657 snd_emu1212m_fpga_write(emu, 0x05, 0x00 );
658 snd_emu1212m_fpga_write(emu, 0x0e, 0x12 );
659 snd_emu1212m_fpga_netlist_write(emu, 0x0000, 0x0200);
660 snd_emu1212m_fpga_netlist_write(emu, 0x0001, 0x0201);
661 snd_emu1212m_fpga_netlist_write(emu, 0x0002, 0x0500);
662 snd_emu1212m_fpga_netlist_write(emu, 0x0003, 0x0501);
663 snd_emu1212m_fpga_netlist_write(emu, 0x0004, 0x0400);
664 snd_emu1212m_fpga_netlist_write(emu, 0x0005, 0x0401);
665 snd_emu1212m_fpga_netlist_write(emu, 0x0006, 0x0402);
666 snd_emu1212m_fpga_netlist_write(emu, 0x0007, 0x0403);
667 snd_emu1212m_fpga_netlist_write(emu, 0x0008, 0x0404);
668 snd_emu1212m_fpga_netlist_write(emu, 0x0009, 0x0405);
669 snd_emu1212m_fpga_netlist_write(emu, 0x000a, 0x0406);
670 snd_emu1212m_fpga_netlist_write(emu, 0x000b, 0x0407);
671 snd_emu1212m_fpga_netlist_write(emu, 0x000c, 0x0100);
672 snd_emu1212m_fpga_netlist_write(emu, 0x000d, 0x0104);
673 snd_emu1212m_fpga_netlist_write(emu, 0x000e, 0x0200);
674 snd_emu1212m_fpga_netlist_write(emu, 0x000f, 0x0201);
675 for (i=0;i < 0x20;i++) {
676 snd_emu1212m_fpga_netlist_write(emu, 0x0100+i, 0x0000);
678 for (i=0;i < 4;i++) {
679 snd_emu1212m_fpga_netlist_write(emu, 0x0200+i, 0x0000);
681 for (i=0;i < 7;i++) {
682 snd_emu1212m_fpga_netlist_write(emu, 0x0300+i, 0x0000);
684 for (i=0;i < 7;i++) {
685 snd_emu1212m_fpga_netlist_write(emu, 0x0400+i, 0x0000);
687 snd_emu1212m_fpga_netlist_write(emu, 0x0500, 0x0108);
688 snd_emu1212m_fpga_netlist_write(emu, 0x0501, 0x010c);
689 snd_emu1212m_fpga_netlist_write(emu, 0x0600, 0x0110);
690 snd_emu1212m_fpga_netlist_write(emu, 0x0601, 0x0114);
691 snd_emu1212m_fpga_netlist_write(emu, 0x0700, 0x0118);
692 snd_emu1212m_fpga_netlist_write(emu, 0x0701, 0x011c);
693 snd_emu1212m_fpga_write(emu, 0x07, 0x01 );
695 snd_emu1212m_fpga_read(emu, 0x21, &tmp );
697 outl(0x0000a000, emu->port + HCFG);
698 outl(0x0000a001, emu->port + HCFG);
699 /* Initial boot complete. Now patches */
701 snd_emu1212m_fpga_read(emu, 0x21, &tmp );
702 snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
703 snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
704 snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
705 snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
706 snd_emu1212m_fpga_read(emu, 0x0a, &tmp );
707 snd_emu1212m_fpga_write(emu, 0x0a, 0x10 );
709 snd_emu1212m_fpga_read(emu, 0x20, &tmp );
710 snd_emu1212m_fpga_read(emu, 0x21, &tmp );
712 snd_emu1212m_fpga_netlist_write(emu, 0x0300, 0x0312);
713 snd_emu1212m_fpga_netlist_write(emu, 0x0301, 0x0313);
714 snd_emu1212m_fpga_netlist_write(emu, 0x0200, 0x0302);
715 snd_emu1212m_fpga_netlist_write(emu, 0x0201, 0x0303);
720 * Create the EMU10K1 instance
724 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
725 static void free_pm_buffer(struct snd_emu10k1 *emu);
728 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
730 if (emu->port) { /* avoid access to already used hardware */
731 snd_emu10k1_fx8010_tram_setup(emu, 0);
732 snd_emu10k1_done(emu);
733 /* remove reserved page */
734 if (emu->reserved_page) {
735 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
736 emu->reserved_page = NULL;
738 snd_emu10k1_free_efx(emu);
741 snd_util_memhdr_free(emu->memhdr);
742 if (emu->silent_page.area)
743 snd_dma_free_pages(&emu->silent_page);
744 if (emu->ptb_pages.area)
745 snd_dma_free_pages(&emu->ptb_pages);
746 vfree(emu->page_ptr_table);
747 vfree(emu->page_addr_table);
752 free_irq(emu->irq, (void *)emu);
754 pci_release_regions(emu->pci);
755 if (emu->card_capabilities->ca0151_chip) /* P16V */
757 pci_disable_device(emu->pci);
762 static int snd_emu10k1_dev_free(struct snd_device *device)
764 struct snd_emu10k1 *emu = device->device_data;
765 return snd_emu10k1_free(emu);
768 static struct snd_emu_chip_details emu_chip_details[] = {
769 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
770 /* Tested by James@superbug.co.uk 3rd July 2005 */
771 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
772 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
778 /* Audigy 2 ZS Notebook Cardbus card.*/
779 /* Tested by James@superbug.co.uk 30th October 2005 */
780 /* Not working yet, but progressing. */
781 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
782 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
786 .ca_cardbus_chip = 1,
789 {.vendor = 0x1102, .device = 0x0008,
790 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
795 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
796 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
797 .driver = "Audigy2", .name = "E-mu 1212m [4001]",
802 /* Tested by James@superbug.co.uk 3rd July 2005 */
803 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
804 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
812 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
813 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
814 .driver = "Audigy2", .name = "Audigy 2 [2006]",
822 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
823 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
831 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
832 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
840 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
841 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
849 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
850 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
857 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
858 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
866 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
867 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
874 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
875 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
880 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
881 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
887 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
888 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
893 {.vendor = 0x1102, .device = 0x0004,
894 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
899 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
900 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
905 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
906 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
911 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
912 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
917 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
918 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
919 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
924 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
925 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
930 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
931 .driver = "EMU10K1", .name = "SB Live 5.1",
936 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
937 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
938 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
941 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
942 * share the same IDs!
945 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
946 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
951 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
952 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
956 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
957 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
962 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
963 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
968 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
969 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
974 /* Tested by James@superbug.co.uk 3rd July 2005 */
975 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
976 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
981 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
982 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
987 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
988 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
993 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
994 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
999 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1000 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1004 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1005 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1010 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1011 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1016 {.vendor = 0x1102, .device = 0x0002,
1017 .driver = "EMU10K1", .name = "SB Live [Unknown]",
1022 { } /* terminator */
1025 int __devinit snd_emu10k1_create(struct snd_card *card,
1026 struct pci_dev * pci,
1027 unsigned short extin_mask,
1028 unsigned short extout_mask,
1029 long max_cache_bytes,
1032 struct snd_emu10k1 ** remu)
1034 struct snd_emu10k1 *emu;
1037 unsigned char revision;
1038 unsigned int silent_page;
1039 const struct snd_emu_chip_details *c;
1040 static struct snd_device_ops ops = {
1041 .dev_free = snd_emu10k1_dev_free,
1046 /* enable PCI device */
1047 if ((err = pci_enable_device(pci)) < 0)
1050 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1052 pci_disable_device(pci);
1056 spin_lock_init(&emu->reg_lock);
1057 spin_lock_init(&emu->emu_lock);
1058 spin_lock_init(&emu->voice_lock);
1059 spin_lock_init(&emu->synth_lock);
1060 spin_lock_init(&emu->memblk_lock);
1061 init_MUTEX(&emu->ptb_lock);
1062 init_MUTEX(&emu->fx8010.lock);
1063 INIT_LIST_HEAD(&emu->mapped_link_head);
1064 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1068 emu->get_synth_voice = NULL;
1069 /* read revision & serial */
1070 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1071 emu->revision = revision;
1072 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1073 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1074 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1076 for (c = emu_chip_details; c->vendor; c++) {
1077 if (c->vendor == pci->vendor && c->device == pci->device) {
1079 if (c->subsystem && (c->subsystem == subsystem) ) {
1083 if (c->subsystem && (c->subsystem != emu->serial) )
1085 if (c->revision && c->revision != emu->revision)
1091 if (c->vendor == 0) {
1092 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1094 pci_disable_device(pci);
1097 emu->card_capabilities = c;
1098 if (c->subsystem && !subsystem)
1099 snd_printdd("Sound card name=%s\n", c->name);
1101 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1102 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1104 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1105 c->name, pci->vendor, pci->device, emu->serial);
1107 if (!*card->id && c->id) {
1109 strlcpy(card->id, c->id, sizeof(card->id));
1111 for (i = 0; i < snd_ecards_limit; i++) {
1112 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1115 if (i >= snd_ecards_limit)
1118 if (n >= SNDRV_CARDS)
1120 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1124 is_audigy = emu->audigy = c->emu10k2_chip;
1126 /* set the DMA transfer mask */
1127 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1128 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1129 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1130 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1132 pci_disable_device(pci);
1136 emu->gpr_base = A_FXGPREGBASE;
1138 emu->gpr_base = FXGPREGBASE;
1140 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1142 pci_disable_device(pci);
1145 emu->port = pci_resource_start(pci, 0);
1147 if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
1151 emu->irq = pci->irq;
1153 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1154 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1155 32 * 1024, &emu->ptb_pages) < 0) {
1160 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
1161 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
1162 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1167 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1168 EMUPAGESIZE, &emu->silent_page) < 0) {
1172 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1173 if (emu->memhdr == NULL) {
1177 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1178 sizeof(struct snd_util_memblk);
1180 pci_set_master(pci);
1182 emu->fx8010.fxbus_mask = 0x303f;
1183 if (extin_mask == 0)
1184 extin_mask = 0x3fcf;
1185 if (extout_mask == 0)
1186 extout_mask = 0x7fff;
1187 emu->fx8010.extin_mask = extin_mask;
1188 emu->fx8010.extout_mask = extout_mask;
1189 emu->enable_ir = enable_ir;
1191 if (emu->card_capabilities->ecard) {
1192 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1194 } else if (emu->card_capabilities->ca_cardbus_chip) {
1195 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1197 } else if (emu->card_capabilities->emu1212m) {
1198 if ((err = snd_emu10k1_emu1212m_init(emu)) < 0) {
1199 snd_emu10k1_free(emu);
1203 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1204 does not support this, it shouldn't do any harm */
1205 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1208 /* initialize TRAM setup */
1209 emu->fx8010.itram_size = (16 * 1024)/2;
1210 emu->fx8010.etram_pages.area = NULL;
1211 emu->fx8010.etram_pages.bytes = 0;
1214 * Init to 0x02109204 :
1215 * Clock accuracy = 0 (1000ppm)
1216 * Sample Rate = 2 (48kHz)
1217 * Audio Channel = 1 (Left of 2)
1218 * Source Number = 0 (Unspecified)
1219 * Generation Status = 1 (Original for Cat Code 12)
1220 * Cat Code = 12 (Digital Signal Mixer)
1222 * Emphasis = 0 (None)
1223 * CP = 1 (Copyright unasserted)
1224 * AN = 0 (Audio data)
1227 emu->spdif_bits[0] = emu->spdif_bits[1] =
1228 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1229 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1230 SPCS_GENERATIONSTATUS | 0x00001200 |
1231 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1233 emu->reserved_page = (struct snd_emu10k1_memblk *)
1234 snd_emu10k1_synth_alloc(emu, 4096);
1235 if (emu->reserved_page)
1236 emu->reserved_page->map_locked = 1;
1238 /* Clear silent pages and set up pointers */
1239 memset(emu->silent_page.area, 0, PAGE_SIZE);
1240 silent_page = emu->silent_page.addr << 1;
1241 for (idx = 0; idx < MAXPAGES; idx++)
1242 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1244 /* set up voice indices */
1245 for (idx = 0; idx < NUM_G; idx++) {
1246 emu->voices[idx].emu = emu;
1247 emu->voices[idx].number = idx;
1250 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1253 if ((err = alloc_pm_buffer(emu)) < 0)
1257 /* Initialize the effect engine */
1258 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1260 snd_emu10k1_audio_enable(emu);
1262 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1265 #ifdef CONFIG_PROC_FS
1266 snd_emu10k1_proc_init(emu);
1269 snd_card_set_dev(card, &pci->dev);
1274 snd_emu10k1_free(emu);
1279 static unsigned char saved_regs[] = {
1280 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1281 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1282 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1283 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1284 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1285 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1288 static unsigned char saved_regs_audigy[] = {
1289 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1290 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1294 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1298 size = ARRAY_SIZE(saved_regs);
1300 size += ARRAY_SIZE(saved_regs_audigy);
1301 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1302 if (! emu->saved_ptr)
1304 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1306 if (emu->card_capabilities->ca0151_chip &&
1307 snd_p16v_alloc_pm_buffer(emu) < 0)
1312 static void free_pm_buffer(struct snd_emu10k1 *emu)
1314 vfree(emu->saved_ptr);
1315 snd_emu10k1_efx_free_pm_buffer(emu);
1316 if (emu->card_capabilities->ca0151_chip)
1317 snd_p16v_free_pm_buffer(emu);
1320 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1326 val = emu->saved_ptr;
1327 for (reg = saved_regs; *reg != 0xff; reg++)
1328 for (i = 0; i < NUM_G; i++, val++)
1329 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1331 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1332 for (i = 0; i < NUM_G; i++, val++)
1333 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1336 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1337 emu->saved_hcfg = inl(emu->port + HCFG);
1340 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1342 if (emu->card_capabilities->ecard)
1343 snd_emu10k1_ecard_init(emu);
1345 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1346 snd_emu10k1_init(emu, emu->enable_ir, 1);
1349 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1355 snd_emu10k1_audio_enable(emu);
1357 /* resore for spdif */
1359 outl(emu->port + A_IOCFG, emu->saved_a_iocfg);
1360 outl(emu->port + HCFG, emu->saved_hcfg);
1362 val = emu->saved_ptr;
1363 for (reg = saved_regs; *reg != 0xff; reg++)
1364 for (i = 0; i < NUM_G; i++, val++)
1365 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1367 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1368 for (i = 0; i < NUM_G; i++, val++)
1369 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1375 EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
1376 EXPORT_SYMBOL(snd_emu10k1_synth_free);
1377 EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
1378 EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
1379 EXPORT_SYMBOL(snd_emu10k1_memblk_map);
1381 EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
1382 EXPORT_SYMBOL(snd_emu10k1_voice_free);
1384 EXPORT_SYMBOL(snd_emu10k1_ptr_read);
1385 EXPORT_SYMBOL(snd_emu10k1_ptr_write);