2 * linux/arch/arm/mach-pxa/generic.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code common to all PXA machines.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <linux/ioport.h>
26 #include <linux/string.h>
28 #include <linux/sched.h>
29 #include <asm/cnt32_to_63.h>
30 #include <asm/div64.h>
32 #include <asm/hardware.h>
34 #include <asm/system.h>
35 #include <asm/pgtable.h>
36 #include <asm/mach/map.h>
38 #include <asm/arch/pxa-regs.h>
39 #include <asm/arch/udc.h>
40 #include <asm/arch/pxafb.h>
41 #include <asm/arch/mmc.h>
42 #include <asm/arch/irda.h>
43 #include <asm/arch/i2c.h>
48 * This is the PXA2xx sched_clock implementation. This has a resolution
49 * of at least 308ns and a maximum value that depends on the value of
52 * The return value is guaranteed to be monotonic in that range as
53 * long as there is always less than 582 seconds between successive
54 * calls to this function.
56 unsigned long long sched_clock(void)
58 unsigned long long v = cnt32_to_63(OSCR);
59 /* Note: top bit ov v needs cleared unless multiplier is even. */
61 #if CLOCK_TICK_RATE == 3686400
62 /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */
63 /* The <<1 is used to get rid of tick.hi top bit */
66 #elif CLOCK_TICK_RATE == 3250000
67 /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */
70 #elif CLOCK_TICK_RATE == 3249600
71 /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */
75 #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE"
77 * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
78 * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
79 * years range which is nice, but with higher computation cost.
83 unsigned long long val;
84 struct { unsigned long lo, hi; };
90 y = (unsigned long long)x.lo * NSEC_PER_SEC;
92 y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC;
93 x.hi = do_div(y, CLOCK_TICK_RATE);
94 do_div(x.val, CLOCK_TICK_RATE);
104 * Handy function to set GPIO alternate functions
107 void pxa_gpio_mode(int gpio_mode)
110 int gpio = gpio_mode & GPIO_MD_MASK_NR;
111 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
114 local_irq_save(flags);
115 if (gpio_mode & GPIO_DFLT_LOW)
116 GPCR(gpio) = GPIO_bit(gpio);
117 else if (gpio_mode & GPIO_DFLT_HIGH)
118 GPSR(gpio) = GPIO_bit(gpio);
119 if (gpio_mode & GPIO_MD_MASK_DIR)
120 GPDR(gpio) |= GPIO_bit(gpio);
122 GPDR(gpio) &= ~GPIO_bit(gpio);
123 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
124 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
125 local_irq_restore(flags);
128 EXPORT_SYMBOL(pxa_gpio_mode);
131 * Routine to safely enable or disable a clock in the CKEN
133 void pxa_set_cken(int clock, int enable)
136 local_irq_save(flags);
143 local_irq_restore(flags);
146 EXPORT_SYMBOL(pxa_set_cken);
149 * Intel PXA2xx internal register mapping.
151 * Note 1: not all PXA2xx variants implement all those addresses.
153 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
154 * and cache flush area.
156 static struct map_desc standard_io_desc[] __initdata = {
158 .virtual = 0xf2000000,
159 .pfn = __phys_to_pfn(0x40000000),
160 .length = 0x02000000,
163 .virtual = 0xf4000000,
164 .pfn = __phys_to_pfn(0x44000000),
165 .length = 0x00100000,
168 .virtual = 0xf6000000,
169 .pfn = __phys_to_pfn(0x48000000),
170 .length = 0x00100000,
173 .virtual = 0xf8000000,
174 .pfn = __phys_to_pfn(0x4c000000),
175 .length = 0x00100000,
178 .virtual = 0xfa000000,
179 .pfn = __phys_to_pfn(0x50000000),
180 .length = 0x00100000,
183 .virtual = 0xfe000000,
184 .pfn = __phys_to_pfn(0x58000000),
185 .length = 0x00100000,
187 }, { /* UNCACHED_PHYS_0 */
188 .virtual = 0xff000000,
189 .pfn = __phys_to_pfn(0x00000000),
190 .length = 0x00100000,
195 void __init pxa_map_io(void)
197 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
198 get_clk_frequency_khz(1);
202 static struct resource pxamci_resources[] = {
206 .flags = IORESOURCE_MEM,
211 .flags = IORESOURCE_IRQ,
215 static u64 pxamci_dmamask = 0xffffffffUL;
217 static struct platform_device pxamci_device = {
218 .name = "pxa2xx-mci",
221 .dma_mask = &pxamci_dmamask,
222 .coherent_dma_mask = 0xffffffff,
224 .num_resources = ARRAY_SIZE(pxamci_resources),
225 .resource = pxamci_resources,
228 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
230 pxamci_device.dev.platform_data = info;
234 static struct pxa2xx_udc_mach_info pxa_udc_info;
236 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
238 memcpy(&pxa_udc_info, info, sizeof *info);
241 static struct resource pxa2xx_udc_resources[] = {
245 .flags = IORESOURCE_MEM,
250 .flags = IORESOURCE_IRQ,
254 static u64 udc_dma_mask = ~(u32)0;
256 static struct platform_device udc_device = {
257 .name = "pxa2xx-udc",
259 .resource = pxa2xx_udc_resources,
260 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
262 .platform_data = &pxa_udc_info,
263 .dma_mask = &udc_dma_mask,
267 static struct resource pxafb_resources[] = {
271 .flags = IORESOURCE_MEM,
276 .flags = IORESOURCE_IRQ,
280 static u64 fb_dma_mask = ~(u64)0;
282 static struct platform_device pxafb_device = {
286 .dma_mask = &fb_dma_mask,
287 .coherent_dma_mask = 0xffffffff,
289 .num_resources = ARRAY_SIZE(pxafb_resources),
290 .resource = pxafb_resources,
293 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
295 pxafb_device.dev.platform_data = info;
298 void __init set_pxa_fb_parent(struct device *parent_dev)
300 pxafb_device.dev.parent = parent_dev;
303 static struct platform_device ffuart_device = {
304 .name = "pxa2xx-uart",
307 static struct platform_device btuart_device = {
308 .name = "pxa2xx-uart",
311 static struct platform_device stuart_device = {
312 .name = "pxa2xx-uart",
315 static struct platform_device hwuart_device = {
316 .name = "pxa2xx-uart",
320 static struct resource i2c_resources[] = {
324 .flags = IORESOURCE_MEM,
328 .flags = IORESOURCE_IRQ,
332 static struct platform_device i2c_device = {
333 .name = "pxa2xx-i2c",
335 .resource = i2c_resources,
336 .num_resources = ARRAY_SIZE(i2c_resources),
339 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
341 i2c_device.dev.platform_data = info;
344 static struct resource i2s_resources[] = {
348 .flags = IORESOURCE_MEM,
352 .flags = IORESOURCE_IRQ,
356 static struct platform_device i2s_device = {
357 .name = "pxa2xx-i2s",
359 .resource = i2s_resources,
360 .num_resources = ARRAY_SIZE(i2s_resources),
363 static u64 pxaficp_dmamask = ~(u32)0;
365 static struct platform_device pxaficp_device = {
369 .dma_mask = &pxaficp_dmamask,
370 .coherent_dma_mask = 0xffffffff,
374 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
376 pxaficp_device.dev.platform_data = info;
379 static struct platform_device pxartc_device = {
380 .name = "sa1100-rtc",
384 static struct platform_device *devices[] __initdata = {
397 static int __init pxa_init(void)
401 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
405 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
406 cpuid = read_cpuid(CPUID_ID);
407 if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
408 ((cpuid >> 4) & 0xfff) == 0x290)
409 ret = platform_device_register(&hwuart_device);
414 subsys_initcall(pxa_init);