2 * Driver for NEC VR4100 series Real Time Clock unit.
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/platform_device.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/irq.h>
25 #include <linux/mc146818rtc.h>
26 #include <linux/miscdevice.h>
27 #include <linux/module.h>
28 #include <linux/poll.h>
29 #include <linux/rtc.h>
30 #include <linux/spinlock.h>
31 #include <linux/types.h>
32 #include <linux/wait.h>
34 #include <asm/div64.h>
37 #include <asm/uaccess.h>
38 #include <asm/vr41xx/vr41xx.h>
40 MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
41 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
42 MODULE_LICENSE("GPL");
44 #define RTC1_TYPE1_START 0x0b0000c0UL
45 #define RTC1_TYPE1_END 0x0b0000dfUL
46 #define RTC2_TYPE1_START 0x0b0001c0UL
47 #define RTC2_TYPE1_END 0x0b0001dfUL
49 #define RTC1_TYPE2_START 0x0f000100UL
50 #define RTC1_TYPE2_END 0x0f00011fUL
51 #define RTC2_TYPE2_START 0x0f000120UL
52 #define RTC2_TYPE2_END 0x0f00013fUL
54 #define RTC1_SIZE 0x20
55 #define RTC2_SIZE 0x20
58 #define ETIMELREG 0x00
59 #define ETIMEMREG 0x02
60 #define ETIMEHREG 0x04
66 #define RTCL1LREG 0x10
67 #define RTCL1HREG 0x12
68 #define RTCL1CNTLREG 0x14
69 #define RTCL1CNTHREG 0x16
70 #define RTCL2LREG 0x18
71 #define RTCL2HREG 0x1a
72 #define RTCL2CNTLREG 0x1c
73 #define RTCL2CNTHREG 0x1e
78 #define TCLKCNTLREG 0x04
79 #define TCLKCNTHREG 0x06
81 #define RTCINTREG 0x1e
82 #define TCLOCK_INT 0x08
83 #define RTCLONG2_INT 0x04
84 #define RTCLONG1_INT 0x02
85 #define ELAPSEDTIME_INT 0x01
87 #define RTC_FREQUENCY 32768
88 #define MAX_PERIODIC_RATE 6553
89 #define MAX_USER_PERIODIC_RATE 64
91 static void __iomem *rtc1_base;
92 static void __iomem *rtc2_base;
94 #define rtc1_read(offset) readw(rtc1_base + (offset))
95 #define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
97 #define rtc2_read(offset) readw(rtc2_base + (offset))
98 #define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
100 static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
102 static spinlock_t rtc_task_lock;
103 static wait_queue_head_t rtc_wait;
104 static unsigned long rtc_irq_data;
105 static struct fasync_struct *rtc_async_queue;
106 static rtc_task_t *rtc_callback;
107 static char rtc_name[] = "RTC";
108 static unsigned long periodic_frequency;
109 static unsigned long periodic_count;
116 static rtc_status_t rtc_status;
120 FUNCTION_RTC_CONTROL,
123 struct resource rtc_resource[2] = {
125 .flags = IORESOURCE_MEM, },
127 .flags = IORESOURCE_MEM, },
130 #define RTC_NUM_RESOURCES sizeof(rtc_resource) / sizeof(struct resource)
132 static inline unsigned long read_elapsed_second(void)
134 unsigned long first_low, first_mid, first_high;
135 unsigned long second_low, second_mid, second_high;
138 first_low = rtc1_read(ETIMELREG);
139 first_mid = rtc1_read(ETIMEMREG);
140 first_high = rtc1_read(ETIMEHREG);
141 second_low = rtc1_read(ETIMELREG);
142 second_mid = rtc1_read(ETIMEMREG);
143 second_high = rtc1_read(ETIMEHREG);
144 } while (first_low != second_low || first_mid != second_mid ||
145 first_high != second_high);
147 return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
150 static inline void write_elapsed_second(unsigned long sec)
152 spin_lock_irq(&rtc_lock);
154 rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
155 rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
156 rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
158 spin_unlock_irq(&rtc_lock);
161 static void set_alarm(struct rtc_time *time)
163 unsigned long alarm_sec;
165 alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
166 time->tm_hour, time->tm_min, time->tm_sec);
168 spin_lock_irq(&rtc_lock);
170 rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
171 rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
172 rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
174 spin_unlock_irq(&rtc_lock);
177 static void read_alarm(struct rtc_time *time)
179 unsigned long low, mid, high;
181 spin_lock_irq(&rtc_lock);
183 low = rtc1_read(ECMPLREG);
184 mid = rtc1_read(ECMPMREG);
185 high = rtc1_read(ECMPHREG);
187 spin_unlock_irq(&rtc_lock);
189 to_tm((high << 17) | (mid << 1) | (low >> 15), time);
190 time->tm_year -= 1900;
193 static void read_time(struct rtc_time *time)
195 unsigned long epoch_sec, elapsed_sec;
197 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
198 elapsed_sec = read_elapsed_second();
200 to_tm(epoch_sec + elapsed_sec, time);
201 time->tm_year -= 1900;
204 static void set_time(struct rtc_time *time)
206 unsigned long epoch_sec, current_sec;
208 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
209 current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
210 time->tm_hour, time->tm_min, time->tm_sec);
212 write_elapsed_second(current_sec - epoch_sec);
215 static ssize_t rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
217 DECLARE_WAITQUEUE(wait, current);
218 unsigned long irq_data;
221 if (count != sizeof(unsigned int) && count != sizeof(unsigned long))
224 add_wait_queue(&rtc_wait, &wait);
227 __set_current_state(TASK_INTERRUPTIBLE);
229 spin_lock_irq(&rtc_lock);
230 irq_data = rtc_irq_data;
232 spin_unlock_irq(&rtc_lock);
237 if (file->f_flags & O_NONBLOCK) {
242 if (signal_pending(current)) {
243 retval = -ERESTARTSYS;
249 if (count == sizeof(unsigned int)) {
250 retval = put_user(irq_data, (unsigned int __user *)buf);
252 retval = sizeof(unsigned int);
254 retval = put_user(irq_data, (unsigned long __user *)buf);
256 retval = sizeof(unsigned long);
261 __set_current_state(TASK_RUNNING);
262 remove_wait_queue(&rtc_wait, &wait);
267 static unsigned int rtc_poll(struct file *file, struct poll_table_struct *table)
269 poll_wait(file, &rtc_wait, table);
271 if (rtc_irq_data != 0)
272 return POLLIN | POLLRDNORM;
277 static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, rtc_callfrom_t from)
279 struct rtc_time time;
284 enable_irq(ELAPSEDTIME_IRQ);
287 disable_irq(ELAPSEDTIME_IRQ);
290 enable_irq(RTCLONG1_IRQ);
293 disable_irq(RTCLONG1_IRQ);
296 if (copy_from_user(&time, (struct rtc_time __user *)arg,
297 sizeof(struct rtc_time)))
303 memset(&time, 0, sizeof(struct rtc_time));
307 memset(&time, 0, sizeof(struct rtc_time));
309 if (copy_to_user((void __user *)arg, &time, sizeof(struct rtc_time)))
313 if (capable(CAP_SYS_TIME) == 0)
316 if (copy_from_user(&time, (struct rtc_time __user *)arg,
317 sizeof(struct rtc_time)))
323 return put_user(periodic_frequency, (unsigned long __user *)arg);
326 if (arg > MAX_PERIODIC_RATE)
329 if (from == FUNCTION_RTC_IOCTL && arg > MAX_USER_PERIODIC_RATE &&
330 capable(CAP_SYS_RESOURCE) == 0)
333 periodic_frequency = arg;
335 count = RTC_FREQUENCY;
338 periodic_count = count;
340 spin_lock_irq(&rtc_lock);
342 rtc1_write(RTCL1LREG, count);
343 rtc1_write(RTCL1HREG, count >> 16);
345 spin_unlock_irq(&rtc_lock);
348 return put_user(epoch, (unsigned long __user *)arg);
350 /* Doesn't support before 1900 */
354 if (capable(CAP_SYS_TIME) == 0)
366 static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
369 return rtc_do_ioctl(cmd, arg, FUNCTION_RTC_IOCTL);
372 static int rtc_open(struct inode *inode, struct file *file)
374 spin_lock_irq(&rtc_lock);
376 if (rtc_status == RTC_OPEN) {
377 spin_unlock_irq(&rtc_lock);
381 rtc_status = RTC_OPEN;
384 spin_unlock_irq(&rtc_lock);
389 static int rtc_release(struct inode *inode, struct file *file)
391 if (file->f_flags & FASYNC)
392 (void)fasync_helper(-1, file, 0, &rtc_async_queue);
394 spin_lock_irq(&rtc_lock);
396 rtc1_write(ECMPLREG, 0);
397 rtc1_write(ECMPMREG, 0);
398 rtc1_write(ECMPHREG, 0);
399 rtc1_write(RTCL1LREG, 0);
400 rtc1_write(RTCL1HREG, 0);
402 rtc_status = RTC_RELEASE;
404 spin_unlock_irq(&rtc_lock);
406 disable_irq(ELAPSEDTIME_IRQ);
407 disable_irq(RTCLONG1_IRQ);
412 static int rtc_fasync(int fd, struct file *file, int on)
414 return fasync_helper(fd, file, on, &rtc_async_queue);
417 static struct file_operations rtc_fops = {
418 .owner = THIS_MODULE,
424 .release = rtc_release,
425 .fasync = rtc_fasync,
428 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id, struct pt_regs *regs)
430 spin_lock(&rtc_lock);
431 rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
433 rtc_irq_data += 0x100;
434 rtc_irq_data &= ~0xff;
435 rtc_irq_data |= RTC_AF;
436 spin_unlock(&rtc_lock);
438 spin_lock(&rtc_lock);
440 rtc_callback->func(rtc_callback->private_data);
441 spin_unlock(&rtc_lock);
443 wake_up_interruptible(&rtc_wait);
445 kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
450 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
452 unsigned long count = periodic_count;
454 spin_lock(&rtc_lock);
455 rtc2_write(RTCINTREG, RTCLONG1_INT);
457 rtc1_write(RTCL1LREG, count);
458 rtc1_write(RTCL1HREG, count >> 16);
460 rtc_irq_data += 0x100;
461 rtc_irq_data &= ~0xff;
462 rtc_irq_data |= RTC_PF;
463 spin_unlock(&rtc_lock);
465 spin_lock(&rtc_task_lock);
467 rtc_callback->func(rtc_callback->private_data);
468 spin_unlock(&rtc_task_lock);
470 wake_up_interruptible(&rtc_wait);
472 kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
477 int rtc_register(rtc_task_t *task)
479 if (task == NULL || task->func == NULL)
482 spin_lock_irq(&rtc_lock);
483 if (rtc_status == RTC_OPEN) {
484 spin_unlock_irq(&rtc_lock);
488 spin_lock(&rtc_task_lock);
489 if (rtc_callback != NULL) {
490 spin_unlock(&rtc_task_lock);
491 spin_unlock_irq(&rtc_task_lock);
496 spin_unlock(&rtc_task_lock);
498 rtc_status = RTC_OPEN;
500 spin_unlock_irq(&rtc_lock);
505 EXPORT_SYMBOL_GPL(rtc_register);
507 int rtc_unregister(rtc_task_t *task)
509 spin_lock_irq(&rtc_task_lock);
510 if (task == NULL || rtc_callback != task) {
511 spin_unlock_irq(&rtc_task_lock);
515 spin_lock(&rtc_lock);
517 rtc1_write(ECMPLREG, 0);
518 rtc1_write(ECMPMREG, 0);
519 rtc1_write(ECMPHREG, 0);
520 rtc1_write(RTCL1LREG, 0);
521 rtc1_write(RTCL1HREG, 0);
523 rtc_status = RTC_RELEASE;
525 spin_unlock(&rtc_lock);
529 spin_unlock_irq(&rtc_task_lock);
531 disable_irq(ELAPSEDTIME_IRQ);
532 disable_irq(RTCLONG1_IRQ);
537 EXPORT_SYMBOL_GPL(rtc_unregister);
539 int rtc_control(rtc_task_t *task, unsigned int cmd, unsigned long arg)
543 spin_lock_irq(&rtc_task_lock);
545 if (rtc_callback != task)
548 rtc_do_ioctl(cmd, arg, FUNCTION_RTC_CONTROL);
550 spin_unlock_irq(&rtc_task_lock);
555 EXPORT_SYMBOL_GPL(rtc_control);
557 static struct miscdevice rtc_miscdevice = {
563 static int rtc_probe(struct platform_device *pdev)
568 if (pdev->num_resources != 2)
571 rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
572 if (rtc1_base == NULL)
575 rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
576 if (rtc2_base == NULL) {
582 retval = misc_register(&rtc_miscdevice);
591 spin_lock_irq(&rtc_lock);
593 rtc1_write(ECMPLREG, 0);
594 rtc1_write(ECMPMREG, 0);
595 rtc1_write(ECMPHREG, 0);
596 rtc1_write(RTCL1LREG, 0);
597 rtc1_write(RTCL1HREG, 0);
599 rtc_status = RTC_RELEASE;
602 spin_unlock_irq(&rtc_lock);
604 init_waitqueue_head(&rtc_wait);
606 irq = ELAPSEDTIME_IRQ;
607 retval = request_irq(irq, elapsedtime_interrupt, SA_INTERRUPT,
608 "elapsed_time", NULL);
611 retval = request_irq(irq, rtclong1_interrupt, SA_INTERRUPT,
616 printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
617 if (irq == RTCLONG1_IRQ)
618 free_irq(ELAPSEDTIME_IRQ, NULL);
626 disable_irq(ELAPSEDTIME_IRQ);
627 disable_irq(RTCLONG1_IRQ);
629 spin_lock_init(&rtc_task_lock);
631 printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
636 static int rtc_remove(struct platform_device *dev)
640 retval = misc_deregister(&rtc_miscdevice);
644 free_irq(ELAPSEDTIME_IRQ, NULL);
645 free_irq(RTCLONG1_IRQ, NULL);
646 if (rtc1_base != NULL)
648 if (rtc2_base != NULL)
654 static struct platform_device *rtc_platform_device;
656 static struct platform_driver rtc_device_driver = {
658 .remove = rtc_remove,
664 static int __devinit vr41xx_rtc_init(void)
668 switch (current_cpu_data.cputype) {
671 rtc_resource[0].start = RTC1_TYPE1_START;
672 rtc_resource[0].end = RTC1_TYPE1_END;
673 rtc_resource[1].start = RTC2_TYPE1_START;
674 rtc_resource[1].end = RTC2_TYPE1_END;
679 rtc_resource[0].start = RTC1_TYPE2_START;
680 rtc_resource[0].end = RTC1_TYPE2_END;
681 rtc_resource[1].start = RTC2_TYPE2_START;
682 rtc_resource[1].end = RTC2_TYPE2_END;
689 rtc_platform_device = platform_device_register_simple("RTC", -1, rtc_resource, RTC_NUM_RESOURCES);
690 if (IS_ERR(rtc_platform_device))
691 return PTR_ERR(rtc_platform_device);
693 retval = platform_driver_register(&rtc_device_driver);
695 platform_device_unregister(rtc_platform_device);
700 static void __devexit vr41xx_rtc_exit(void)
702 platform_driver_unregister(&rtc_device_driver);
704 platform_device_unregister(rtc_platform_device);
707 module_init(vr41xx_rtc_init);
708 module_exit(vr41xx_rtc_exit);