git.oblomov.eu Git - linux-2.6/blob - drivers/char/drm/i830_dma.c

   1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  28  *          Jeff Hartmann <jhartmann@valinux.com>
  29  *          Keith Whitwell <keith@tungstengraphics.com>
  30  *          Abraham vd Merwe <abraham@2d3d.co.za>
  31  *
  32  */
  33
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "i830_drm.h"
  37 #include "i830_drv.h"
  38 #include <linux/interrupt.h>    /* For task queue support */
  39 #include <linux/pagemap.h>      /* For FASTCALL on unlock_page() */
  40 #include <linux/delay.h>
  41 #include <asm/uaccess.h>
  42
  43 #define I830_BUF_FREE           2
  44 #define I830_BUF_CLIENT         1
  45 #define I830_BUF_HARDWARE       0
  46
  47 #define I830_BUF_UNMAPPED 0
  48 #define I830_BUF_MAPPED   1
  49
  50 static struct drm_buf *i830_freelist_get(struct drm_device * dev)
  51 {
  52         struct drm_device_dma *dma = dev->dma;
  53         int i;
  54         int used;
  55
  56         /* Linear search might not be the best solution */
  57
  58         for (i = 0; i < dma->buf_count; i++) {
  59                 struct drm_buf *buf = dma->buflist[i];
  60                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  61                 /* In use is already a pointer */
  62                 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
  63                                I830_BUF_CLIENT);
  64                 if (used == I830_BUF_FREE) {
  65                         return buf;
  66                 }
  67         }
  68         return NULL;
  69 }
  70
  71 /* This should only be called if the buffer is not sent to the hardware
  72  * yet, the hardware updates in use for us once its on the ring buffer.
  73  */
  74
  75 static int i830_freelist_put(struct drm_device * dev, struct drm_buf * buf)
  76 {
  77         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  78         int used;
  79
  80         /* In use is already a pointer */
  81         used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
  82         if (used != I830_BUF_CLIENT) {
  83                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
  84                 return -EINVAL;
  85         }
  86
  87         return 0;
  88 }
  89
  90 static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
  91 {
  92         struct drm_file *priv = filp->private_data;
  93         struct drm_device *dev;
  94         drm_i830_private_t *dev_priv;
  95         struct drm_buf *buf;
  96         drm_i830_buf_priv_t *buf_priv;
  97
  98         lock_kernel();
  99         dev = priv->head->dev;
 100         dev_priv = dev->dev_private;
 101         buf = dev_priv->mmap_buffer;
 102         buf_priv = buf->dev_private;
 103
 104         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
 105         vma->vm_file = filp;
 106
 107         buf_priv->currently_mapped = I830_BUF_MAPPED;
 108         unlock_kernel();
 109
 110         if (io_remap_pfn_range(vma, vma->vm_start,
 111                                vma->vm_pgoff,
 112                                vma->vm_end - vma->vm_start, vma->vm_page_prot))
 113                 return -EAGAIN;
 114         return 0;
 115 }
 116
 117 static const struct file_operations i830_buffer_fops = {
 118         .open = drm_open,
 119         .release = drm_release,
 120         .ioctl = drm_ioctl,
 121         .mmap = i830_mmap_buffers,
 122         .fasync = drm_fasync,
 123 };
 124
 125 static int i830_map_buffer(struct drm_buf * buf, struct file *filp)
 126 {
 127         struct drm_file *priv = filp->private_data;
 128         struct drm_device *dev = priv->head->dev;
 129         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 130         drm_i830_private_t *dev_priv = dev->dev_private;
 131         const struct file_operations *old_fops;
 132         unsigned long virtual;
 133         int retcode = 0;
 134
 135         if (buf_priv->currently_mapped == I830_BUF_MAPPED)
 136                 return -EINVAL;
 137
 138         down_write(&current->mm->mmap_sem);
 139         old_fops = filp->f_op;
 140         filp->f_op = &i830_buffer_fops;
 141         dev_priv->mmap_buffer = buf;
 142         virtual = do_mmap(filp, 0, buf->total, PROT_READ | PROT_WRITE,
 143                           MAP_SHARED, buf->bus_address);
 144         dev_priv->mmap_buffer = NULL;
 145         filp->f_op = old_fops;
 146         if (IS_ERR((void *)virtual)) {  /* ugh */
 147                 /* Real error */
 148                 DRM_ERROR("mmap error\n");
 149                 retcode = PTR_ERR((void *)virtual);
 150                 buf_priv->virtual = NULL;
 151         } else {
 152                 buf_priv->virtual = (void __user *)virtual;
 153         }
 154         up_write(&current->mm->mmap_sem);
 155
 156         return retcode;
 157 }
 158
 159 static int i830_unmap_buffer(struct drm_buf * buf)
 160 {
 161         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 162         int retcode = 0;
 163
 164         if (buf_priv->currently_mapped != I830_BUF_MAPPED)
 165                 return -EINVAL;
 166
 167         down_write(&current->mm->mmap_sem);
 168         retcode = do_munmap(current->mm,
 169                             (unsigned long)buf_priv->virtual,
 170                             (size_t) buf->total);
 171         up_write(&current->mm->mmap_sem);
 172
 173         buf_priv->currently_mapped = I830_BUF_UNMAPPED;
 174         buf_priv->virtual = NULL;
 175
 176         return retcode;
 177 }
 178
 179 static int i830_dma_get_buffer(struct drm_device * dev, drm_i830_dma_t * d,
 180                                struct file *filp)
 181 {
 182         struct drm_buf *buf;
 183         drm_i830_buf_priv_t *buf_priv;
 184         int retcode = 0;
 185
 186         buf = i830_freelist_get(dev);
 187         if (!buf) {
 188                 retcode = -ENOMEM;
 189                 DRM_DEBUG("retcode=%d\n", retcode);
 190                 return retcode;
 191         }
 192
 193         retcode = i830_map_buffer(buf, filp);
 194         if (retcode) {
 195                 i830_freelist_put(dev, buf);
 196                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 197                 return retcode;
 198         }
 199         buf->filp = filp;
 200         buf_priv = buf->dev_private;
 201         d->granted = 1;
 202         d->request_idx = buf->idx;
 203         d->request_size = buf->total;
 204         d->virtual = buf_priv->virtual;
 205
 206         return retcode;
 207 }
 208
 209 static int i830_dma_cleanup(struct drm_device * dev)
 210 {
 211         struct drm_device_dma *dma = dev->dma;
 212
 213         /* Make sure interrupts are disabled here because the uninstall ioctl
 214          * may not have been called from userspace and after dev_private
 215          * is freed, it's too late.
 216          */
 217         if (dev->irq_enabled)
 218                 drm_irq_uninstall(dev);
 219
 220         if (dev->dev_private) {
 221                 int i;
 222                 drm_i830_private_t *dev_priv =
 223                     (drm_i830_private_t *) dev->dev_private;
 224
 225                 if (dev_priv->ring.virtual_start) {
 226                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
 227                 }
 228                 if (dev_priv->hw_status_page) {
 229                         pci_free_consistent(dev->pdev, PAGE_SIZE,
 230                                             dev_priv->hw_status_page,
 231                                             dev_priv->dma_status_page);
 232                         /* Need to rewrite hardware status page */
 233                         I830_WRITE(0x02080, 0x1ffff000);
 234                 }
 235
 236                 drm_free(dev->dev_private, sizeof(drm_i830_private_t),
 237                          DRM_MEM_DRIVER);
 238                 dev->dev_private = NULL;
 239
 240                 for (i = 0; i < dma->buf_count; i++) {
 241                         struct drm_buf *buf = dma->buflist[i];
 242                         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 243                         if (buf_priv->kernel_virtual && buf->total)
 244                                 drm_core_ioremapfree(&buf_priv->map, dev);
 245                 }
 246         }
 247         return 0;
 248 }
 249
 250 int i830_wait_ring(struct drm_device * dev, int n, const char *caller)
 251 {
 252         drm_i830_private_t *dev_priv = dev->dev_private;
 253         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 254         int iters = 0;
 255         unsigned long end;
 256         unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 257
 258         end = jiffies + (HZ * 3);
 259         while (ring->space < n) {
 260                 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 261                 ring->space = ring->head - (ring->tail + 8);
 262                 if (ring->space < 0)
 263                         ring->space += ring->Size;
 264
 265                 if (ring->head != last_head) {
 266                         end = jiffies + (HZ * 3);
 267                         last_head = ring->head;
 268                 }
 269
 270                 iters++;
 271                 if (time_before(end, jiffies)) {
 272                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
 273                         DRM_ERROR("lockup\n");
 274                         goto out_wait_ring;
 275                 }
 276                 udelay(1);
 277                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
 278         }
 279
 280       out_wait_ring:
 281         return iters;
 282 }
 283
 284 static void i830_kernel_lost_context(struct drm_device * dev)
 285 {
 286         drm_i830_private_t *dev_priv = dev->dev_private;
 287         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 288
 289         ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 290         ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
 291         ring->space = ring->head - (ring->tail + 8);
 292         if (ring->space < 0)
 293                 ring->space += ring->Size;
 294
 295         if (ring->head == ring->tail)
 296                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
 297 }
 298
 299 static int i830_freelist_init(struct drm_device * dev, drm_i830_private_t * dev_priv)
 300 {
 301         struct drm_device_dma *dma = dev->dma;
 302         int my_idx = 36;
 303         u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
 304         int i;
 305
 306         if (dma->buf_count > 1019) {
 307                 /* Not enough space in the status page for the freelist */
 308                 return -EINVAL;
 309         }
 310
 311         for (i = 0; i < dma->buf_count; i++) {
 312                 struct drm_buf *buf = dma->buflist[i];
 313                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 314
 315                 buf_priv->in_use = hw_status++;
 316                 buf_priv->my_use_idx = my_idx;
 317                 my_idx += 4;
 318
 319                 *buf_priv->in_use = I830_BUF_FREE;
 320
 321                 buf_priv->map.offset = buf->bus_address;
 322                 buf_priv->map.size = buf->total;
 323                 buf_priv->map.type = _DRM_AGP;
 324                 buf_priv->map.flags = 0;
 325                 buf_priv->map.mtrr = 0;
 326
 327                 drm_core_ioremap(&buf_priv->map, dev);
 328                 buf_priv->kernel_virtual = buf_priv->map.handle;
 329         }
 330         return 0;
 331 }
 332
 333 static int i830_dma_initialize(struct drm_device * dev,
 334                                drm_i830_private_t * dev_priv,
 335                                drm_i830_init_t * init)
 336 {
 337         drm_map_list_t *r_list;
 338
 339         memset(dev_priv, 0, sizeof(drm_i830_private_t));
 340
 341         list_for_each_entry(r_list, &dev->maplist, head) {
 342                 if (r_list->map &&
 343                     r_list->map->type == _DRM_SHM &&
 344                     r_list->map->flags & _DRM_CONTAINS_LOCK) {
 345                         dev_priv->sarea_map = r_list->map;
 346                         break;
 347                 }
 348         }
 349
 350         if (!dev_priv->sarea_map) {
 351                 dev->dev_private = (void *)dev_priv;
 352                 i830_dma_cleanup(dev);
 353                 DRM_ERROR("can not find sarea!\n");
 354                 return -EINVAL;
 355         }
 356         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 357         if (!dev_priv->mmio_map) {
 358                 dev->dev_private = (void *)dev_priv;
 359                 i830_dma_cleanup(dev);
 360                 DRM_ERROR("can not find mmio map!\n");
 361                 return -EINVAL;
 362         }
 363         dev->agp_buffer_token = init->buffers_offset;
 364         dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
 365         if (!dev->agp_buffer_map) {
 366                 dev->dev_private = (void *)dev_priv;
 367                 i830_dma_cleanup(dev);
 368                 DRM_ERROR("can not find dma buffer map!\n");
 369                 return -EINVAL;
 370         }
 371
 372         dev_priv->sarea_priv = (drm_i830_sarea_t *)
 373             ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
 374
 375         dev_priv->ring.Start = init->ring_start;
 376         dev_priv->ring.End = init->ring_end;
 377         dev_priv->ring.Size = init->ring_size;
 378
 379         dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
 380         dev_priv->ring.map.size = init->ring_size;
 381         dev_priv->ring.map.type = _DRM_AGP;
 382         dev_priv->ring.map.flags = 0;
 383         dev_priv->ring.map.mtrr = 0;
 384
 385         drm_core_ioremap(&dev_priv->ring.map, dev);
 386
 387         if (dev_priv->ring.map.handle == NULL) {
 388                 dev->dev_private = (void *)dev_priv;
 389                 i830_dma_cleanup(dev);
 390                 DRM_ERROR("can not ioremap virtual address for"
 391                           " ring buffer\n");
 392                 return DRM_ERR(ENOMEM);
 393         }
 394
 395         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 396
 397         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 398
 399         dev_priv->w = init->w;
 400         dev_priv->h = init->h;
 401         dev_priv->pitch = init->pitch;
 402         dev_priv->back_offset = init->back_offset;
 403         dev_priv->depth_offset = init->depth_offset;
 404         dev_priv->front_offset = init->front_offset;
 405
 406         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
 407         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
 408         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
 409
 410         DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1);
 411         DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
 412         DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1);
 413         DRM_DEBUG("pitch_bits %x\n", init->pitch_bits);
 414
 415         dev_priv->cpp = init->cpp;
 416         /* We are using separate values as placeholders for mechanisms for
 417          * private backbuffer/depthbuffer usage.
 418          */
 419
 420         dev_priv->back_pitch = init->back_pitch;
 421         dev_priv->depth_pitch = init->depth_pitch;
 422         dev_priv->do_boxes = 0;
 423         dev_priv->use_mi_batchbuffer_start = 0;
 424
 425         /* Program Hardware Status Page */
 426         dev_priv->hw_status_page =
 427             pci_alloc_consistent(dev->pdev, PAGE_SIZE,
 428                                  &dev_priv->dma_status_page);
 429         if (!dev_priv->hw_status_page) {
 430                 dev->dev_private = (void *)dev_priv;
 431                 i830_dma_cleanup(dev);
 432                 DRM_ERROR("Can not allocate hardware status page\n");
 433                 return -ENOMEM;
 434         }
 435         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 436         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 437
 438         I830_WRITE(0x02080, dev_priv->dma_status_page);
 439         DRM_DEBUG("Enabled hardware status page\n");
 440
 441         /* Now we need to init our freelist */
 442         if (i830_freelist_init(dev, dev_priv) != 0) {
 443                 dev->dev_private = (void *)dev_priv;
 444                 i830_dma_cleanup(dev);
 445                 DRM_ERROR("Not enough space in the status page for"
 446                           " the freelist\n");
 447                 return -ENOMEM;
 448         }
 449         dev->dev_private = (void *)dev_priv;
 450
 451         return 0;
 452 }
 453
 454 static int i830_dma_init(struct inode *inode, struct file *filp,
 455                          unsigned int cmd, unsigned long arg)
 456 {
 457         struct drm_file *priv = filp->private_data;
 458         struct drm_device *dev = priv->head->dev;
 459         drm_i830_private_t *dev_priv;
 460         drm_i830_init_t init;
 461         int retcode = 0;
 462
 463         if (copy_from_user(&init, (void *__user)arg, sizeof(init)))
 464                 return -EFAULT;
 465
 466         switch (init.func) {
 467         case I830_INIT_DMA:
 468                 dev_priv = drm_alloc(sizeof(drm_i830_private_t),
 469                                      DRM_MEM_DRIVER);
 470                 if (dev_priv == NULL)
 471                         return -ENOMEM;
 472                 retcode = i830_dma_initialize(dev, dev_priv, &init);
 473                 break;
 474         case I830_CLEANUP_DMA:
 475                 retcode = i830_dma_cleanup(dev);
 476                 break;
 477         default:
 478                 retcode = -EINVAL;
 479                 break;
 480         }
 481
 482         return retcode;
 483 }
 484
 485 #define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
 486 #define ST1_ENABLE               (1<<16)
 487 #define ST1_MASK                 (0xffff)
 488
 489 /* Most efficient way to verify state for the i830 is as it is
 490  * emitted.  Non-conformant state is silently dropped.
 491  */
 492 static void i830EmitContextVerified(struct drm_device * dev, unsigned int *code)
 493 {
 494         drm_i830_private_t *dev_priv = dev->dev_private;
 495         int i, j = 0;
 496         unsigned int tmp;
 497         RING_LOCALS;
 498
 499         BEGIN_LP_RING(I830_CTX_SETUP_SIZE + 4);
 500
 501         for (i = 0; i < I830_CTXREG_BLENDCOLR0; i++) {
 502                 tmp = code[i];
 503                 if ((tmp & (7 << 29)) == CMD_3D &&
 504                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
 505                         OUT_RING(tmp);
 506                         j++;
 507                 } else {
 508                         DRM_ERROR("Skipping %d\n", i);
 509                 }
 510         }
 511
 512         OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD);
 513         OUT_RING(code[I830_CTXREG_BLENDCOLR]);
 514         j += 2;
 515
 516         for (i = I830_CTXREG_VF; i < I830_CTXREG_MCSB0; i++) {
 517                 tmp = code[i];
 518                 if ((tmp & (7 << 29)) == CMD_3D &&
 519                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
 520                         OUT_RING(tmp);
 521                         j++;
 522                 } else {
 523                         DRM_ERROR("Skipping %d\n", i);
 524                 }
 525         }
 526
 527         OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD);
 528         OUT_RING(code[I830_CTXREG_MCSB1]);
 529         j += 2;
 530
 531         if (j & 1)
 532                 OUT_RING(0);
 533
 534         ADVANCE_LP_RING();
 535 }
 536
 537 static void i830EmitTexVerified(struct drm_device * dev, unsigned int *code)
 538 {
 539         drm_i830_private_t *dev_priv = dev->dev_private;
 540         int i, j = 0;
 541         unsigned int tmp;
 542         RING_LOCALS;
 543
 544         if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
 545             (code[I830_TEXREG_MI0] & ~(0xf * LOAD_TEXTURE_MAP0)) ==
 546             (STATE3D_LOAD_STATE_IMMEDIATE_2 | 4)) {
 547
 548                 BEGIN_LP_RING(I830_TEX_SETUP_SIZE);
 549
 550                 OUT_RING(code[I830_TEXREG_MI0]);        /* TM0LI */
 551                 OUT_RING(code[I830_TEXREG_MI1]);        /* TM0S0 */
 552                 OUT_RING(code[I830_TEXREG_MI2]);        /* TM0S1 */
 553                 OUT_RING(code[I830_TEXREG_MI3]);        /* TM0S2 */
 554                 OUT_RING(code[I830_TEXREG_MI4]);        /* TM0S3 */
 555                 OUT_RING(code[I830_TEXREG_MI5]);        /* TM0S4 */
 556
 557                 for (i = 6; i < I830_TEX_SETUP_SIZE; i++) {
 558                         tmp = code[i];
 559                         OUT_RING(tmp);
 560                         j++;
 561                 }
 562
 563                 if (j & 1)
 564                         OUT_RING(0);
 565
 566                 ADVANCE_LP_RING();
 567         } else
 568                 printk("rejected packet %x\n", code[0]);
 569 }
 570
 571 static void i830EmitTexBlendVerified(struct drm_device * dev,
 572                                      unsigned int *code, unsigned int num)
 573 {
 574         drm_i830_private_t *dev_priv = dev->dev_private;
 575         int i, j = 0;
 576         unsigned int tmp;
 577         RING_LOCALS;
 578
 579         if (!num)
 580                 return;
 581
 582         BEGIN_LP_RING(num + 1);
 583
 584         for (i = 0; i < num; i++) {
 585                 tmp = code[i];
 586                 OUT_RING(tmp);
 587                 j++;
 588         }
 589
 590         if (j & 1)
 591                 OUT_RING(0);
 592
 593         ADVANCE_LP_RING();
 594 }
 595
 596 static void i830EmitTexPalette(struct drm_device * dev,
 597                                unsigned int *palette, int number, int is_shared)
 598 {
 599         drm_i830_private_t *dev_priv = dev->dev_private;
 600         int i;
 601         RING_LOCALS;
 602
 603         return;
 604
 605         BEGIN_LP_RING(258);
 606
 607         if (is_shared == 1) {
 608                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
 609                          MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH);
 610         } else {
 611                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
 612         }
 613         for (i = 0; i < 256; i++) {
 614                 OUT_RING(palette[i]);
 615         }
 616         OUT_RING(0);
 617         /* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop!
 618          */
 619 }
 620
 621 /* Need to do some additional checking when setting the dest buffer.
 622  */
 623 static void i830EmitDestVerified(struct drm_device * dev, unsigned int *code)
 624 {
 625         drm_i830_private_t *dev_priv = dev->dev_private;
 626         unsigned int tmp;
 627         RING_LOCALS;
 628
 629         BEGIN_LP_RING(I830_DEST_SETUP_SIZE + 10);
 630
 631         tmp = code[I830_DESTREG_CBUFADDR];
 632         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
 633                 if (((int)outring) & 8) {
 634                         OUT_RING(0);
 635                         OUT_RING(0);
 636                 }
 637
 638                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
 639                 OUT_RING(BUF_3D_ID_COLOR_BACK |
 640                          BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
 641                          BUF_3D_USE_FENCE);
 642                 OUT_RING(tmp);
 643                 OUT_RING(0);
 644
 645                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
 646                 OUT_RING(BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
 647                          BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
 648                 OUT_RING(dev_priv->zi1);
 649                 OUT_RING(0);
 650         } else {
 651                 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
 652                           tmp, dev_priv->front_di1, dev_priv->back_di1);
 653         }
 654
 655         /* invarient:
 656          */
 657
 658         OUT_RING(GFX_OP_DESTBUFFER_VARS);
 659         OUT_RING(code[I830_DESTREG_DV1]);
 660
 661         OUT_RING(GFX_OP_DRAWRECT_INFO);
 662         OUT_RING(code[I830_DESTREG_DR1]);
 663         OUT_RING(code[I830_DESTREG_DR2]);
 664         OUT_RING(code[I830_DESTREG_DR3]);
 665         OUT_RING(code[I830_DESTREG_DR4]);
 666
 667         /* Need to verify this */
 668         tmp = code[I830_DESTREG_SENABLE];
 669         if ((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
 670                 OUT_RING(tmp);
 671         } else {
 672                 DRM_ERROR("bad scissor enable\n");
 673                 OUT_RING(0);
 674         }
 675
 676         OUT_RING(GFX_OP_SCISSOR_RECT);
 677         OUT_RING(code[I830_DESTREG_SR1]);
 678         OUT_RING(code[I830_DESTREG_SR2]);
 679         OUT_RING(0);
 680
 681         ADVANCE_LP_RING();
 682 }
 683
 684 static void i830EmitStippleVerified(struct drm_device * dev, unsigned int *code)
 685 {
 686         drm_i830_private_t *dev_priv = dev->dev_private;
 687         RING_LOCALS;
 688
 689         BEGIN_LP_RING(2);
 690         OUT_RING(GFX_OP_STIPPLE);
 691         OUT_RING(code[1]);
 692         ADVANCE_LP_RING();
 693 }
 694
 695 static void i830EmitState(struct drm_device * dev)
 696 {
 697         drm_i830_private_t *dev_priv = dev->dev_private;
 698         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 699         unsigned int dirty = sarea_priv->dirty;
 700
 701         DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
 702
 703         if (dirty & I830_UPLOAD_BUFFERS) {
 704                 i830EmitDestVerified(dev, sarea_priv->BufferState);
 705                 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
 706         }
 707
 708         if (dirty & I830_UPLOAD_CTX) {
 709                 i830EmitContextVerified(dev, sarea_priv->ContextState);
 710                 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
 711         }
 712
 713         if (dirty & I830_UPLOAD_TEX0) {
 714                 i830EmitTexVerified(dev, sarea_priv->TexState[0]);
 715                 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
 716         }
 717
 718         if (dirty & I830_UPLOAD_TEX1) {
 719                 i830EmitTexVerified(dev, sarea_priv->TexState[1]);
 720                 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
 721         }
 722
 723         if (dirty & I830_UPLOAD_TEXBLEND0) {
 724                 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[0],
 725                                          sarea_priv->TexBlendStateWordsUsed[0]);
 726                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
 727         }
 728
 729         if (dirty & I830_UPLOAD_TEXBLEND1) {
 730                 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[1],
 731                                          sarea_priv->TexBlendStateWordsUsed[1]);
 732                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
 733         }
 734
 735         if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
 736                 i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
 737         } else {
 738                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
 739                         i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
 740                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
 741                 }
 742                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
 743                         i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
 744                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
 745                 }
 746
 747                 /* 1.3:
 748                  */
 749 #if 0
 750                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
 751                         i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
 752                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 753                 }
 754                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
 755                         i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
 756                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 757                 }
 758 #endif
 759         }
 760
 761         /* 1.3:
 762          */
 763         if (dirty & I830_UPLOAD_STIPPLE) {
 764                 i830EmitStippleVerified(dev, sarea_priv->StippleState);
 765                 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
 766         }
 767
 768         if (dirty & I830_UPLOAD_TEX2) {
 769                 i830EmitTexVerified(dev, sarea_priv->TexState2);
 770                 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
 771         }
 772
 773         if (dirty & I830_UPLOAD_TEX3) {
 774                 i830EmitTexVerified(dev, sarea_priv->TexState3);
 775                 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
 776         }
 777
 778         if (dirty & I830_UPLOAD_TEXBLEND2) {
 779                 i830EmitTexBlendVerified(dev,
 780                                          sarea_priv->TexBlendState2,
 781                                          sarea_priv->TexBlendStateWordsUsed2);
 782
 783                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
 784         }
 785
 786         if (dirty & I830_UPLOAD_TEXBLEND3) {
 787                 i830EmitTexBlendVerified(dev,
 788                                          sarea_priv->TexBlendState3,
 789                                          sarea_priv->TexBlendStateWordsUsed3);
 790                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
 791         }
 792 }
 793
 794 /* ================================================================
 795  * Performance monitoring functions
 796  */
 797
 798 static void i830_fill_box(struct drm_device * dev,
 799                           int x, int y, int w, int h, int r, int g, int b)
 800 {
 801         drm_i830_private_t *dev_priv = dev->dev_private;
 802         u32 color;
 803         unsigned int BR13, CMD;
 804         RING_LOCALS;
 805
 806         BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1 << 24);
 807         CMD = XY_COLOR_BLT_CMD;
 808         x += dev_priv->sarea_priv->boxes[0].x1;
 809         y += dev_priv->sarea_priv->boxes[0].y1;
 810
 811         if (dev_priv->cpp == 4) {
 812                 BR13 |= (1 << 25);
 813                 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
 814                 color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
 815         } else {
 816                 color = (((r & 0xf8) << 8) |
 817                          ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
 818         }
 819
 820         BEGIN_LP_RING(6);
 821         OUT_RING(CMD);
 822         OUT_RING(BR13);
 823         OUT_RING((y << 16) | x);
 824         OUT_RING(((y + h) << 16) | (x + w));
 825
 826         if (dev_priv->current_page == 1) {
 827                 OUT_RING(dev_priv->front_offset);
 828         } else {
 829                 OUT_RING(dev_priv->back_offset);
 830         }
 831
 832         OUT_RING(color);
 833         ADVANCE_LP_RING();
 834 }
 835
 836 static void i830_cp_performance_boxes(struct drm_device * dev)
 837 {
 838         drm_i830_private_t *dev_priv = dev->dev_private;
 839
 840         /* Purple box for page flipping
 841          */
 842         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP)
 843                 i830_fill_box(dev, 4, 4, 8, 8, 255, 0, 255);
 844
 845         /* Red box if we have to wait for idle at any point
 846          */
 847         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT)
 848                 i830_fill_box(dev, 16, 4, 8, 8, 255, 0, 0);
 849
 850         /* Blue box: lost context?
 851          */
 852         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT)
 853                 i830_fill_box(dev, 28, 4, 8, 8, 0, 0, 255);
 854
 855         /* Yellow box for texture swaps
 856          */
 857         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD)
 858                 i830_fill_box(dev, 40, 4, 8, 8, 255, 255, 0);
 859
 860         /* Green box if hardware never idles (as far as we can tell)
 861          */
 862         if (!(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY))
 863                 i830_fill_box(dev, 64, 4, 8, 8, 0, 255, 0);
 864
 865         /* Draw bars indicating number of buffers allocated
 866          * (not a great measure, easily confused)
 867          */
 868         if (dev_priv->dma_used) {
 869                 int bar = dev_priv->dma_used / 10240;
 870                 if (bar > 100)
 871                         bar = 100;
 872                 if (bar < 1)
 873                         bar = 1;
 874                 i830_fill_box(dev, 4, 16, bar, 4, 196, 128, 128);
 875                 dev_priv->dma_used = 0;
 876         }
 877
 878         dev_priv->sarea_priv->perf_boxes = 0;
 879 }
 880
 881 static void i830_dma_dispatch_clear(struct drm_device * dev, int flags,
 882                                     unsigned int clear_color,
 883                                     unsigned int clear_zval,
 884                                     unsigned int clear_depthmask)
 885 {
 886         drm_i830_private_t *dev_priv = dev->dev_private;
 887         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 888         int nbox = sarea_priv->nbox;
 889         struct drm_clip_rect *pbox = sarea_priv->boxes;
 890         int pitch = dev_priv->pitch;
 891         int cpp = dev_priv->cpp;
 892         int i;
 893         unsigned int BR13, CMD, D_CMD;
 894         RING_LOCALS;
 895
 896         if (dev_priv->current_page == 1) {
 897                 unsigned int tmp = flags;
 898
 899                 flags &= ~(I830_FRONT | I830_BACK);
 900                 if (tmp & I830_FRONT)
 901                         flags |= I830_BACK;
 902                 if (tmp & I830_BACK)
 903                         flags |= I830_FRONT;
 904         }
 905
 906         i830_kernel_lost_context(dev);
 907
 908         switch (cpp) {
 909         case 2:
 910                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
 911                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 912                 break;
 913         case 4:
 914                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
 915                 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
 916                        XY_COLOR_BLT_WRITE_RGB);
 917                 D_CMD = XY_COLOR_BLT_CMD;
 918                 if (clear_depthmask & 0x00ffffff)
 919                         D_CMD |= XY_COLOR_BLT_WRITE_RGB;
 920                 if (clear_depthmask & 0xff000000)
 921                         D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
 922                 break;
 923         default:
 924                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
 925                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 926                 break;
 927         }
 928
 929         if (nbox > I830_NR_SAREA_CLIPRECTS)
 930                 nbox = I830_NR_SAREA_CLIPRECTS;
 931
 932         for (i = 0; i < nbox; i++, pbox++) {
 933                 if (pbox->x1 > pbox->x2 ||
 934                     pbox->y1 > pbox->y2 ||
 935                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
 936                         continue;
 937
 938                 if (flags & I830_FRONT) {
 939                         DRM_DEBUG("clear front\n");
 940                         BEGIN_LP_RING(6);
 941                         OUT_RING(CMD);
 942                         OUT_RING(BR13);
 943                         OUT_RING((pbox->y1 << 16) | pbox->x1);
 944                         OUT_RING((pbox->y2 << 16) | pbox->x2);
 945                         OUT_RING(dev_priv->front_offset);
 946                         OUT_RING(clear_color);
 947                         ADVANCE_LP_RING();
 948                 }
 949
 950                 if (flags & I830_BACK) {
 951                         DRM_DEBUG("clear back\n");
 952                         BEGIN_LP_RING(6);
 953                         OUT_RING(CMD);
 954                         OUT_RING(BR13);
 955                         OUT_RING((pbox->y1 << 16) | pbox->x1);
 956                         OUT_RING((pbox->y2 << 16) | pbox->x2);
 957                         OUT_RING(dev_priv->back_offset);
 958                         OUT_RING(clear_color);
 959                         ADVANCE_LP_RING();
 960                 }
 961
 962                 if (flags & I830_DEPTH) {
 963                         DRM_DEBUG("clear depth\n");
 964                         BEGIN_LP_RING(6);
 965                         OUT_RING(D_CMD);
 966                         OUT_RING(BR13);
 967                         OUT_RING((pbox->y1 << 16) | pbox->x1);
 968                         OUT_RING((pbox->y2 << 16) | pbox->x2);
 969                         OUT_RING(dev_priv->depth_offset);
 970                         OUT_RING(clear_zval);
 971                         ADVANCE_LP_RING();
 972                 }
 973         }
 974 }
 975
 976 static void i830_dma_dispatch_swap(struct drm_device * dev)
 977 {
 978         drm_i830_private_t *dev_priv = dev->dev_private;
 979         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 980         int nbox = sarea_priv->nbox;
 981         struct drm_clip_rect *pbox = sarea_priv->boxes;
 982         int pitch = dev_priv->pitch;
 983         int cpp = dev_priv->cpp;
 984         int i;
 985         unsigned int CMD, BR13;
 986         RING_LOCALS;
 987
 988         DRM_DEBUG("swapbuffers\n");
 989
 990         i830_kernel_lost_context(dev);
 991
 992         if (dev_priv->do_boxes)
 993                 i830_cp_performance_boxes(dev);
 994
 995         switch (cpp) {
 996         case 2:
 997                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
 998                 CMD = XY_SRC_COPY_BLT_CMD;
 999                 break;
1000         case 4:
1001                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
1002                 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
1003                        XY_SRC_COPY_BLT_WRITE_RGB);
1004                 break;
1005         default:
1006                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
1007                 CMD = XY_SRC_COPY_BLT_CMD;
1008                 break;
1009         }
1010
1011         if (nbox > I830_NR_SAREA_CLIPRECTS)
1012                 nbox = I830_NR_SAREA_CLIPRECTS;
1013
1014         for (i = 0; i < nbox; i++, pbox++) {
1015                 if (pbox->x1 > pbox->x2 ||
1016                     pbox->y1 > pbox->y2 ||
1017                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1018                         continue;
1019
1020                 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1021                           pbox->x1, pbox->y1, pbox->x2, pbox->y2);
1022
1023                 BEGIN_LP_RING(8);
1024                 OUT_RING(CMD);
1025                 OUT_RING(BR13);
1026                 OUT_RING((pbox->y1 << 16) | pbox->x1);
1027                 OUT_RING((pbox->y2 << 16) | pbox->x2);
1028
1029                 if (dev_priv->current_page == 0)
1030                         OUT_RING(dev_priv->front_offset);
1031                 else
1032                         OUT_RING(dev_priv->back_offset);
1033
1034                 OUT_RING((pbox->y1 << 16) | pbox->x1);
1035                 OUT_RING(BR13 & 0xffff);
1036
1037                 if (dev_priv->current_page == 0)
1038                         OUT_RING(dev_priv->back_offset);
1039                 else
1040                         OUT_RING(dev_priv->front_offset);
1041
1042                 ADVANCE_LP_RING();
1043         }
1044 }
1045
1046 static void i830_dma_dispatch_flip(struct drm_device * dev)
1047 {
1048         drm_i830_private_t *dev_priv = dev->dev_private;
1049         RING_LOCALS;
1050
1051         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
1052                   __FUNCTION__,
1053                   dev_priv->current_page,
1054                   dev_priv->sarea_priv->pf_current_page);
1055
1056         i830_kernel_lost_context(dev);
1057
1058         if (dev_priv->do_boxes) {
1059                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1060                 i830_cp_performance_boxes(dev);
1061         }
1062
1063         BEGIN_LP_RING(2);
1064         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1065         OUT_RING(0);
1066         ADVANCE_LP_RING();
1067
1068         BEGIN_LP_RING(6);
1069         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
1070         OUT_RING(0);
1071         if (dev_priv->current_page == 0) {
1072                 OUT_RING(dev_priv->back_offset);
1073                 dev_priv->current_page = 1;
1074         } else {
1075                 OUT_RING(dev_priv->front_offset);
1076                 dev_priv->current_page = 0;
1077         }
1078         OUT_RING(0);
1079         ADVANCE_LP_RING();
1080
1081         BEGIN_LP_RING(2);
1082         OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
1083         OUT_RING(0);
1084         ADVANCE_LP_RING();
1085
1086         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1087 }
1088
1089 static void i830_dma_dispatch_vertex(struct drm_device * dev,
1090                                      struct drm_buf * buf, int discard, int used)
1091 {
1092         drm_i830_private_t *dev_priv = dev->dev_private;
1093         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1094         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1095         struct drm_clip_rect *box = sarea_priv->boxes;
1096         int nbox = sarea_priv->nbox;
1097         unsigned long address = (unsigned long)buf->bus_address;
1098         unsigned long start = address - dev->agp->base;
1099         int i = 0, u;
1100         RING_LOCALS;
1101
1102         i830_kernel_lost_context(dev);
1103
1104         if (nbox > I830_NR_SAREA_CLIPRECTS)
1105                 nbox = I830_NR_SAREA_CLIPRECTS;
1106
1107         if (discard) {
1108                 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1109                             I830_BUF_HARDWARE);
1110                 if (u != I830_BUF_CLIENT) {
1111                         DRM_DEBUG("xxxx 2\n");
1112                 }
1113         }
1114
1115         if (used > 4 * 1023)
1116                 used = 0;
1117
1118         if (sarea_priv->dirty)
1119                 i830EmitState(dev);
1120
1121         DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1122                   address, used, nbox);
1123
1124         dev_priv->counter++;
1125         DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1126         DRM_DEBUG("i830_dma_dispatch\n");
1127         DRM_DEBUG("start : %lx\n", start);
1128         DRM_DEBUG("used : %d\n", used);
1129         DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1130
1131         if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1132                 u32 *vp = buf_priv->kernel_virtual;
1133
1134                 vp[0] = (GFX_OP_PRIMITIVE |
1135                          sarea_priv->vertex_prim | ((used / 4) - 2));
1136
1137                 if (dev_priv->use_mi_batchbuffer_start) {
1138                         vp[used / 4] = MI_BATCH_BUFFER_END;
1139                         used += 4;
1140                 }
1141
1142                 if (used & 4) {
1143                         vp[used / 4] = 0;
1144                         used += 4;
1145                 }
1146
1147                 i830_unmap_buffer(buf);
1148         }
1149
1150         if (used) {
1151                 do {
1152                         if (i < nbox) {
1153                                 BEGIN_LP_RING(6);
1154                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
1155                                 OUT_RING(sarea_priv->
1156                                          BufferState[I830_DESTREG_DR1]);
1157                                 OUT_RING(box[i].x1 | (box[i].y1 << 16));
1158                                 OUT_RING(box[i].x2 | (box[i].y2 << 16));
1159                                 OUT_RING(sarea_priv->
1160                                          BufferState[I830_DESTREG_DR4]);
1161                                 OUT_RING(0);
1162                                 ADVANCE_LP_RING();
1163                         }
1164
1165                         if (dev_priv->use_mi_batchbuffer_start) {
1166                                 BEGIN_LP_RING(2);
1167                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
1168                                 OUT_RING(start | MI_BATCH_NON_SECURE);
1169                                 ADVANCE_LP_RING();
1170                         } else {
1171                                 BEGIN_LP_RING(4);
1172                                 OUT_RING(MI_BATCH_BUFFER);
1173                                 OUT_RING(start | MI_BATCH_NON_SECURE);
1174                                 OUT_RING(start + used - 4);
1175                                 OUT_RING(0);
1176                                 ADVANCE_LP_RING();
1177                         }
1178
1179                 } while (++i < nbox);
1180         }
1181
1182         if (discard) {
1183                 dev_priv->counter++;
1184
1185                 (void)cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1186                               I830_BUF_HARDWARE);
1187
1188                 BEGIN_LP_RING(8);
1189                 OUT_RING(CMD_STORE_DWORD_IDX);
1190                 OUT_RING(20);
1191                 OUT_RING(dev_priv->counter);
1192                 OUT_RING(CMD_STORE_DWORD_IDX);
1193                 OUT_RING(buf_priv->my_use_idx);
1194                 OUT_RING(I830_BUF_FREE);
1195                 OUT_RING(CMD_REPORT_HEAD);
1196                 OUT_RING(0);
1197                 ADVANCE_LP_RING();
1198         }
1199 }
1200
1201 static void i830_dma_quiescent(struct drm_device * dev)
1202 {
1203         drm_i830_private_t *dev_priv = dev->dev_private;
1204         RING_LOCALS;
1205
1206         i830_kernel_lost_context(dev);
1207
1208         BEGIN_LP_RING(4);
1209         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1210         OUT_RING(CMD_REPORT_HEAD);
1211         OUT_RING(0);
1212         OUT_RING(0);
1213         ADVANCE_LP_RING();
1214
1215         i830_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
1216 }
1217
1218 static int i830_flush_queue(struct drm_device * dev)
1219 {
1220         drm_i830_private_t *dev_priv = dev->dev_private;
1221         struct drm_device_dma *dma = dev->dma;
1222         int i, ret = 0;
1223         RING_LOCALS;
1224
1225         i830_kernel_lost_context(dev);
1226
1227         BEGIN_LP_RING(2);
1228         OUT_RING(CMD_REPORT_HEAD);
1229         OUT_RING(0);
1230         ADVANCE_LP_RING();
1231
1232         i830_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
1233
1234         for (i = 0; i < dma->buf_count; i++) {
1235                 struct drm_buf *buf = dma->buflist[i];
1236                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1237
1238                 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1239                                    I830_BUF_FREE);
1240
1241                 if (used == I830_BUF_HARDWARE)
1242                         DRM_DEBUG("reclaimed from HARDWARE\n");
1243                 if (used == I830_BUF_CLIENT)
1244                         DRM_DEBUG("still on client\n");
1245         }
1246
1247         return ret;
1248 }
1249
1250 /* Must be called with the lock held */
1251 static void i830_reclaim_buffers(struct drm_device * dev, struct file *filp)
1252 {
1253         struct drm_device_dma *dma = dev->dma;
1254         int i;
1255
1256         if (!dma)
1257                 return;
1258         if (!dev->dev_private)
1259                 return;
1260         if (!dma->buflist)
1261                 return;
1262
1263         i830_flush_queue(dev);
1264
1265         for (i = 0; i < dma->buf_count; i++) {
1266                 struct drm_buf *buf = dma->buflist[i];
1267                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1268
1269                 if (buf->filp == filp && buf_priv) {
1270                         int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1271                                            I830_BUF_FREE);
1272
1273                         if (used == I830_BUF_CLIENT)
1274                                 DRM_DEBUG("reclaimed from client\n");
1275                         if (buf_priv->currently_mapped == I830_BUF_MAPPED)
1276                                 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1277                 }
1278         }
1279 }
1280
1281 static int i830_flush_ioctl(struct inode *inode, struct file *filp,
1282                             unsigned int cmd, unsigned long arg)
1283 {
1284         struct drm_file *priv = filp->private_data;
1285         struct drm_device *dev = priv->head->dev;
1286
1287         LOCK_TEST_WITH_RETURN(dev, filp);
1288
1289         i830_flush_queue(dev);
1290         return 0;
1291 }
1292
1293 static int i830_dma_vertex(struct inode *inode, struct file *filp,
1294                            unsigned int cmd, unsigned long arg)
1295 {
1296         struct drm_file *priv = filp->private_data;
1297         struct drm_device *dev = priv->head->dev;
1298         struct drm_device_dma *dma = dev->dma;
1299         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1300         u32 *hw_status = dev_priv->hw_status_page;
1301         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1302             dev_priv->sarea_priv;
1303         drm_i830_vertex_t vertex;
1304
1305         if (copy_from_user
1306             (&vertex, (drm_i830_vertex_t __user *) arg, sizeof(vertex)))
1307                 return -EFAULT;
1308
1309         LOCK_TEST_WITH_RETURN(dev, filp);
1310
1311         DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1312                   vertex.idx, vertex.used, vertex.discard);
1313
1314         if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1315                 return -EINVAL;
1316
1317         i830_dma_dispatch_vertex(dev,
1318                                  dma->buflist[vertex.idx],
1319                                  vertex.discard, vertex.used);
1320
1321         sarea_priv->last_enqueue = dev_priv->counter - 1;
1322         sarea_priv->last_dispatch = (int)hw_status[5];
1323
1324         return 0;
1325 }
1326
1327 static int i830_clear_bufs(struct inode *inode, struct file *filp,
1328                            unsigned int cmd, unsigned long arg)
1329 {
1330         struct drm_file *priv = filp->private_data;
1331         struct drm_device *dev = priv->head->dev;
1332         drm_i830_clear_t clear;
1333
1334         if (copy_from_user
1335             (&clear, (drm_i830_clear_t __user *) arg, sizeof(clear)))
1336                 return -EFAULT;
1337
1338         LOCK_TEST_WITH_RETURN(dev, filp);
1339
1340         /* GH: Someone's doing nasty things... */
1341         if (!dev->dev_private) {
1342                 return -EINVAL;
1343         }
1344
1345         i830_dma_dispatch_clear(dev, clear.flags,
1346                                 clear.clear_color,
1347                                 clear.clear_depth, clear.clear_depthmask);
1348         return 0;
1349 }
1350
1351 static int i830_swap_bufs(struct inode *inode, struct file *filp,
1352                           unsigned int cmd, unsigned long arg)
1353 {
1354         struct drm_file *priv = filp->private_data;
1355         struct drm_device *dev = priv->head->dev;
1356
1357         DRM_DEBUG("i830_swap_bufs\n");
1358
1359         LOCK_TEST_WITH_RETURN(dev, filp);
1360
1361         i830_dma_dispatch_swap(dev);
1362         return 0;
1363 }
1364
1365 /* Not sure why this isn't set all the time:
1366  */
1367 static void i830_do_init_pageflip(struct drm_device * dev)
1368 {
1369         drm_i830_private_t *dev_priv = dev->dev_private;
1370
1371         DRM_DEBUG("%s\n", __FUNCTION__);
1372         dev_priv->page_flipping = 1;
1373         dev_priv->current_page = 0;
1374         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1375 }
1376
1377 static int i830_do_cleanup_pageflip(struct drm_device * dev)
1378 {
1379         drm_i830_private_t *dev_priv = dev->dev_private;
1380
1381         DRM_DEBUG("%s\n", __FUNCTION__);
1382         if (dev_priv->current_page != 0)
1383                 i830_dma_dispatch_flip(dev);
1384
1385         dev_priv->page_flipping = 0;
1386         return 0;
1387 }
1388
1389 static int i830_flip_bufs(struct inode *inode, struct file *filp,
1390                           unsigned int cmd, unsigned long arg)
1391 {
1392         struct drm_file *priv = filp->private_data;
1393         struct drm_device *dev = priv->head->dev;
1394         drm_i830_private_t *dev_priv = dev->dev_private;
1395
1396         DRM_DEBUG("%s\n", __FUNCTION__);
1397
1398         LOCK_TEST_WITH_RETURN(dev, filp);
1399
1400         if (!dev_priv->page_flipping)
1401                 i830_do_init_pageflip(dev);
1402
1403         i830_dma_dispatch_flip(dev);
1404         return 0;
1405 }
1406
1407 static int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1408                        unsigned long arg)
1409 {
1410         struct drm_file *priv = filp->private_data;
1411         struct drm_device *dev = priv->head->dev;
1412         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1413         u32 *hw_status = dev_priv->hw_status_page;
1414         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1415             dev_priv->sarea_priv;
1416
1417         sarea_priv->last_dispatch = (int)hw_status[5];
1418         return 0;
1419 }
1420
1421 static int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1422                        unsigned long arg)
1423 {
1424         struct drm_file *priv = filp->private_data;
1425         struct drm_device *dev = priv->head->dev;
1426         int retcode = 0;
1427         drm_i830_dma_t d;
1428         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1429         u32 *hw_status = dev_priv->hw_status_page;
1430         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1431             dev_priv->sarea_priv;
1432
1433         DRM_DEBUG("getbuf\n");
1434         if (copy_from_user(&d, (drm_i830_dma_t __user *) arg, sizeof(d)))
1435                 return -EFAULT;
1436
1437         LOCK_TEST_WITH_RETURN(dev, filp);
1438
1439         d.granted = 0;
1440
1441         retcode = i830_dma_get_buffer(dev, &d, filp);
1442
1443         DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1444                   current->pid, retcode, d.granted);
1445
1446         if (copy_to_user((void __user *) arg, &d, sizeof(d)))
1447                 return -EFAULT;
1448         sarea_priv->last_dispatch = (int)hw_status[5];
1449
1450         return retcode;
1451 }
1452
1453 static int i830_copybuf(struct inode *inode,
1454                         struct file *filp, unsigned int cmd, unsigned long arg)
1455 {
1456         /* Never copy - 2.4.x doesn't need it */
1457         return 0;
1458 }
1459
1460 static int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1461                        unsigned long arg)
1462 {
1463         return 0;
1464 }
1465
1466 static int i830_getparam(struct inode *inode, struct file *filp,
1467                          unsigned int cmd, unsigned long arg)
1468 {
1469         struct drm_file *priv = filp->private_data;
1470         struct drm_device *dev = priv->head->dev;
1471         drm_i830_private_t *dev_priv = dev->dev_private;
1472         drm_i830_getparam_t param;
1473         int value;
1474
1475         if (!dev_priv) {
1476                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1477                 return -EINVAL;
1478         }
1479
1480         if (copy_from_user
1481             (&param, (drm_i830_getparam_t __user *) arg, sizeof(param)))
1482                 return -EFAULT;
1483
1484         switch (param.param) {
1485         case I830_PARAM_IRQ_ACTIVE:
1486                 value = dev->irq_enabled;
1487                 break;
1488         default:
1489                 return -EINVAL;
1490         }
1491
1492         if (copy_to_user(param.value, &value, sizeof(int))) {
1493                 DRM_ERROR("copy_to_user\n");
1494                 return -EFAULT;
1495         }
1496
1497         return 0;
1498 }
1499
1500 static int i830_setparam(struct inode *inode, struct file *filp,
1501                          unsigned int cmd, unsigned long arg)
1502 {
1503         struct drm_file *priv = filp->private_data;
1504         struct drm_device *dev = priv->head->dev;
1505         drm_i830_private_t *dev_priv = dev->dev_private;
1506         drm_i830_setparam_t param;
1507
1508         if (!dev_priv) {
1509                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1510                 return -EINVAL;
1511         }
1512
1513         if (copy_from_user
1514             (&param, (drm_i830_setparam_t __user *) arg, sizeof(param)))
1515                 return -EFAULT;
1516
1517         switch (param.param) {
1518         case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1519                 dev_priv->use_mi_batchbuffer_start = param.value;
1520                 break;
1521         default:
1522                 return -EINVAL;
1523         }
1524
1525         return 0;
1526 }
1527
1528 int i830_driver_load(struct drm_device *dev, unsigned long flags)
1529 {
1530         /* i830 has 4 more counters */
1531         dev->counters += 4;
1532         dev->types[6] = _DRM_STAT_IRQ;
1533         dev->types[7] = _DRM_STAT_PRIMARY;
1534         dev->types[8] = _DRM_STAT_SECONDARY;
1535         dev->types[9] = _DRM_STAT_DMA;
1536
1537         return 0;
1538 }
1539
1540 void i830_driver_lastclose(struct drm_device * dev)
1541 {
1542         i830_dma_cleanup(dev);
1543 }
1544
1545 void i830_driver_preclose(struct drm_device * dev, DRMFILE filp)
1546 {
1547         if (dev->dev_private) {
1548                 drm_i830_private_t *dev_priv = dev->dev_private;
1549                 if (dev_priv->page_flipping) {
1550                         i830_do_cleanup_pageflip(dev);
1551                 }
1552         }
1553 }
1554
1555 void i830_driver_reclaim_buffers_locked(struct drm_device * dev, struct file *filp)
1556 {
1557         i830_reclaim_buffers(dev, filp);
1558 }
1559
1560 int i830_driver_dma_quiescent(struct drm_device * dev)
1561 {
1562         i830_dma_quiescent(dev);
1563         return 0;
1564 }
1565
1566 drm_ioctl_desc_t i830_ioctls[] = {
1567         [DRM_IOCTL_NR(DRM_I830_INIT)] = {i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
1568         [DRM_IOCTL_NR(DRM_I830_VERTEX)] = {i830_dma_vertex, DRM_AUTH},
1569         [DRM_IOCTL_NR(DRM_I830_CLEAR)] = {i830_clear_bufs, DRM_AUTH},
1570         [DRM_IOCTL_NR(DRM_I830_FLUSH)] = {i830_flush_ioctl, DRM_AUTH},
1571         [DRM_IOCTL_NR(DRM_I830_GETAGE)] = {i830_getage, DRM_AUTH},
1572         [DRM_IOCTL_NR(DRM_I830_GETBUF)] = {i830_getbuf, DRM_AUTH},
1573         [DRM_IOCTL_NR(DRM_I830_SWAP)] = {i830_swap_bufs, DRM_AUTH},
1574         [DRM_IOCTL_NR(DRM_I830_COPY)] = {i830_copybuf, DRM_AUTH},
1575         [DRM_IOCTL_NR(DRM_I830_DOCOPY)] = {i830_docopy, DRM_AUTH},
1576         [DRM_IOCTL_NR(DRM_I830_FLIP)] = {i830_flip_bufs, DRM_AUTH},
1577         [DRM_IOCTL_NR(DRM_I830_IRQ_EMIT)] = {i830_irq_emit, DRM_AUTH},
1578         [DRM_IOCTL_NR(DRM_I830_IRQ_WAIT)] = {i830_irq_wait, DRM_AUTH},
1579         [DRM_IOCTL_NR(DRM_I830_GETPARAM)] = {i830_getparam, DRM_AUTH},
1580         [DRM_IOCTL_NR(DRM_I830_SETPARAM)] = {i830_setparam, DRM_AUTH}
1581 };
1582
1583 int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
1584
1585 /**
1586  * Determine if the device really is AGP or not.
1587  *
1588  * All Intel graphics chipsets are treated as AGP, even if they are really
1589  * PCI-e.
1590  *
1591  * \param dev   The device to be tested.
1592  *
1593  * \returns
1594  * A value of 1 is always retured to indictate every i8xx is AGP.
1595  */
1596 int i830_driver_device_is_agp(struct drm_device * dev)
1597 {
1598         return 1;
1599 }