2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/mmc/host.h>
27 #include <linux/mmc/protocol.h>
31 #include <asm/scatterlist.h>
32 #include <asm/sizes.h>
34 #include <asm/arch/pxa-regs.h>
35 #include <asm/arch/mmc.h>
39 #define DRIVER_NAME "pxa2xx-mci"
53 unsigned int power_mode;
54 struct pxamci_platform_data *pdata;
56 struct mmc_request *mrq;
57 struct mmc_command *cmd;
58 struct mmc_data *data;
61 struct pxa_dma_desc *sg_cpu;
67 static void pxamci_stop_clock(struct pxamci_host *host)
69 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
70 unsigned long timeout = 10000;
73 writel(STOP_CLOCK, host->base + MMC_STRPCL);
76 v = readl(host->base + MMC_STAT);
77 if (!(v & STAT_CLK_EN))
83 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
87 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
91 spin_lock_irqsave(&host->lock, flags);
93 writel(host->imask, host->base + MMC_I_MASK);
94 spin_unlock_irqrestore(&host->lock, flags);
97 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
101 spin_lock_irqsave(&host->lock, flags);
103 writel(host->imask, host->base + MMC_I_MASK);
104 spin_unlock_irqrestore(&host->lock, flags);
107 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
109 unsigned int nob = data->blocks;
110 unsigned long long clks;
111 unsigned int timeout;
117 if (data->flags & MMC_DATA_STREAM)
120 writel(nob, host->base + MMC_NOB);
121 writel(data->blksz, host->base + MMC_BLKLEN);
123 clks = (unsigned long long)data->timeout_ns * CLOCKRATE;
124 do_div(clks, 1000000000UL);
125 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
126 writel((timeout + 255) / 256, host->base + MMC_RDTO);
128 if (data->flags & MMC_DATA_READ) {
129 host->dma_dir = DMA_FROM_DEVICE;
130 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
132 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
134 host->dma_dir = DMA_TO_DEVICE;
135 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
137 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
140 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
142 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
145 for (i = 0; i < host->dma_len; i++) {
146 if (data->flags & MMC_DATA_READ) {
147 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
148 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
150 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
151 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
153 host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
154 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
155 sizeof(struct pxa_dma_desc);
157 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
160 DDADR(host->dma) = host->sg_dma;
161 DCSR(host->dma) = DCSR_RUN;
164 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
166 WARN_ON(host->cmd != NULL);
169 if (cmd->flags & MMC_RSP_BUSY)
172 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
173 switch (RSP_TYPE(mmc_resp_type(cmd))) {
174 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
175 cmdat |= CMDAT_RESP_SHORT;
177 case RSP_TYPE(MMC_RSP_R3):
178 cmdat |= CMDAT_RESP_R3;
180 case RSP_TYPE(MMC_RSP_R2):
181 cmdat |= CMDAT_RESP_R2;
187 writel(cmd->opcode, host->base + MMC_CMD);
188 writel(cmd->arg >> 16, host->base + MMC_ARGH);
189 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
190 writel(cmdat, host->base + MMC_CMDAT);
191 writel(host->clkrt, host->base + MMC_CLKRT);
193 writel(START_CLOCK, host->base + MMC_STRPCL);
195 pxamci_enable_irq(host, END_CMD_RES);
198 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
203 mmc_request_done(host->mmc, mrq);
206 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
208 struct mmc_command *cmd = host->cmd;
218 * Did I mention this is Sick. We always need to
219 * discard the upper 8 bits of the first 16-bit word.
221 v = readl(host->base + MMC_RES) & 0xffff;
222 for (i = 0; i < 4; i++) {
223 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
224 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
225 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
229 if (stat & STAT_TIME_OUT_RESPONSE) {
230 cmd->error = MMC_ERR_TIMEOUT;
231 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
234 * workaround for erratum #42:
235 * Intel PXA27x Family Processor Specification Update Rev 001
237 if (cmd->opcode == MMC_ALL_SEND_CID ||
238 cmd->opcode == MMC_SEND_CSD ||
239 cmd->opcode == MMC_SEND_CID) {
240 /* a bogus CRC error can appear if the msb of
241 the 15 byte response is a one */
242 if ((cmd->resp[0] & 0x80000000) == 0)
243 cmd->error = MMC_ERR_BADCRC;
245 pr_debug("ignoring CRC from command %d - *risky*\n",cmd->opcode);
248 cmd->error = MMC_ERR_BADCRC;
252 pxamci_disable_irq(host, END_CMD_RES);
253 if (host->data && cmd->error == MMC_ERR_NONE) {
254 pxamci_enable_irq(host, DATA_TRAN_DONE);
256 pxamci_finish_request(host, host->mrq);
262 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
264 struct mmc_data *data = host->data;
270 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
273 if (stat & STAT_READ_TIME_OUT)
274 data->error = MMC_ERR_TIMEOUT;
275 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
276 data->error = MMC_ERR_BADCRC;
279 * There appears to be a hardware design bug here. There seems to
280 * be no way to find out how much data was transferred to the card.
281 * This means that if there was an error on any block, we mark all
282 * data blocks as being in error.
284 if (data->error == MMC_ERR_NONE)
285 data->bytes_xfered = data->blocks * data->blksz;
287 data->bytes_xfered = 0;
289 pxamci_disable_irq(host, DATA_TRAN_DONE);
292 if (host->mrq->stop) {
293 pxamci_stop_clock(host);
294 pxamci_start_cmd(host, host->mrq->stop, 0);
296 pxamci_finish_request(host, host->mrq);
302 static irqreturn_t pxamci_irq(int irq, void *devid)
304 struct pxamci_host *host = devid;
308 ireg = readl(host->base + MMC_I_REG);
311 unsigned stat = readl(host->base + MMC_STAT);
313 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
315 if (ireg & END_CMD_RES)
316 handled |= pxamci_cmd_done(host, stat);
317 if (ireg & DATA_TRAN_DONE)
318 handled |= pxamci_data_done(host, stat);
321 return IRQ_RETVAL(handled);
324 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
326 struct pxamci_host *host = mmc_priv(mmc);
329 WARN_ON(host->mrq != NULL);
333 pxamci_stop_clock(host);
336 host->cmdat &= ~CMDAT_INIT;
339 pxamci_setup_data(host, mrq->data);
341 cmdat &= ~CMDAT_BUSY;
342 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
343 if (mrq->data->flags & MMC_DATA_WRITE)
344 cmdat |= CMDAT_WRITE;
346 if (mrq->data->flags & MMC_DATA_STREAM)
347 cmdat |= CMDAT_STREAM;
350 pxamci_start_cmd(host, mrq->cmd, cmdat);
353 static int pxamci_get_ro(struct mmc_host *mmc)
355 struct pxamci_host *host = mmc_priv(mmc);
357 if (host->pdata && host->pdata->get_ro)
358 return host->pdata->get_ro(mmc_dev(mmc));
359 /* Host doesn't support read only detection so assume writeable */
363 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
365 struct pxamci_host *host = mmc_priv(mmc);
368 unsigned int clk = CLOCKRATE / ios->clock;
369 if (CLOCKRATE / clk > ios->clock)
371 host->clkrt = fls(clk) - 1;
372 pxa_set_cken(CKEN12_MMC, 1);
375 * we write clkrt on the next command
378 pxamci_stop_clock(host);
379 pxa_set_cken(CKEN12_MMC, 0);
382 if (host->power_mode != ios->power_mode) {
383 host->power_mode = ios->power_mode;
385 if (host->pdata && host->pdata->setpower)
386 host->pdata->setpower(mmc_dev(mmc), ios->vdd);
388 if (ios->power_mode == MMC_POWER_ON)
389 host->cmdat |= CMDAT_INIT;
392 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
393 host->clkrt, host->cmdat);
396 static const struct mmc_host_ops pxamci_ops = {
397 .request = pxamci_request,
398 .get_ro = pxamci_get_ro,
399 .set_ios = pxamci_set_ios,
402 static void pxamci_dma_irq(int dma, void *devid)
404 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
405 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
408 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
410 struct pxamci_host *host = mmc_priv(devid);
412 mmc_detect_change(devid, host->pdata->detect_delay);
416 static int pxamci_probe(struct platform_device *pdev)
418 struct mmc_host *mmc;
419 struct pxamci_host *host = NULL;
423 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
424 irq = platform_get_irq(pdev, 0);
428 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
432 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
438 mmc->ops = &pxamci_ops;
439 mmc->f_min = CLOCKRATE_MIN;
440 mmc->f_max = CLOCKRATE_MAX;
443 * We can do SG-DMA, but we don't because we never know how much
444 * data we successfully wrote to the card.
446 mmc->max_phys_segs = NR_SG;
449 * Our hardware DMA can handle a maximum of one page per SG entry.
451 mmc->max_seg_size = PAGE_SIZE;
454 * Block length register is 10 bits.
456 mmc->max_blk_size = 1023;
459 * Block count register is 16 bits.
461 mmc->max_blk_count = 65535;
463 host = mmc_priv(mmc);
466 host->pdata = pdev->dev.platform_data;
467 mmc->ocr_avail = host->pdata ?
468 host->pdata->ocr_mask :
469 MMC_VDD_32_33|MMC_VDD_33_34;
471 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
477 spin_lock_init(&host->lock);
480 host->imask = MMC_I_MASK_ALL;
482 host->base = ioremap(r->start, SZ_4K);
489 * Ensure that the host controller is shut down, and setup
492 pxamci_stop_clock(host);
493 writel(0, host->base + MMC_SPI);
494 writel(64, host->base + MMC_RESTO);
495 writel(host->imask, host->base + MMC_I_MASK);
497 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
498 pxamci_dma_irq, host);
504 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
508 platform_set_drvdata(pdev, mmc);
510 if (host->pdata && host->pdata->init)
511 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
520 pxa_free_dma(host->dma);
524 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
532 static int pxamci_remove(struct platform_device *pdev)
534 struct mmc_host *mmc = platform_get_drvdata(pdev);
536 platform_set_drvdata(pdev, NULL);
539 struct pxamci_host *host = mmc_priv(mmc);
541 if (host->pdata && host->pdata->exit)
542 host->pdata->exit(&pdev->dev, mmc);
544 mmc_remove_host(mmc);
546 pxamci_stop_clock(host);
547 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
548 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
549 host->base + MMC_I_MASK);
554 free_irq(host->irq, host);
555 pxa_free_dma(host->dma);
557 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
559 release_resource(host->res);
567 static int pxamci_suspend(struct platform_device *dev, pm_message_t state)
569 struct mmc_host *mmc = platform_get_drvdata(dev);
573 ret = mmc_suspend_host(mmc, state);
578 static int pxamci_resume(struct platform_device *dev)
580 struct mmc_host *mmc = platform_get_drvdata(dev);
584 ret = mmc_resume_host(mmc);
589 #define pxamci_suspend NULL
590 #define pxamci_resume NULL
593 static struct platform_driver pxamci_driver = {
594 .probe = pxamci_probe,
595 .remove = pxamci_remove,
596 .suspend = pxamci_suspend,
597 .resume = pxamci_resume,
603 static int __init pxamci_init(void)
605 return platform_driver_register(&pxamci_driver);
608 static void __exit pxamci_exit(void)
610 platform_driver_unregister(&pxamci_driver);
613 module_init(pxamci_init);
614 module_exit(pxamci_exit);
616 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
617 MODULE_LICENSE("GPL");