2 * arch/arm/mach-at91rm9200/at91sam9261_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/platform_device.h>
18 #include <asm/arch/board.h>
19 #include <asm/arch/gpio.h>
20 #include <asm/arch/at91sam9261.h>
21 #include <asm/arch/at91sam9261_matrix.h>
22 #include <asm/arch/at91sam926x_mc.h>
26 #define SZ_512 0x00000200
27 #define SZ_256 0x00000100
28 #define SZ_16 0x00000010
30 /* --------------------------------------------------------------------
32 * -------------------------------------------------------------------- */
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = 0xffffffffUL;
36 static struct at91_usbh_data usbh_data;
38 static struct resource usbh_resources[] = {
40 .start = AT91SAM9261_UHP_BASE,
41 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
45 .start = AT91SAM9261_ID_UHP,
46 .end = AT91SAM9261_ID_UHP,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device at91sam9261_usbh_device = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = &usbh_data,
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
69 platform_device_register(&at91sam9261_usbh_device);
72 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
76 /* --------------------------------------------------------------------
78 * -------------------------------------------------------------------- */
80 #ifdef CONFIG_USB_GADGET_AT91
81 static struct at91_udc_data udc_data;
83 static struct resource udc_resources[] = {
85 .start = AT91SAM9261_BASE_UDP,
86 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
87 .flags = IORESOURCE_MEM,
90 .start = AT91SAM9261_ID_UDP,
91 .end = AT91SAM9261_ID_UDP,
92 .flags = IORESOURCE_IRQ,
96 static struct platform_device at91sam9261_udc_device = {
100 .platform_data = &udc_data,
102 .resource = udc_resources,
103 .num_resources = ARRAY_SIZE(udc_resources),
106 void __init at91_add_device_udc(struct at91_udc_data *data)
113 if (data->vbus_pin) {
114 at91_set_gpio_input(data->vbus_pin, 0);
115 at91_set_deglitch(data->vbus_pin, 1);
118 /* Pullup pin is handled internally */
119 x = at91_sys_read(AT91_MATRIX_USBPUCR);
120 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
123 platform_device_register(&at91sam9261_udc_device);
126 void __init at91_add_device_udc(struct at91_udc_data *data) {}
129 /* --------------------------------------------------------------------
131 * -------------------------------------------------------------------- */
133 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
134 static u64 mmc_dmamask = 0xffffffffUL;
135 static struct at91_mmc_data mmc_data;
137 static struct resource mmc_resources[] = {
139 .start = AT91SAM9261_BASE_MCI,
140 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
141 .flags = IORESOURCE_MEM,
144 .start = AT91SAM9261_ID_MCI,
145 .end = AT91SAM9261_ID_MCI,
146 .flags = IORESOURCE_IRQ,
150 static struct platform_device at91sam9261_mmc_device = {
154 .dma_mask = &mmc_dmamask,
155 .coherent_dma_mask = 0xffffffff,
156 .platform_data = &mmc_data,
158 .resource = mmc_resources,
159 .num_resources = ARRAY_SIZE(mmc_resources),
162 void __init at91_add_device_mmc(struct at91_mmc_data *data)
169 at91_set_gpio_input(data->det_pin, 1);
170 at91_set_deglitch(data->det_pin, 1);
173 at91_set_gpio_input(data->wp_pin, 1);
175 at91_set_gpio_output(data->vcc_pin, 0);
178 at91_set_B_periph(AT91_PIN_PA2, 0);
181 at91_set_B_periph(AT91_PIN_PA1, 1);
183 /* DAT0, maybe DAT1..DAT3 */
184 at91_set_B_periph(AT91_PIN_PA0, 1);
186 at91_set_B_periph(AT91_PIN_PA4, 1);
187 at91_set_B_periph(AT91_PIN_PA5, 1);
188 at91_set_B_periph(AT91_PIN_PA6, 1);
192 platform_device_register(&at91sam9261_mmc_device);
195 void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
199 /* --------------------------------------------------------------------
201 * -------------------------------------------------------------------- */
203 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
204 static struct at91_nand_data nand_data;
206 #define NAND_BASE AT91_CHIPSELECT_3
208 static struct resource nand_resources[] = {
211 .end = NAND_BASE + SZ_256M - 1,
212 .flags = IORESOURCE_MEM,
216 static struct platform_device at91_nand_device = {
220 .platform_data = &nand_data,
222 .resource = nand_resources,
223 .num_resources = ARRAY_SIZE(nand_resources),
226 void __init at91_add_device_nand(struct at91_nand_data *data)
228 unsigned long csa, mode;
233 csa = at91_sys_read(AT91_MATRIX_EBICSA);
234 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
236 /* set the bus interface characteristics */
237 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
238 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
240 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
241 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
243 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
245 if (data->bus_width_16)
246 mode = AT91_SMC_DBW_16;
248 mode = AT91_SMC_DBW_8;
249 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
252 if (data->enable_pin)
253 at91_set_gpio_output(data->enable_pin, 1);
257 at91_set_gpio_input(data->rdy_pin, 1);
259 /* card detect pin */
261 at91_set_gpio_input(data->det_pin, 1);
263 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
264 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
267 platform_device_register(&at91_nand_device);
271 void __init at91_add_device_nand(struct at91_nand_data *data) {}
275 /* --------------------------------------------------------------------
277 * -------------------------------------------------------------------- */
279 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
281 static struct resource twi_resources[] = {
283 .start = AT91SAM9261_BASE_TWI,
284 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
285 .flags = IORESOURCE_MEM,
288 .start = AT91SAM9261_ID_TWI,
289 .end = AT91SAM9261_ID_TWI,
290 .flags = IORESOURCE_IRQ,
294 static struct platform_device at91sam9261_twi_device = {
297 .resource = twi_resources,
298 .num_resources = ARRAY_SIZE(twi_resources),
301 void __init at91_add_device_i2c(void)
303 /* pins used for TWI interface */
304 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
305 at91_set_multi_drive(AT91_PIN_PA7, 1);
307 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
308 at91_set_multi_drive(AT91_PIN_PA8, 1);
310 platform_device_register(&at91sam9261_twi_device);
313 void __init at91_add_device_i2c(void) {}
317 /* --------------------------------------------------------------------
319 * -------------------------------------------------------------------- */
321 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
322 static u64 spi_dmamask = 0xffffffffUL;
324 static struct resource spi0_resources[] = {
326 .start = AT91SAM9261_BASE_SPI0,
327 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
328 .flags = IORESOURCE_MEM,
331 .start = AT91SAM9261_ID_SPI0,
332 .end = AT91SAM9261_ID_SPI0,
333 .flags = IORESOURCE_IRQ,
337 static struct platform_device at91sam9261_spi0_device = {
341 .dma_mask = &spi_dmamask,
342 .coherent_dma_mask = 0xffffffff,
344 .resource = spi0_resources,
345 .num_resources = ARRAY_SIZE(spi0_resources),
348 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
350 static struct resource spi1_resources[] = {
352 .start = AT91SAM9261_BASE_SPI1,
353 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
354 .flags = IORESOURCE_MEM,
357 .start = AT91SAM9261_ID_SPI1,
358 .end = AT91SAM9261_ID_SPI1,
359 .flags = IORESOURCE_IRQ,
363 static struct platform_device at91sam9261_spi1_device = {
367 .dma_mask = &spi_dmamask,
368 .coherent_dma_mask = 0xffffffff,
370 .resource = spi1_resources,
371 .num_resources = ARRAY_SIZE(spi1_resources),
374 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
376 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
379 unsigned long cs_pin;
380 short enable_spi0 = 0;
381 short enable_spi1 = 0;
383 /* Choose SPI chip-selects */
384 for (i = 0; i < nr_devices; i++) {
385 if (devices[i].controller_data)
386 cs_pin = (unsigned long) devices[i].controller_data;
387 else if (devices[i].bus_num == 0)
388 cs_pin = spi0_standard_cs[devices[i].chip_select];
390 cs_pin = spi1_standard_cs[devices[i].chip_select];
392 if (devices[i].bus_num == 0)
397 /* enable chip-select pin */
398 at91_set_gpio_output(cs_pin, 1);
400 /* pass chip-select pin to driver */
401 devices[i].controller_data = (void *) cs_pin;
404 spi_register_board_info(devices, nr_devices);
406 /* Configure SPI bus(es) */
408 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
409 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
410 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
412 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
413 platform_device_register(&at91sam9261_spi0_device);
416 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
417 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
418 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
420 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
421 platform_device_register(&at91sam9261_spi1_device);
425 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
429 /* --------------------------------------------------------------------
431 * -------------------------------------------------------------------- */
433 #if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
434 static u64 lcdc_dmamask = 0xffffffffUL;
435 static struct at91fb_info lcdc_data;
437 static struct resource lcdc_resources[] = {
439 .start = AT91SAM9261_LCDC_BASE,
440 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
441 .flags = IORESOURCE_MEM,
444 .start = AT91SAM9261_ID_LCDC,
445 .end = AT91SAM9261_ID_LCDC,
446 .flags = IORESOURCE_IRQ,
448 #if defined(CONFIG_FB_INTSRAM)
450 .start = AT91SAM9261_SRAM_BASE,
451 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
452 .flags = IORESOURCE_MEM,
457 static struct platform_device at91_lcdc_device = {
461 .dma_mask = &lcdc_dmamask,
462 .coherent_dma_mask = 0xffffffff,
463 .platform_data = &lcdc_data,
465 .resource = lcdc_resources,
466 .num_resources = ARRAY_SIZE(lcdc_resources),
469 void __init at91_add_device_lcdc(struct at91fb_info *data)
475 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
476 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
477 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
478 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
479 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
480 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
481 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
482 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
483 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
484 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
485 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
486 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
487 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
488 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
489 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
490 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
491 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
492 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
493 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
494 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
495 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
496 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
499 platform_device_register(&at91_lcdc_device);
502 void __init at91_add_device_lcdc(struct at91fb_info *data) {}
506 /* --------------------------------------------------------------------
508 * -------------------------------------------------------------------- */
510 #if defined(CONFIG_LEDS)
514 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
516 at91_leds_cpu = cpu_led;
517 at91_leds_timer = timer_led;
520 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
524 /* --------------------------------------------------------------------
526 * -------------------------------------------------------------------- */
528 #if defined(CONFIG_SERIAL_ATMEL)
529 static struct resource dbgu_resources[] = {
531 .start = AT91_VA_BASE_SYS + AT91_DBGU,
532 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
533 .flags = IORESOURCE_MEM,
536 .start = AT91_ID_SYS,
538 .flags = IORESOURCE_IRQ,
542 static struct atmel_uart_data dbgu_data = {
544 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
545 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
548 static struct platform_device at91sam9261_dbgu_device = {
549 .name = "atmel_usart",
552 .platform_data = &dbgu_data,
553 .coherent_dma_mask = 0xffffffff,
555 .resource = dbgu_resources,
556 .num_resources = ARRAY_SIZE(dbgu_resources),
559 static inline void configure_dbgu_pins(void)
561 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
562 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
565 static struct resource uart0_resources[] = {
567 .start = AT91SAM9261_BASE_US0,
568 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
572 .start = AT91SAM9261_ID_US0,
573 .end = AT91SAM9261_ID_US0,
574 .flags = IORESOURCE_IRQ,
578 static struct atmel_uart_data uart0_data = {
583 static struct platform_device at91sam9261_uart0_device = {
584 .name = "atmel_usart",
587 .platform_data = &uart0_data,
588 .coherent_dma_mask = 0xffffffff,
590 .resource = uart0_resources,
591 .num_resources = ARRAY_SIZE(uart0_resources),
594 static inline void configure_usart0_pins(void)
596 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
597 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
598 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
599 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
602 static struct resource uart1_resources[] = {
604 .start = AT91SAM9261_BASE_US1,
605 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
606 .flags = IORESOURCE_MEM,
609 .start = AT91SAM9261_ID_US1,
610 .end = AT91SAM9261_ID_US1,
611 .flags = IORESOURCE_IRQ,
615 static struct atmel_uart_data uart1_data = {
620 static struct platform_device at91sam9261_uart1_device = {
621 .name = "atmel_usart",
624 .platform_data = &uart1_data,
625 .coherent_dma_mask = 0xffffffff,
627 .resource = uart1_resources,
628 .num_resources = ARRAY_SIZE(uart1_resources),
631 static inline void configure_usart1_pins(void)
633 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
634 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
637 static struct resource uart2_resources[] = {
639 .start = AT91SAM9261_BASE_US2,
640 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
641 .flags = IORESOURCE_MEM,
644 .start = AT91SAM9261_ID_US2,
645 .end = AT91SAM9261_ID_US2,
646 .flags = IORESOURCE_IRQ,
650 static struct atmel_uart_data uart2_data = {
655 static struct platform_device at91sam9261_uart2_device = {
656 .name = "atmel_usart",
659 .platform_data = &uart2_data,
660 .coherent_dma_mask = 0xffffffff,
662 .resource = uart2_resources,
663 .num_resources = ARRAY_SIZE(uart2_resources),
666 static inline void configure_usart2_pins(void)
668 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
669 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
672 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
673 struct platform_device *atmel_default_console_device; /* the serial console device */
675 void __init at91_init_serial(struct at91_uart_config *config)
679 /* Fill in list of supported UARTs */
680 for (i = 0; i < config->nr_tty; i++) {
681 switch (config->tty_map[i]) {
683 configure_usart0_pins();
684 at91_uarts[i] = &at91sam9261_uart0_device;
685 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
688 configure_usart1_pins();
689 at91_uarts[i] = &at91sam9261_uart1_device;
690 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
693 configure_usart2_pins();
694 at91_uarts[i] = &at91sam9261_uart2_device;
695 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
698 configure_dbgu_pins();
699 at91_uarts[i] = &at91sam9261_dbgu_device;
700 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
705 at91_uarts[i]->id = i; /* update ID number to mapped ID */
708 /* Set serial console device */
709 if (config->console_tty < ATMEL_MAX_UART)
710 atmel_default_console_device = at91_uarts[config->console_tty];
711 if (!atmel_default_console_device)
712 printk(KERN_INFO "AT91: No default serial console defined.\n");
715 void __init at91_add_device_serial(void)
719 for (i = 0; i < ATMEL_MAX_UART; i++) {
721 platform_device_register(at91_uarts[i]);
725 void __init at91_init_serial(struct at91_uart_config *config) {}
726 void __init at91_add_device_serial(void) {}
730 /* -------------------------------------------------------------------- */
733 * These devices are always present and don't need any board-specific
736 static int __init at91_add_standard_devices(void)
741 arch_initcall(at91_add_standard_devices);