2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
22 #include <linux/config.h> /* CONFIG_PROC_FS */
23 #include <linux/module.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/bio.h>
27 #include <linux/interrupt.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/devfs_fs_kernel.h>
37 #include <linux/init.h>
38 #include <linux/hdreg.h>
39 #include <linux/spinlock.h>
40 #include <linux/blkdev.h>
41 #include <linux/genhd.h>
42 #include <asm/uaccess.h>
46 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
48 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
49 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
51 /* Embedded module documentation macros - see modules.h */
52 /* Original author Chris Frantz - Compaq Computer Corporation */
53 MODULE_AUTHOR("Compaq Computer Corporation");
54 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
55 MODULE_LICENSE("GPL");
60 #include "ida_ioctl.h"
62 #define READ_AHEAD 128
63 #define NR_CMDS 128 /* This could probably go as high as ~400 */
68 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */
71 static ctlr_info_t *hba[MAX_CTLR];
75 #define NR_PRODUCTS ARRAY_SIZE(products)
77 /* board_id = Subsystem Device ID & Vendor ID
78 * product = Marketing Name for the board
79 * access = Address of the struct of function pointers
81 static struct board_type products[] = {
82 { 0x0040110E, "IDA", &smart1_access },
83 { 0x0140110E, "IDA-2", &smart1_access },
84 { 0x1040110E, "IAES", &smart1_access },
85 { 0x2040110E, "SMART", &smart1_access },
86 { 0x3040110E, "SMART-2/E", &smart2e_access },
87 { 0x40300E11, "SMART-2/P", &smart2_access },
88 { 0x40310E11, "SMART-2SL", &smart2_access },
89 { 0x40320E11, "Smart Array 3200", &smart2_access },
90 { 0x40330E11, "Smart Array 3100ES", &smart2_access },
91 { 0x40340E11, "Smart Array 221", &smart2_access },
92 { 0x40400E11, "Integrated Array", &smart4_access },
93 { 0x40480E11, "Compaq Raid LC2", &smart4_access },
94 { 0x40500E11, "Smart Array 4200", &smart4_access },
95 { 0x40510E11, "Smart Array 4250ES", &smart4_access },
96 { 0x40580E11, "Smart Array 431", &smart4_access },
99 /* define the PCI info for the PCI cards this driver can control */
100 static const struct pci_device_id cpqarray_pci_device_id[] =
102 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
103 0x0E11, 0x4058, 0, 0, 0}, /* SA431 */
104 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
105 0x0E11, 0x4051, 0, 0, 0}, /* SA4250ES */
106 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
107 0x0E11, 0x4050, 0, 0, 0}, /* SA4200 */
108 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
109 0x0E11, 0x4048, 0, 0, 0}, /* LC2 */
110 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
111 0x0E11, 0x4040, 0, 0, 0}, /* Integrated Array */
112 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
113 0x0E11, 0x4034, 0, 0, 0}, /* SA 221 */
114 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
115 0x0E11, 0x4033, 0, 0, 0}, /* SA 3100ES*/
116 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
117 0x0E11, 0x4032, 0, 0, 0}, /* SA 3200*/
118 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
119 0x0E11, 0x4031, 0, 0, 0}, /* SA 2SL*/
120 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
121 0x0E11, 0x4030, 0, 0, 0}, /* SA 2P */
125 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
127 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
130 #define DBG(s) do { s } while(0)
131 /* Debug (general info)... */
132 #define DBGINFO(s) do { } while(0)
133 /* Debug Paranoid... */
134 #define DBGP(s) do { } while(0)
135 /* Debug Extra Paranoid... */
136 #define DBGPX(s) do { } while(0)
138 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
139 static void __iomem *remap_pci_mem(ulong base, ulong size);
140 static int cpqarray_eisa_detect(void);
141 static int pollcomplete(int ctlr);
142 static void getgeometry(int ctlr);
143 static void start_fwbk(int ctlr);
145 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
146 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
148 static void free_hba(int i);
149 static int alloc_cpqarray_hba(void);
158 unsigned int log_unit );
160 static int ida_open(struct inode *inode, struct file *filep);
161 static int ida_release(struct inode *inode, struct file *filep);
162 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
163 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
164 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
166 static void do_ida_request(request_queue_t *q);
167 static void start_io(ctlr_info_t *h);
169 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
170 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
171 static inline void complete_buffers(struct bio *bio, int ok);
172 static inline void complete_command(cmdlist_t *cmd, int timeout);
174 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
175 static void ida_timer(unsigned long tdata);
176 static int ida_revalidate(struct gendisk *disk);
177 static int revalidate_allvol(ctlr_info_t *host);
178 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
180 #ifdef CONFIG_PROC_FS
181 static void ida_procinit(int i);
182 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
184 static void ida_procinit(int i) {}
187 static inline drv_info_t *get_drv(struct gendisk *disk)
189 return disk->private_data;
192 static inline ctlr_info_t *get_host(struct gendisk *disk)
194 return disk->queue->queuedata;
198 static struct block_device_operations ida_fops = {
199 .owner = THIS_MODULE,
201 .release = ida_release,
203 .getgeo = ida_getgeo,
204 .revalidate_disk= ida_revalidate,
208 #ifdef CONFIG_PROC_FS
210 static struct proc_dir_entry *proc_array;
213 * Get us a file in /proc/array that says something about each controller.
214 * Create /proc/array if it doesn't exist yet.
216 static void __init ida_procinit(int i)
218 if (proc_array == NULL) {
219 proc_array = proc_mkdir("cpqarray", proc_root_driver);
220 if (!proc_array) return;
223 create_proc_read_entry(hba[i]->devname, 0, proc_array,
224 ida_proc_get_info, hba[i]);
228 * Report information about this controller.
230 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
235 ctlr_info_t *h = (ctlr_info_t*)data;
237 #ifdef CPQ_PROC_PRINT_QUEUES
243 size = sprintf(buffer, "%s: Compaq %s Controller\n"
244 " Board ID: 0x%08lx\n"
245 " Firmware Revision: %c%c%c%c\n"
246 " Controller Sig: 0x%08lx\n"
247 " Memory Address: 0x%08lx\n"
248 " I/O Port: 0x%04x\n"
250 " Logical drives: %d\n"
251 " Physical drives: %d\n\n"
252 " Current Q depth: %d\n"
253 " Max Q depth since init: %d\n\n",
256 (unsigned long)h->board_id,
257 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
258 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
259 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
260 h->log_drives, h->phys_drives,
261 h->Qdepth, h->maxQsinceinit);
263 pos += size; len += size;
265 size = sprintf(buffer+len, "Logical Drive Info:\n");
266 pos += size; len += size;
268 for(i=0; i<h->log_drives; i++) {
270 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
271 ctlr, i, drv->blk_size, drv->nr_blks);
272 pos += size; len += size;
275 #ifdef CPQ_PROC_PRINT_QUEUES
276 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
277 size = sprintf(buffer+len, "\nCurrent Queues:\n");
278 pos += size; len += size;
281 size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
283 while(c && c != h->reqQ) {
284 size = sprintf(buffer+len, "->%p", c);
285 pos += size; len += size;
290 size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
292 while(c && c != h->cmpQ) {
293 size = sprintf(buffer+len, "->%p", c);
294 pos += size; len += size;
298 size = sprintf(buffer+len, "\n"); pos += size; len += size;
299 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
301 size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
302 h->nr_allocs, h->nr_frees);
303 pos += size; len += size;
306 *start = buffer+offset;
312 #endif /* CONFIG_PROC_FS */
314 module_param_array(eisa, int, NULL, 0);
316 static void release_io_mem(ctlr_info_t *c)
318 /* if IO mem was not protected do nothing */
319 if( c->io_mem_addr == 0)
321 release_region(c->io_mem_addr, c->io_mem_length);
323 c->io_mem_length = 0;
326 static void __devexit cpqarray_remove_one(int i)
331 /* sendcmd will turn off interrupt, and send the flush...
332 * To write all data in the battery backed cache to disks
333 * no data returned, but don't want to send NULL to sendcmd */
334 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
336 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
339 free_irq(hba[i]->intr, hba[i]);
340 iounmap(hba[i]->vaddr);
341 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
342 del_timer(&hba[i]->timer);
343 remove_proc_entry(hba[i]->devname, proc_array);
344 pci_free_consistent(hba[i]->pci_dev,
345 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
346 hba[i]->cmd_pool_dhandle);
347 kfree(hba[i]->cmd_pool_bits);
348 for(j = 0; j < NWD; j++) {
349 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
350 del_gendisk(ida_gendisk[i][j]);
351 devfs_remove("ida/c%dd%d",i,j);
352 put_disk(ida_gendisk[i][j]);
354 blk_cleanup_queue(hba[i]->queue);
355 release_io_mem(hba[i]);
359 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
362 ctlr_info_t *tmp_ptr;
364 if (pci_get_drvdata(pdev) == NULL) {
365 printk( KERN_ERR "cpqarray: Unable to remove device \n");
369 tmp_ptr = pci_get_drvdata(pdev);
371 if (hba[i] == NULL) {
372 printk(KERN_ERR "cpqarray: controller %d appears to have"
373 "already been removed \n", i);
376 pci_set_drvdata(pdev, NULL);
378 cpqarray_remove_one(i);
381 /* removing an instance that was not removed automatically..
382 * must be an eisa card.
384 static void __devexit cpqarray_remove_one_eisa (int i)
386 if (hba[i] == NULL) {
387 printk(KERN_ERR "cpqarray: controller %d appears to have"
388 "already been removed \n", i);
391 cpqarray_remove_one(i);
394 /* pdev is NULL for eisa */
395 static int cpqarray_register_ctlr( int i, struct pci_dev *pdev)
401 * register block devices
402 * Find disks and fill in structs
403 * Get an interrupt, set the Q depth and get into /proc
406 /* If this successful it should insure that we are the only */
407 /* instance of the driver */
408 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
411 hba[i]->access.set_intr_mask(hba[i], 0);
412 if (request_irq(hba[i]->intr, do_ida_intr,
413 SA_INTERRUPT|SA_SHIRQ|SA_SAMPLE_RANDOM,
414 hba[i]->devname, hba[i]))
416 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
417 hba[i]->intr, hba[i]->devname);
421 for (j=0; j<NWD; j++) {
422 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
423 if (!ida_gendisk[i][j])
427 hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
428 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
429 &(hba[i]->cmd_pool_dhandle));
430 hba[i]->cmd_pool_bits = kmalloc(
431 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
434 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
437 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
438 memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
439 printk(KERN_INFO "cpqarray: Finding drives on %s",
442 spin_lock_init(&hba[i]->lock);
443 q = blk_init_queue(do_ida_request, &hba[i]->lock);
448 q->queuedata = hba[i];
456 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
458 /* This is a hardware imposed limit. */
459 blk_queue_max_hw_segments(q, SG_MAX);
461 /* This is a driver limit and could be eliminated. */
462 blk_queue_max_phys_segments(q, SG_MAX);
464 init_timer(&hba[i]->timer);
465 hba[i]->timer.expires = jiffies + IDA_TIMER;
466 hba[i]->timer.data = (unsigned long)hba[i];
467 hba[i]->timer.function = ida_timer;
468 add_timer(&hba[i]->timer);
470 /* Enable IRQ now that spinlock and rate limit timer are set up */
471 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
473 for(j=0; j<NWD; j++) {
474 struct gendisk *disk = ida_gendisk[i][j];
475 drv_info_t *drv = &hba[i]->drv[j];
476 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
477 disk->major = COMPAQ_SMART2_MAJOR + i;
478 disk->first_minor = j<<NWD_SHIFT;
479 disk->fops = &ida_fops;
480 if (j && !drv->nr_blks)
482 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
483 set_capacity(disk, drv->nr_blks);
484 disk->queue = hba[i]->queue;
485 disk->private_data = drv;
494 kfree(hba[i]->cmd_pool_bits);
495 if (hba[i]->cmd_pool)
496 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
497 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
500 put_disk(ida_gendisk[i][j]);
501 ida_gendisk[i][j] = NULL;
503 free_irq(hba[i]->intr, hba[i]);
505 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
508 pci_set_drvdata(pdev, NULL);
509 release_io_mem(hba[i]);
512 printk( KERN_ERR "cpqarray: out of memory");
517 static int __init cpqarray_init_one( struct pci_dev *pdev,
518 const struct pci_device_id *ent)
522 printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
523 " bus %d dev %d func %d\n",
524 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
525 PCI_FUNC(pdev->devfn));
526 i = alloc_cpqarray_hba();
529 memset(hba[i], 0, sizeof(ctlr_info_t));
530 sprintf(hba[i]->devname, "ida%d", i);
532 /* Initialize the pdev driver private data */
533 pci_set_drvdata(pdev, hba[i]);
535 if (cpqarray_pci_init(hba[i], pdev) != 0) {
536 pci_set_drvdata(pdev, NULL);
537 release_io_mem(hba[i]);
542 return (cpqarray_register_ctlr(i, pdev));
545 static struct pci_driver cpqarray_pci_driver = {
547 .probe = cpqarray_init_one,
548 .remove = __devexit_p(cpqarray_remove_one_pci),
549 .id_table = cpqarray_pci_device_id,
553 * This is it. Find all the controllers and register them.
554 * returns the number of block devices registered.
556 static int __init cpqarray_init(void)
558 int num_cntlrs_reg = 0;
562 /* detect controllers */
563 printk(DRIVER_NAME "\n");
565 rc = pci_register_driver(&cpqarray_pci_driver);
568 cpqarray_eisa_detect();
570 for (i=0; i < MAX_CTLR; i++) {
575 return(num_cntlrs_reg);
578 /* Function to find the first free pointer into our hba[] array */
579 /* Returns -1 if no free entries are left. */
580 static int alloc_cpqarray_hba(void)
584 for(i=0; i< MAX_CTLR; i++) {
585 if (hba[i] == NULL) {
586 hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
588 printk(KERN_ERR "cpqarray: out of memory.\n");
594 printk(KERN_WARNING "cpqarray: This driver supports a maximum"
595 " of 8 controllers.\n");
599 static void free_hba(int i)
606 * Find the IO address of the controller, its IRQ and so forth. Fill
607 * in some basic stuff into the ctlr_info_t structure.
609 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
611 ushort vendor_id, device_id, command;
612 unchar cache_line_size, latency_timer;
613 unchar irq, revision;
614 unsigned long addr[6];
620 if (pci_enable_device(pdev)) {
621 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
624 vendor_id = pdev->vendor;
625 device_id = pdev->device;
629 addr[i] = pci_resource_start(pdev, i);
631 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
633 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
637 pci_read_config_word(pdev, PCI_COMMAND, &command);
638 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
639 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
640 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
642 pci_read_config_dword(pdev, 0x2c, &board_id);
644 /* check to see if controller has been disabled */
645 if(!(command & 0x02)) {
647 "cpqarray: controller appears to be disabled\n");
652 printk("vendor_id = %x\n", vendor_id);
653 printk("device_id = %x\n", device_id);
654 printk("command = %x\n", command);
656 printk("addr[%d] = %lx\n", i, addr[i]);
657 printk("revision = %x\n", revision);
658 printk("irq = %x\n", irq);
659 printk("cache_line_size = %x\n", cache_line_size);
660 printk("latency_timer = %x\n", latency_timer);
661 printk("board_id = %x\n", board_id);
667 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
669 c->io_mem_addr = addr[i];
670 c->io_mem_length = pci_resource_end(pdev, i)
671 - pci_resource_start(pdev, i) + 1;
672 if(!request_region( c->io_mem_addr, c->io_mem_length,
675 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
677 c->io_mem_length = 0;
685 if (!(pci_resource_flags(pdev, i) &
686 PCI_BASE_ADDRESS_SPACE_IO)) {
687 c->paddr = pci_resource_start (pdev, i);
692 c->vaddr = remap_pci_mem(c->paddr, 128);
695 c->board_id = board_id;
697 for(i=0; i<NR_PRODUCTS; i++) {
698 if (board_id == products[i].board_id) {
699 c->product_name = products[i].product_name;
700 c->access = *(products[i].access);
704 if (i == NR_PRODUCTS) {
705 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
706 " to access the SMART Array controller %08lx\n",
707 (unsigned long)board_id);
715 * Map (physical) PCI mem into (virtual) kernel space
717 static void __iomem *remap_pci_mem(ulong base, ulong size)
719 ulong page_base = ((ulong) base) & PAGE_MASK;
720 ulong page_offs = ((ulong) base) - page_base;
721 void __iomem *page_remapped = ioremap(page_base, page_offs+size);
723 return (page_remapped ? (page_remapped + page_offs) : NULL);
728 * Config string is a comma separated set of i/o addresses of EISA cards.
730 static int cpqarray_setup(char *str)
734 (void)get_options(str, ARRAY_SIZE(ints), ints);
736 for(i=0; i<ints[0] && i<8; i++)
741 __setup("smart2=", cpqarray_setup);
746 * Find an EISA controller's signature. Set up an hba if we find it.
748 static int cpqarray_eisa_detect(void)
756 while(i<8 && eisa[i]) {
757 ctlr = alloc_cpqarray_hba();
760 board_id = inl(eisa[i]+0xC80);
761 for(j=0; j < NR_PRODUCTS; j++)
762 if (board_id == products[j].board_id)
765 if (j == NR_PRODUCTS) {
766 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
767 " to access the SMART Array controller %08lx\n", (unsigned long)board_id);
771 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
772 hba[ctlr]->io_mem_addr = eisa[i];
773 hba[ctlr]->io_mem_length = 0x7FF;
774 if(!request_region(hba[ctlr]->io_mem_addr,
775 hba[ctlr]->io_mem_length,
778 printk(KERN_WARNING "cpqarray: I/O range already in "
779 "use addr = %lx length = %ld\n",
780 hba[ctlr]->io_mem_addr,
781 hba[ctlr]->io_mem_length);
787 * Read the config register to find our interrupt
789 intr = inb(eisa[i]+0xCC0) >> 4;
790 if (intr & 1) intr = 11;
791 else if (intr & 2) intr = 10;
792 else if (intr & 4) intr = 14;
793 else if (intr & 8) intr = 15;
795 hba[ctlr]->intr = intr;
796 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
797 hba[ctlr]->product_name = products[j].product_name;
798 hba[ctlr]->access = *(products[j].access);
799 hba[ctlr]->ctlr = ctlr;
800 hba[ctlr]->board_id = board_id;
801 hba[ctlr]->pci_dev = NULL; /* not PCI */
804 printk("i = %d, j = %d\n", i, j);
805 printk("irq = %x\n", intr);
806 printk("product name = %s\n", products[j].product_name);
807 printk("board_id = %x\n", board_id);
813 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
815 "cpqarray: Can't register EISA controller %d\n",
824 * Open. Make sure the device is really there.
826 static int ida_open(struct inode *inode, struct file *filep)
828 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
829 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
831 DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
833 * Root is allowed to open raw volume zero even if it's not configured
834 * so array config can still work. I don't think I really like this,
835 * but I'm already using way to many device nodes to claim another one
836 * for "raw controller".
839 if (!capable(CAP_SYS_RAWIO))
841 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
851 static int ida_release(struct inode *inode, struct file *filep)
853 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
859 * Enqueuing and dequeuing functions for cmdlists.
861 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
865 c->next = c->prev = c;
867 c->prev = (*Qptr)->prev;
869 (*Qptr)->prev->next = c;
874 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
876 if (c && c->next != c) {
877 if (*Qptr == c) *Qptr = c->next;
878 c->prev->next = c->next;
879 c->next->prev = c->prev;
887 * Get a request and submit it to the controller.
888 * This routine needs to grab all the requests it possibly can from the
889 * req Q and submit them. Interrupts are off (and need to be off) when you
890 * are in here (either via the dummy do_ida_request functions or by being
891 * called from the interrupt handler
893 static void do_ida_request(request_queue_t *q)
895 ctlr_info_t *h = q->queuedata;
897 struct request *creq;
898 struct scatterlist tmp_sg[SG_MAX];
901 if (blk_queue_plugged(q))
905 creq = elv_next_request(q);
909 if (creq->nr_phys_segments > SG_MAX)
912 if ((c = cmd_alloc(h,1)) == NULL)
915 blkdev_dequeue_request(creq);
918 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
919 c->hdr.size = sizeof(rblk_t) >> 2;
920 c->size += sizeof(rblk_t);
922 c->req.hdr.blk = creq->sector;
925 printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
927 seg = blk_rq_map_sg(q, creq, tmp_sg);
929 /* Now do all the DMA Mappings */
930 if (rq_data_dir(creq) == READ)
931 dir = PCI_DMA_FROMDEVICE;
933 dir = PCI_DMA_TODEVICE;
934 for( i=0; i < seg; i++)
936 c->req.sg[i].size = tmp_sg[i].length;
937 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
940 tmp_sg[i].length, dir);
942 DBGPX( printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
943 c->req.hdr.sg_cnt = seg;
944 c->req.hdr.blk_cnt = creq->nr_sectors;
945 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
948 /* Put the request on the tail of the request queue */
951 if (h->Qdepth > h->maxQsinceinit)
952 h->maxQsinceinit = h->Qdepth;
961 * start_io submits everything on a controller's request queue
962 * and moves it to the completion queue.
964 * Interrupts had better be off if you're in here
966 static void start_io(ctlr_info_t *h)
970 while((c = h->reqQ) != NULL) {
971 /* Can't do anything if we're busy */
972 if (h->access.fifo_full(h) == 0)
975 /* Get the first entry from the request Q */
976 removeQ(&h->reqQ, c);
979 /* Tell the controller to do our bidding */
980 h->access.submit_command(h, c);
982 /* Get onto the completion Q */
987 static inline void complete_buffers(struct bio *bio, int ok)
991 int nr_sectors = bio_sectors(bio);
996 blk_finished_io(nr_sectors);
997 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
1003 * Mark all buffers that cmd was responsible for
1005 static inline void complete_command(cmdlist_t *cmd, int timeout)
1010 if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1011 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1012 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1013 cmd->ctlr, cmd->hdr.unit);
1014 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1016 if (cmd->req.hdr.rcode & RCODE_FATAL) {
1017 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1018 cmd->ctlr, cmd->hdr.unit);
1021 if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1022 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1023 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1024 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1025 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1028 if (timeout) ok = 0;
1029 /* unmap the DMA mapping for all the scatter gather elements */
1030 if (cmd->req.hdr.cmd == IDA_READ)
1031 ddir = PCI_DMA_FROMDEVICE;
1033 ddir = PCI_DMA_TODEVICE;
1034 for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1035 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1036 cmd->req.sg[i].size, ddir);
1038 complete_buffers(cmd->rq->bio, ok);
1040 DBGPX(printk("Done with %p\n", cmd->rq););
1041 end_that_request_last(cmd->rq, ok ? 1 : -EIO);
1045 * The controller will interrupt us upon completion of commands.
1046 * Find the command on the completion queue, remove it, tell the OS and
1047 * try to queue up more IO
1049 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1051 ctlr_info_t *h = dev_id;
1053 unsigned long istat;
1054 unsigned long flags;
1057 istat = h->access.intr_pending(h);
1058 /* Is this interrupt for us? */
1063 * If there are completed commands in the completion queue,
1064 * we had better do something about it.
1066 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1067 if (istat & FIFO_NOT_EMPTY) {
1068 while((a = h->access.command_completed(h))) {
1070 if ((c = h->cmpQ) == NULL)
1072 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1075 while(c->busaddr != a) {
1081 * If we've found the command, take it off the
1082 * completion Q and free it
1084 if (c->busaddr == a) {
1085 removeQ(&h->cmpQ, c);
1086 /* Check for invalid command.
1087 * Controller returns command error,
1091 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1093 c->req.hdr.rcode = RCODE_INVREQ;
1095 if (c->type == CMD_RWREQ) {
1096 complete_command(c, 0);
1098 } else if (c->type == CMD_IOCTL_PEND) {
1099 c->type = CMD_IOCTL_DONE;
1107 * See if we can queue up some more IO
1109 do_ida_request(h->queue);
1110 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1115 * This timer was for timing out requests that haven't happened after
1116 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to
1117 * reset a flags structure so we don't flood the user with
1118 * "Non-Fatal error" messages.
1120 static void ida_timer(unsigned long tdata)
1122 ctlr_info_t *h = (ctlr_info_t*)tdata;
1124 h->timer.expires = jiffies + IDA_TIMER;
1125 add_timer(&h->timer);
1129 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1131 drv_info_t *drv = get_drv(bdev->bd_disk);
1133 if (drv->cylinders) {
1134 geo->heads = drv->heads;
1135 geo->sectors = drv->sectors;
1136 geo->cylinders = drv->cylinders;
1139 geo->sectors = 0x3f;
1140 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1147 * ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1148 * setting readahead and submitting commands from userspace to the controller.
1150 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1152 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1153 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1155 ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1160 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1164 if (!capable(CAP_SYS_RAWIO))
1166 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1170 if (copy_from_user(my_io, io, sizeof(*my_io)))
1172 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1176 if (copy_to_user(io, my_io, sizeof(*my_io)))
1183 if (!arg) return -EINVAL;
1184 put_user(host->ctlr_sig, (int __user *)arg);
1186 case IDAREVALIDATEVOLS:
1187 if (iminor(inode) != 0)
1189 return revalidate_allvol(host);
1190 case IDADRIVERVERSION:
1191 if (!arg) return -EINVAL;
1192 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1197 ida_pci_info_struct pciinfo;
1199 if (!arg) return -EINVAL;
1200 pciinfo.bus = host->pci_dev->bus->number;
1201 pciinfo.dev_fn = host->pci_dev->devfn;
1202 pciinfo.board_id = host->board_id;
1203 if(copy_to_user((void __user *) arg, &pciinfo,
1204 sizeof( ida_pci_info_struct)))
1215 * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1216 * The command block (io) has already been copied to kernel space for us,
1217 * however, any elements in the sglist need to be copied to kernel space
1218 * or copied back to userspace.
1220 * Only root may perform a controller passthru command, however I'm not doing
1221 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and
1222 * putting a 64M buffer in the sglist is probably a *bad* idea.
1224 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1229 unsigned long flags;
1232 if ((c = cmd_alloc(h, 0)) == NULL)
1235 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1236 c->hdr.size = sizeof(rblk_t) >> 2;
1237 c->size += sizeof(rblk_t);
1239 c->req.hdr.cmd = io->cmd;
1240 c->req.hdr.blk = io->blk;
1241 c->req.hdr.blk_cnt = io->blk_cnt;
1242 c->type = CMD_IOCTL_PEND;
1244 /* Pre submit processing */
1247 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1254 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1259 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1260 sizeof(ida_ioctl_t),
1261 PCI_DMA_BIDIRECTIONAL);
1262 c->req.sg[0].size = io->sg[0].size;
1263 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1264 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1265 c->req.hdr.sg_cnt = 1;
1268 case READ_FLASH_ROM:
1269 case SENSE_CONTROLLER_PERFORMANCE:
1270 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1278 c->req.sg[0].size = io->sg[0].size;
1279 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1280 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1281 c->req.hdr.sg_cnt = 1;
1284 case IDA_WRITE_MEDIA:
1285 case DIAG_PASS_THRU:
1286 case COLLECT_BUFFER:
1287 case WRITE_FLASH_ROM:
1288 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1295 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1300 c->req.sg[0].size = io->sg[0].size;
1301 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1302 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1303 c->req.hdr.sg_cnt = 1;
1306 c->req.sg[0].size = sizeof(io->c);
1307 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1308 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1309 c->req.hdr.sg_cnt = 1;
1312 /* Put the request on the tail of the request queue */
1313 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1317 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1319 /* Wait for completion */
1320 while(c->type != CMD_IOCTL_DONE)
1324 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1325 PCI_DMA_BIDIRECTIONAL);
1326 /* Post submit processing */
1329 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1330 sizeof(ida_ioctl_t),
1331 PCI_DMA_BIDIRECTIONAL);
1333 case DIAG_PASS_THRU:
1334 case SENSE_CONTROLLER_PERFORMANCE:
1335 case READ_FLASH_ROM:
1336 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1340 /* fall through and free p */
1342 case IDA_WRITE_MEDIA:
1343 case COLLECT_BUFFER:
1344 case WRITE_FLASH_ROM:
1351 io->rcode = c->req.hdr.rcode;
1357 * Commands are pre-allocated in a large block. Here we use a simple bitmap
1358 * scheme to suballocte them to the driver. Operations that are not time
1359 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1360 * as the first argument to get a new command.
1362 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1366 dma_addr_t cmd_dhandle;
1368 if (!get_from_pool) {
1369 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1370 sizeof(cmdlist_t), &cmd_dhandle);
1375 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1378 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1379 c = h->cmd_pool + i;
1380 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1384 memset(c, 0, sizeof(cmdlist_t));
1385 c->busaddr = cmd_dhandle;
1389 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1393 if (!got_from_pool) {
1394 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1397 i = c - h->cmd_pool;
1398 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1403 /***********************************************************************
1405 Send a command to an IDA using the memory mapped FIFO interface
1406 and wait for it to complete.
1407 This routine should only be called at init time.
1408 ***********************************************************************/
1415 unsigned int blkcnt,
1416 unsigned int log_unit )
1422 ctlr_info_t *info_p = hba[ctlr];
1424 c = cmd_alloc(info_p, 1);
1428 c->hdr.unit = log_unit;
1430 c->hdr.size = sizeof(rblk_t) >> 2;
1431 c->size += sizeof(rblk_t);
1433 /* The request information. */
1434 c->req.hdr.next = 0;
1435 c->req.hdr.rcode = 0;
1437 c->req.hdr.sg_cnt = 1;
1438 c->req.hdr.reserved = 0;
1441 c->req.sg[0].size = 512;
1443 c->req.sg[0].size = size;
1445 c->req.hdr.blk = blk;
1446 c->req.hdr.blk_cnt = blkcnt;
1447 c->req.hdr.cmd = (unsigned char) cmd;
1448 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1449 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1453 info_p->access.set_intr_mask(info_p, 0);
1454 /* Make sure there is room in the command FIFO */
1455 /* Actually it should be completely empty at this time. */
1456 for (i = 200000; i > 0; i--) {
1457 temp = info_p->access.fifo_full(info_p);
1463 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1464 " waiting!\n", ctlr);
1470 info_p->access.submit_command(info_p, c);
1471 complete = pollcomplete(ctlr);
1473 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1474 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1475 if (complete != 1) {
1476 if (complete != c->busaddr) {
1477 printk( KERN_WARNING
1478 "cpqarray ida%d: idaSendPciCmd "
1479 "Invalid command list address returned! (%08lx)\n",
1480 ctlr, (unsigned long)complete);
1481 cmd_free(info_p, c, 1);
1485 printk( KERN_WARNING
1486 "cpqarray ida%d: idaSendPciCmd Timeout out, "
1487 "No command list address returned!\n",
1489 cmd_free(info_p, c, 1);
1493 if (c->req.hdr.rcode & 0x00FE) {
1494 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1495 printk( KERN_WARNING
1496 "cpqarray ida%d: idaSendPciCmd, error: "
1497 "Controller failed at init time "
1498 "cmd: 0x%x, return code = 0x%x\n",
1499 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1501 cmd_free(info_p, c, 1);
1505 cmd_free(info_p, c, 1);
1510 * revalidate_allvol is for online array config utilities. After a
1511 * utility reconfigures the drives in the array, it can use this function
1512 * (through an ioctl) to make the driver zap any previous disk structs for
1513 * that controller and get new ones.
1515 * Right now I'm using the getgeometry() function to do this, but this
1516 * function should probably be finer grained and allow you to revalidate one
1517 * particualar logical volume (instead of all of them on a particular
1520 static int revalidate_allvol(ctlr_info_t *host)
1522 int ctlr = host->ctlr;
1524 unsigned long flags;
1526 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1527 if (host->usage_count > 1) {
1528 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1529 printk(KERN_WARNING "cpqarray: Device busy for volume"
1530 " revalidation (usage=%d)\n", host->usage_count);
1533 host->usage_count++;
1534 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1537 * Set the partition and block size structures for all volumes
1538 * on this controller to zero. We will reread all of this data
1540 set_capacity(ida_gendisk[ctlr][0], 0);
1541 for (i = 1; i < NWD; i++) {
1542 struct gendisk *disk = ida_gendisk[ctlr][i];
1543 if (disk->flags & GENHD_FL_UP)
1546 memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1549 * Tell the array controller not to give us any interrupts while
1550 * we check the new geometry. Then turn interrupts back on when
1553 host->access.set_intr_mask(host, 0);
1555 host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1557 for(i=0; i<NWD; i++) {
1558 struct gendisk *disk = ida_gendisk[ctlr][i];
1559 drv_info_t *drv = &host->drv[i];
1560 if (i && !drv->nr_blks)
1562 blk_queue_hardsect_size(host->queue, drv->blk_size);
1563 set_capacity(disk, drv->nr_blks);
1564 disk->queue = host->queue;
1565 disk->private_data = drv;
1570 host->usage_count--;
1574 static int ida_revalidate(struct gendisk *disk)
1576 drv_info_t *drv = disk->private_data;
1577 set_capacity(disk, drv->nr_blks);
1581 /********************************************************************
1583 Wait polling for a command to complete.
1584 The memory mapped FIFO is polled for the completion.
1585 Used only at init time, interrupts disabled.
1586 ********************************************************************/
1587 static int pollcomplete(int ctlr)
1592 /* Wait (up to 2 seconds) for a command to complete */
1594 for (i = 200000; i > 0; i--) {
1595 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1597 udelay(10); /* a short fixed delay */
1601 /* Invalid address to tell caller we ran out of time */
1604 /*****************************************************************
1606 Starts controller firmwares background processing.
1607 Currently only the Integrated Raid controller needs this done.
1608 If the PCI mem address registers are written to after this,
1609 data corruption may occur
1610 *****************************************************************/
1611 static void start_fwbk(int ctlr)
1613 id_ctlr_t *id_ctlr_buf;
1616 if( (hba[ctlr]->board_id != 0x40400E11)
1617 && (hba[ctlr]->board_id != 0x40480E11) )
1619 /* Not a Integrated Raid, so there is nothing for us to do */
1621 printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1623 /* Command does not return anything, but idasend command needs a
1625 id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1626 if(id_ctlr_buf==NULL)
1628 printk(KERN_WARNING "cpqarray: Out of memory. "
1629 "Unable to start background processing.\n");
1632 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1633 id_ctlr_buf, 0, 0, 0, 0);
1634 if(ret_code != IO_OK)
1635 printk(KERN_WARNING "cpqarray: Unable to start"
1636 " background processing\n");
1640 /*****************************************************************
1642 Get ida logical volume geometry from the controller
1643 This is a large bit of code which once existed in two flavors,
1644 It is used only at init time.
1645 *****************************************************************/
1646 static void getgeometry(int ctlr)
1648 id_log_drv_t *id_ldrive;
1649 id_ctlr_t *id_ctlr_buf;
1650 sense_log_drv_stat_t *id_lstatus_buf;
1651 config_t *sense_config_buf;
1652 unsigned int log_unit, log_index;
1655 ctlr_info_t *info_p = hba[ctlr];
1658 info_p->log_drv_map = 0;
1660 id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1661 if(id_ldrive == NULL)
1663 printk( KERN_ERR "cpqarray: out of memory.\n");
1667 id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1668 if(id_ctlr_buf == NULL)
1671 printk( KERN_ERR "cpqarray: out of memory.\n");
1675 id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1676 if(id_lstatus_buf == NULL)
1680 printk( KERN_ERR "cpqarray: out of memory.\n");
1684 sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1685 if(sense_config_buf == NULL)
1687 kfree(id_lstatus_buf);
1690 printk( KERN_ERR "cpqarray: out of memory.\n");
1694 memset(id_ldrive, 0, sizeof(id_log_drv_t));
1695 memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1696 memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1697 memset(sense_config_buf, 0, sizeof(config_t));
1699 info_p->phys_drives = 0;
1700 info_p->log_drv_map = 0;
1701 info_p->drv_assign_map = 0;
1702 info_p->drv_spare_map = 0;
1703 info_p->mp_failed_drv_map = 0; /* only initialized here */
1704 /* Get controllers info for this logical drive */
1705 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1706 if (ret_code == IO_ERROR) {
1708 * If can't get controller info, set the logical drive map to 0,
1709 * so the idastubopen will fail on all logical drives
1710 * on the controller.
1712 /* Free all the buffers and return */
1713 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1714 kfree(sense_config_buf);
1715 kfree(id_lstatus_buf);
1721 info_p->log_drives = id_ctlr_buf->nr_drvs;
1723 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1724 info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1726 printk(" (%s)\n", info_p->product_name);
1728 * Initialize logical drive map to zero
1732 * Get drive geometry for all logical drives
1734 if (id_ctlr_buf->nr_drvs > 16)
1735 printk(KERN_WARNING "cpqarray ida%d: This driver supports "
1736 "16 logical drives per controller.\n. "
1737 " Additional drives will not be "
1738 "detected\n", ctlr);
1741 (log_index < id_ctlr_buf->nr_drvs)
1742 && (log_unit < NWD);
1744 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1746 size = sizeof(sense_log_drv_stat_t);
1749 Send "Identify logical drive status" cmd
1751 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1752 ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1753 if (ret_code == IO_ERROR) {
1755 If can't get logical drive status, set
1756 the logical drive map to 0, so the
1757 idastubopen will fail for all logical drives
1760 info_p->log_drv_map = 0;
1761 printk( KERN_WARNING
1762 "cpqarray ida%d: idaGetGeometry - Controller"
1763 " failed to report status of logical drive %d\n"
1764 "Access to this controller has been disabled\n",
1766 /* Free all the buffers and return */
1767 kfree(sense_config_buf);
1768 kfree(id_lstatus_buf);
1774 Make sure the logical drive is configured
1776 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1777 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1778 sizeof(id_log_drv_t), 0, 0, log_unit);
1780 If error, the bit for this
1781 logical drive won't be set and
1782 idastubopen will return error.
1784 if (ret_code != IO_ERROR) {
1785 drv = &info_p->drv[log_unit];
1786 drv->blk_size = id_ldrive->blk_size;
1787 drv->nr_blks = id_ldrive->nr_blks;
1788 drv->cylinders = id_ldrive->drv.cyl;
1789 drv->heads = id_ldrive->drv.heads;
1790 drv->sectors = id_ldrive->drv.sect_per_track;
1791 info_p->log_drv_map |= (1 << log_unit);
1793 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1794 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1795 ret_code = sendcmd(SENSE_CONFIG,
1796 ctlr, sense_config_buf,
1797 sizeof(config_t), 0, 0, log_unit);
1798 if (ret_code == IO_ERROR) {
1799 info_p->log_drv_map = 0;
1800 /* Free all the buffers and return */
1801 printk(KERN_ERR "cpqarray: error sending sense config\n");
1802 kfree(sense_config_buf);
1803 kfree(id_lstatus_buf);
1810 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1812 info_p->phys_drives =
1813 sense_config_buf->ctlr_phys_drv;
1814 info_p->drv_assign_map
1815 |= sense_config_buf->drv_asgn_map;
1816 info_p->drv_assign_map
1817 |= sense_config_buf->spare_asgn_map;
1818 info_p->drv_spare_map
1819 |= sense_config_buf->spare_asgn_map;
1820 } /* end of if no error on id_ldrive */
1821 log_index = log_index + 1;
1822 } /* end of if logical drive configured */
1823 } /* end of for log_unit */
1824 kfree(sense_config_buf);
1826 kfree(id_lstatus_buf);
1832 static void __exit cpqarray_exit(void)
1836 pci_unregister_driver(&cpqarray_pci_driver);
1838 /* Double check that all controller entries have been removed */
1839 for(i=0; i<MAX_CTLR; i++) {
1840 if (hba[i] != NULL) {
1841 printk(KERN_WARNING "cpqarray: Removing EISA "
1842 "controller %d\n", i);
1843 cpqarray_remove_one_eisa(i);
1847 devfs_remove("ida");
1848 remove_proc_entry("cpqarray", proc_root_driver);
1851 module_init(cpqarray_init)
1852 module_exit(cpqarray_exit)