git.oblomov.eu Git - linux-2.6/blob - drivers/net/netxen/netxen_nic_ctx.c

   1 /*
   2  * Copyright (C) 2003 - 2008 NetXen, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18  * MA  02111-1307, USA.
  19  *
  20  * The full GNU General Public License is included in this distribution
  21  * in the file called LICENSE.
  22  *
  23  * Contact Information:
  24  *    info@netxen.com
  25  * NetXen,
  26  * 3965 Freedom Circle, Fourth floor,
  27  * Santa Clara, CA 95054
  28  *
  29  */
  30
  31 #include "netxen_nic_hw.h"
  32 #include "netxen_nic.h"
  33 #include "netxen_nic_phan_reg.h"
  34
  35 #define NXHAL_VERSION   1
  36
  37 static int
  38 netxen_api_lock(struct netxen_adapter *adapter)
  39 {
  40         u32 done = 0, timeout = 0;
  41
  42         for (;;) {
  43                 /* Acquire PCIE HW semaphore5 */
  44                 netxen_nic_read_w0(adapter,
  45                         NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
  46
  47                 if (done == 1)
  48                         break;
  49
  50                 if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
  51                         printk(KERN_ERR "%s: lock timeout.\n", __func__);
  52                         return -1;
  53                 }
  54
  55                 msleep(1);
  56         }
  57
  58 #if 0
  59         netxen_nic_write_w1(adapter,
  60                 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
  61 #endif
  62         return 0;
  63 }
  64
  65 static int
  66 netxen_api_unlock(struct netxen_adapter *adapter)
  67 {
  68         u32 val;
  69
  70         /* Release PCIE HW semaphore5 */
  71         netxen_nic_read_w0(adapter,
  72                 NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
  73         return 0;
  74 }
  75
  76 static u32
  77 netxen_poll_rsp(struct netxen_adapter *adapter)
  78 {
  79         u32 raw_rsp, rsp = NX_CDRP_RSP_OK;
  80         int     timeout = 0;
  81
  82         do {
  83                 /* give atleast 1ms for firmware to respond */
  84                 msleep(1);
  85
  86                 if (++timeout > NX_OS_CRB_RETRY_COUNT)
  87                         return NX_CDRP_RSP_TIMEOUT;
  88
  89                 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET,
  90                                 &raw_rsp);
  91
  92                 rsp = le32_to_cpu(raw_rsp);
  93         } while (!NX_CDRP_IS_RSP(rsp));
  94
  95         return rsp;
  96 }
  97
  98 static u32
  99 netxen_issue_cmd(struct netxen_adapter *adapter,
 100         u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
 101 {
 102         u32 rsp;
 103         u32 signature = 0;
 104         u32 rcode = NX_RCODE_SUCCESS;
 105
 106         signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);
 107
 108         /* Acquire semaphore before accessing CRB */
 109         if (netxen_api_lock(adapter))
 110                 return NX_RCODE_TIMEOUT;
 111
 112         netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET,
 113                         cpu_to_le32(signature));
 114
 115         netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET,
 116                         cpu_to_le32(arg1));
 117
 118         netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET,
 119                         cpu_to_le32(arg2));
 120
 121         netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET,
 122                         cpu_to_le32(arg3));
 123
 124         netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
 125                         cpu_to_le32(NX_CDRP_FORM_CMD(cmd)));
 126
 127         rsp = netxen_poll_rsp(adapter);
 128
 129         if (rsp == NX_CDRP_RSP_TIMEOUT) {
 130                 printk(KERN_ERR "%s: card response timeout.\n",
 131                                 netxen_nic_driver_name);
 132
 133                 rcode = NX_RCODE_TIMEOUT;
 134         } else if (rsp == NX_CDRP_RSP_FAIL) {
 135                 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
 136                 rcode = le32_to_cpu(rcode);
 137
 138                 printk(KERN_ERR "%s: failed card response code:0x%x\n",
 139                                 netxen_nic_driver_name, rcode);
 140         }
 141
 142         /* Release semaphore */
 143         netxen_api_unlock(adapter);
 144
 145         return rcode;
 146 }
 147
 148 int
 149 nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
 150 {
 151         u32 rcode = NX_RCODE_SUCCESS;
 152         struct netxen_recv_context *recv_ctx = &adapter->recv_ctx[0];
 153
 154         if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
 155                 rcode = netxen_issue_cmd(adapter,
 156                                 adapter->ahw.pci_func,
 157                                 NXHAL_VERSION,
 158                                 recv_ctx->context_id,
 159                                 mtu,
 160                                 0,
 161                                 NX_CDRP_CMD_SET_MTU);
 162
 163         if (rcode != NX_RCODE_SUCCESS)
 164                 return -EIO;
 165
 166         return 0;
 167 }
 168
 169 static int
 170 nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
 171 {
 172         void *addr;
 173         nx_hostrq_rx_ctx_t *prq;
 174         nx_cardrsp_rx_ctx_t *prsp;
 175         nx_hostrq_rds_ring_t *prq_rds;
 176         nx_hostrq_sds_ring_t *prq_sds;
 177         nx_cardrsp_rds_ring_t *prsp_rds;
 178         nx_cardrsp_sds_ring_t *prsp_sds;
 179         struct nx_host_rds_ring *rds_ring;
 180
 181         dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
 182         u64 phys_addr;
 183
 184         int i, nrds_rings, nsds_rings;
 185         size_t rq_size, rsp_size;
 186         u32 cap, reg;
 187
 188         int err;
 189
 190         struct netxen_recv_context *recv_ctx = &adapter->recv_ctx[0];
 191
 192         /* only one sds ring for now */
 193         nrds_rings = adapter->max_rds_rings;
 194         nsds_rings = 1;
 195
 196         rq_size =
 197                 SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
 198         rsp_size =
 199                 SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
 200
 201         addr = pci_alloc_consistent(adapter->pdev,
 202                                 rq_size, &hostrq_phys_addr);
 203         if (addr == NULL)
 204                 return -ENOMEM;
 205         prq = (nx_hostrq_rx_ctx_t *)addr;
 206
 207         addr = pci_alloc_consistent(adapter->pdev,
 208                         rsp_size, &cardrsp_phys_addr);
 209         if (addr == NULL) {
 210                 err = -ENOMEM;
 211                 goto out_free_rq;
 212         }
 213         prsp = (nx_cardrsp_rx_ctx_t *)addr;
 214
 215         prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
 216
 217         cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
 218         cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);
 219
 220         prq->capabilities[0] = cpu_to_le32(cap);
 221         prq->host_int_crb_mode =
 222                 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
 223         prq->host_rds_crb_mode =
 224                 cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
 225
 226         prq->num_rds_rings = cpu_to_le16(nrds_rings);
 227         prq->num_sds_rings = cpu_to_le16(nsds_rings);
 228         prq->rds_ring_offset = 0;
 229         prq->sds_ring_offset = prq->rds_ring_offset +
 230                 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
 231
 232         prq_rds = (nx_hostrq_rds_ring_t *)(prq->data + prq->rds_ring_offset);
 233
 234         for (i = 0; i < nrds_rings; i++) {
 235
 236                 rds_ring = &recv_ctx->rds_rings[i];
 237
 238                 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
 239                 prq_rds[i].ring_size = cpu_to_le32(rds_ring->max_rx_desc_count);
 240                 prq_rds[i].ring_kind = cpu_to_le32(i);
 241                 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
 242         }
 243
 244         prq_sds = (nx_hostrq_sds_ring_t *)(prq->data + prq->sds_ring_offset);
 245
 246         prq_sds[0].host_phys_addr =
 247                 cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr);
 248         prq_sds[0].ring_size = cpu_to_le32(adapter->max_rx_desc_count);
 249         /* only one msix vector for now */
 250         prq_sds[0].msi_index = cpu_to_le32(0);
 251
 252         /* now byteswap offsets */
 253         prq->rds_ring_offset = cpu_to_le32(prq->rds_ring_offset);
 254         prq->sds_ring_offset = cpu_to_le32(prq->sds_ring_offset);
 255
 256         phys_addr = hostrq_phys_addr;
 257         err = netxen_issue_cmd(adapter,
 258                         adapter->ahw.pci_func,
 259                         NXHAL_VERSION,
 260                         (u32)(phys_addr >> 32),
 261                         (u32)(phys_addr & 0xffffffff),
 262                         rq_size,
 263                         NX_CDRP_CMD_CREATE_RX_CTX);
 264         if (err) {
 265                 printk(KERN_WARNING
 266                         "Failed to create rx ctx in firmware%d\n", err);
 267                 goto out_free_rsp;
 268         }
 269
 270
 271         prsp_rds = ((nx_cardrsp_rds_ring_t *)
 272                          &prsp->data[prsp->rds_ring_offset]);
 273
 274         for (i = 0; i < le32_to_cpu(prsp->num_rds_rings); i++) {
 275                 rds_ring = &recv_ctx->rds_rings[i];
 276
 277                 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
 278                 rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
 279         }
 280
 281         prsp_sds = ((nx_cardrsp_sds_ring_t *)
 282                         &prsp->data[prsp->sds_ring_offset]);
 283         reg = le32_to_cpu(prsp_sds[0].host_consumer_crb);
 284         recv_ctx->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
 285
 286         reg = le32_to_cpu(prsp_sds[0].interrupt_crb);
 287         adapter->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
 288
 289         recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
 290         recv_ctx->context_id = le16_to_cpu(prsp->context_id);
 291         recv_ctx->virt_port = le16_to_cpu(prsp->virt_port);
 292
 293 out_free_rsp:
 294         pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
 295 out_free_rq:
 296         pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
 297         return err;
 298 }
 299
 300 static void
 301 nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
 302 {
 303         struct netxen_recv_context *recv_ctx = &adapter->recv_ctx[0];
 304
 305         if (netxen_issue_cmd(adapter,
 306                         adapter->ahw.pci_func,
 307                         NXHAL_VERSION,
 308                         recv_ctx->context_id,
 309                         NX_DESTROY_CTX_RESET,
 310                         0,
 311                         NX_CDRP_CMD_DESTROY_RX_CTX)) {
 312
 313                 printk(KERN_WARNING
 314                         "%s: Failed to destroy rx ctx in firmware\n",
 315                         netxen_nic_driver_name);
 316         }
 317 }
 318
 319 static int
 320 nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
 321 {
 322         nx_hostrq_tx_ctx_t      *prq;
 323         nx_hostrq_cds_ring_t    *prq_cds;
 324         nx_cardrsp_tx_ctx_t     *prsp;
 325         void    *rq_addr, *rsp_addr;
 326         size_t  rq_size, rsp_size;
 327         u32     temp;
 328         int     err = 0;
 329         u64     offset, phys_addr;
 330         dma_addr_t      rq_phys_addr, rsp_phys_addr;
 331
 332         rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
 333         rq_addr = pci_alloc_consistent(adapter->pdev,
 334                 rq_size, &rq_phys_addr);
 335         if (!rq_addr)
 336                 return -ENOMEM;
 337
 338         rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
 339         rsp_addr = pci_alloc_consistent(adapter->pdev,
 340                 rsp_size, &rsp_phys_addr);
 341         if (!rsp_addr) {
 342                 err = -ENOMEM;
 343                 goto out_free_rq;
 344         }
 345
 346         memset(rq_addr, 0, rq_size);
 347         prq = (nx_hostrq_tx_ctx_t *)rq_addr;
 348
 349         memset(rsp_addr, 0, rsp_size);
 350         prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;
 351
 352         prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
 353
 354         temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
 355         prq->capabilities[0] = cpu_to_le32(temp);
 356
 357         prq->host_int_crb_mode =
 358                 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
 359
 360         prq->interrupt_ctl = 0;
 361         prq->msi_index = 0;
 362
 363         prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
 364
 365         offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx);
 366         prq->cmd_cons_dma_addr = cpu_to_le64(offset);
 367
 368         prq_cds = &prq->cds_ring;
 369
 370         prq_cds->host_phys_addr =
 371                 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
 372
 373         prq_cds->ring_size = cpu_to_le32(adapter->max_tx_desc_count);
 374
 375         phys_addr = rq_phys_addr;
 376         err = netxen_issue_cmd(adapter,
 377                         adapter->ahw.pci_func,
 378                         NXHAL_VERSION,
 379                         (u32)(phys_addr >> 32),
 380                         ((u32)phys_addr & 0xffffffff),
 381                         rq_size,
 382                         NX_CDRP_CMD_CREATE_TX_CTX);
 383
 384         if (err == NX_RCODE_SUCCESS) {
 385                 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
 386                 adapter->crb_addr_cmd_producer =
 387                         NETXEN_NIC_REG(temp - 0x200);
 388 #if 0
 389                 adapter->tx_state =
 390                         le32_to_cpu(prsp->host_ctx_state);
 391 #endif
 392                 adapter->tx_context_id =
 393                         le16_to_cpu(prsp->context_id);
 394         } else {
 395                 printk(KERN_WARNING
 396                         "Failed to create tx ctx in firmware%d\n", err);
 397                 err = -EIO;
 398         }
 399
 400         pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
 401
 402 out_free_rq:
 403         pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
 404
 405         return err;
 406 }
 407
 408 static void
 409 nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
 410 {
 411         if (netxen_issue_cmd(adapter,
 412                         adapter->ahw.pci_func,
 413                         NXHAL_VERSION,
 414                         adapter->tx_context_id,
 415                         NX_DESTROY_CTX_RESET,
 416                         0,
 417                         NX_CDRP_CMD_DESTROY_TX_CTX)) {
 418
 419                 printk(KERN_WARNING
 420                         "%s: Failed to destroy tx ctx in firmware\n",
 421                         netxen_nic_driver_name);
 422         }
 423 }
 424
 425 static u64 ctx_addr_sig_regs[][3] = {
 426         {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
 427         {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
 428         {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
 429         {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
 430 };
 431
 432 #define CRB_CTX_ADDR_REG_LO(FUNC_ID)    (ctx_addr_sig_regs[FUNC_ID][0])
 433 #define CRB_CTX_ADDR_REG_HI(FUNC_ID)    (ctx_addr_sig_regs[FUNC_ID][2])
 434 #define CRB_CTX_SIGNATURE_REG(FUNC_ID)  (ctx_addr_sig_regs[FUNC_ID][1])
 435
 436 #define lower32(x)      ((u32)((x) & 0xffffffff))
 437 #define upper32(x)      ((u32)(((u64)(x) >> 32) & 0xffffffff))
 438
 439 static struct netxen_recv_crb recv_crb_registers[] = {
 440         /* Instance 0 */
 441         {
 442                 /* crb_rcv_producer: */
 443                 {
 444                         NETXEN_NIC_REG(0x100),
 445                         /* Jumbo frames */
 446                         NETXEN_NIC_REG(0x110),
 447                         /* LRO */
 448                         NETXEN_NIC_REG(0x120)
 449                 },
 450                 /* crb_sts_consumer: */
 451                 NETXEN_NIC_REG(0x138),
 452         },
 453         /* Instance 1 */
 454         {
 455                 /* crb_rcv_producer: */
 456                 {
 457                         NETXEN_NIC_REG(0x144),
 458                         /* Jumbo frames */
 459                         NETXEN_NIC_REG(0x154),
 460                         /* LRO */
 461                         NETXEN_NIC_REG(0x164)
 462                 },
 463                 /* crb_sts_consumer: */
 464                 NETXEN_NIC_REG(0x17c),
 465         },
 466         /* Instance 2 */
 467         {
 468                 /* crb_rcv_producer: */
 469                 {
 470                         NETXEN_NIC_REG(0x1d8),
 471                         /* Jumbo frames */
 472                         NETXEN_NIC_REG(0x1f8),
 473                         /* LRO */
 474                         NETXEN_NIC_REG(0x208)
 475                 },
 476                 /* crb_sts_consumer: */
 477                 NETXEN_NIC_REG(0x220),
 478         },
 479         /* Instance 3 */
 480         {
 481                 /* crb_rcv_producer: */
 482                 {
 483                         NETXEN_NIC_REG(0x22c),
 484                         /* Jumbo frames */
 485                         NETXEN_NIC_REG(0x23c),
 486                         /* LRO */
 487                         NETXEN_NIC_REG(0x24c)
 488                 },
 489                 /* crb_sts_consumer: */
 490                 NETXEN_NIC_REG(0x264),
 491         },
 492 };
 493
 494 static int
 495 netxen_init_old_ctx(struct netxen_adapter *adapter)
 496 {
 497         struct netxen_recv_context *recv_ctx;
 498         struct nx_host_rds_ring *rds_ring;
 499         int ctx, ring;
 500         int func_id = adapter->portnum;
 501
 502         adapter->ctx_desc->cmd_ring_addr =
 503                 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
 504         adapter->ctx_desc->cmd_ring_size =
 505                 cpu_to_le32(adapter->max_tx_desc_count);
 506
 507         for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
 508                 recv_ctx = &adapter->recv_ctx[ctx];
 509
 510                 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 511                         rds_ring = &recv_ctx->rds_rings[ring];
 512
 513                         adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
 514                                 cpu_to_le64(rds_ring->phys_addr);
 515                         adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
 516                                 cpu_to_le32(rds_ring->max_rx_desc_count);
 517                 }
 518                 adapter->ctx_desc->sts_ring_addr =
 519                         cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr);
 520                 adapter->ctx_desc->sts_ring_size =
 521                         cpu_to_le32(adapter->max_rx_desc_count);
 522         }
 523
 524         adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id),
 525                         lower32(adapter->ctx_desc_phys_addr));
 526         adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id),
 527                         upper32(adapter->ctx_desc_phys_addr));
 528         adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id),
 529                         NETXEN_CTX_SIGNATURE | func_id);
 530         return 0;
 531 }
 532
 533 static uint32_t sw_int_mask[4] = {
 534         CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
 535         CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
 536 };
 537
 538 int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
 539 {
 540         struct netxen_hardware_context *hw = &adapter->ahw;
 541         u32 state = 0;
 542         void *addr;
 543         int err = 0;
 544         int ctx, ring;
 545         struct netxen_recv_context *recv_ctx;
 546         struct nx_host_rds_ring *rds_ring;
 547
 548         err = netxen_receive_peg_ready(adapter);
 549         if (err) {
 550                 printk(KERN_ERR "Rcv Peg initialization not complete:%x.\n",
 551                                 state);
 552                 return err;
 553         }
 554
 555         addr = pci_alloc_consistent(adapter->pdev,
 556                         sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
 557                         &adapter->ctx_desc_phys_addr);
 558
 559         if (addr == NULL) {
 560                 DPRINTK(ERR, "failed to allocate hw context\n");
 561                 return -ENOMEM;
 562         }
 563         memset(addr, 0, sizeof(struct netxen_ring_ctx));
 564         adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
 565         adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
 566         adapter->ctx_desc->cmd_consumer_offset =
 567                 cpu_to_le64(adapter->ctx_desc_phys_addr +
 568                         sizeof(struct netxen_ring_ctx));
 569         adapter->cmd_consumer =
 570                 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
 571
 572         /* cmd desc ring */
 573         addr = pci_alloc_consistent(adapter->pdev,
 574                         sizeof(struct cmd_desc_type0) *
 575                         adapter->max_tx_desc_count,
 576                         &hw->cmd_desc_phys_addr);
 577
 578         if (addr == NULL) {
 579                 printk(KERN_ERR "%s failed to allocate tx desc ring\n",
 580                                 netxen_nic_driver_name);
 581                 return -ENOMEM;
 582         }
 583
 584         hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
 585
 586         for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
 587                 recv_ctx = &adapter->recv_ctx[ctx];
 588
 589                 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 590                         /* rx desc ring */
 591                         rds_ring = &recv_ctx->rds_rings[ring];
 592                         addr = pci_alloc_consistent(adapter->pdev,
 593                                         RCV_DESC_RINGSIZE,
 594                                         &rds_ring->phys_addr);
 595                         if (addr == NULL) {
 596                                 printk(KERN_ERR "%s failed to allocate rx "
 597                                         "desc ring[%d]\n",
 598                                         netxen_nic_driver_name, ring);
 599                                 err = -ENOMEM;
 600                                 goto err_out_free;
 601                         }
 602                         rds_ring->desc_head = (struct rcv_desc *)addr;
 603
 604                         if (adapter->fw_major < 4)
 605                                 rds_ring->crb_rcv_producer =
 606                                         recv_crb_registers[adapter->portnum].
 607                                         crb_rcv_producer[ring];
 608                 }
 609
 610                 /* status desc ring */
 611                 addr = pci_alloc_consistent(adapter->pdev,
 612                                 STATUS_DESC_RINGSIZE,
 613                                 &recv_ctx->rcv_status_desc_phys_addr);
 614                 if (addr == NULL) {
 615                         printk(KERN_ERR "%s failed to allocate sts desc ring\n",
 616                                         netxen_nic_driver_name);
 617                         err = -ENOMEM;
 618                         goto err_out_free;
 619                 }
 620                 recv_ctx->rcv_status_desc_head = (struct status_desc *)addr;
 621
 622                 if (adapter->fw_major < 4)
 623                         recv_ctx->crb_sts_consumer =
 624                                 recv_crb_registers[adapter->portnum].
 625                                 crb_sts_consumer;
 626         }
 627
 628         if (adapter->fw_major >= 4) {
 629                 adapter->intr_scheme = INTR_SCHEME_PERPORT;
 630                 adapter->msi_mode = MSI_MODE_MULTIFUNC;
 631
 632                 err = nx_fw_cmd_create_rx_ctx(adapter);
 633                 if (err)
 634                         goto err_out_free;
 635                 err = nx_fw_cmd_create_tx_ctx(adapter);
 636                 if (err)
 637                         goto err_out_free;
 638         } else {
 639
 640                 adapter->intr_scheme = adapter->pci_read_normalize(adapter,
 641                                 CRB_NIC_CAPABILITIES_FW);
 642                 adapter->msi_mode = adapter->pci_read_normalize(adapter,
 643                                 CRB_NIC_MSI_MODE_FW);
 644                 adapter->crb_intr_mask = sw_int_mask[adapter->portnum];
 645
 646                 err = netxen_init_old_ctx(adapter);
 647                 if (err) {
 648                         netxen_free_hw_resources(adapter);
 649                         return err;
 650                 }
 651
 652         }
 653
 654         return 0;
 655
 656 err_out_free:
 657         netxen_free_hw_resources(adapter);
 658         return err;
 659 }
 660
 661 void netxen_free_hw_resources(struct netxen_adapter *adapter)
 662 {
 663         struct netxen_recv_context *recv_ctx;
 664         struct nx_host_rds_ring *rds_ring;
 665         int ctx, ring;
 666
 667         if (adapter->fw_major >= 4) {
 668                 nx_fw_cmd_destroy_tx_ctx(adapter);
 669                 nx_fw_cmd_destroy_rx_ctx(adapter);
 670         }
 671
 672         if (adapter->ctx_desc != NULL) {
 673                 pci_free_consistent(adapter->pdev,
 674                                 sizeof(struct netxen_ring_ctx) +
 675                                 sizeof(uint32_t),
 676                                 adapter->ctx_desc,
 677                                 adapter->ctx_desc_phys_addr);
 678                 adapter->ctx_desc = NULL;
 679         }
 680
 681         if (adapter->ahw.cmd_desc_head != NULL) {
 682                 pci_free_consistent(adapter->pdev,
 683                                 sizeof(struct cmd_desc_type0) *
 684                                 adapter->max_tx_desc_count,
 685                                 adapter->ahw.cmd_desc_head,
 686                                 adapter->ahw.cmd_desc_phys_addr);
 687                 adapter->ahw.cmd_desc_head = NULL;
 688         }
 689
 690         for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
 691                 recv_ctx = &adapter->recv_ctx[ctx];
 692                 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 693                         rds_ring = &recv_ctx->rds_rings[ring];
 694
 695                         if (rds_ring->desc_head != NULL) {
 696                                 pci_free_consistent(adapter->pdev,
 697                                                 RCV_DESC_RINGSIZE,
 698                                                 rds_ring->desc_head,
 699                                                 rds_ring->phys_addr);
 700                                 rds_ring->desc_head = NULL;
 701                         }
 702                 }
 703
 704                 if (recv_ctx->rcv_status_desc_head != NULL) {
 705                         pci_free_consistent(adapter->pdev,
 706                                         STATUS_DESC_RINGSIZE,
 707                                         recv_ctx->rcv_status_desc_head,
 708                                         recv_ctx->rcv_status_desc_phys_addr);
 709                         recv_ctx->rcv_status_desc_head = NULL;
 710                 }
 711         }
 712 }
 713