1 /* zd_rf_al2230.c: Functions for the AL2230 RF controller
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #include <linux/kernel.h>
24 static const u32 zd1211_al2230_table[][3] = {
25 RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
26 RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
27 RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
28 RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
29 RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
30 RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
31 RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
32 RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
33 RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
34 RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
35 RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
36 RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
37 RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
38 RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
41 static const u32 zd1211b_al2230_table[][3] = {
42 RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
43 RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
44 RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
45 RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
46 RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
47 RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
48 RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
49 RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
50 RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
51 RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
52 RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
53 RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
54 RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
55 RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
58 static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
59 { CR240, 0x57 }, { CR9, 0xe0 },
62 static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
65 static const struct zd_ioreq16 ioreqs[] = {
66 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
67 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
74 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
78 /* related to antenna selection? */
79 if (chip->new_phy_layout) {
80 r = zd_iowrite16_locked(chip, 0xe1, CR9);
85 return zd_iowrite16_locked(chip, 0x06, CR203);
88 static int zd1211_al2230_init_hw(struct zd_rf *rf)
91 struct zd_chip *chip = zd_rf_to_chip(rf);
93 static const struct zd_ioreq16 ioreqs[] = {
94 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
95 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
96 { CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a },
97 { CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b },
98 { CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 },
99 /* for newest (3rd cut) AL2300 */
101 { CR26, 0x93 }, { CR34, 0x30 },
102 /* for newest (3rd cut) AL2300 */
104 { CR41, 0x24 }, { CR44, 0x32 },
105 /* for newest (3rd cut) AL2300 */
107 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
108 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
109 { CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 },
110 { CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 },
111 { CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 },
112 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
114 /* for newest (3rd cut) AL2300 */
116 { CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc },
117 { CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 },
118 { CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff },
121 /* These following happen separately in the vendor driver */
124 /* shdnb(PLL_ON)=0 */
126 /* shdnb(PLL_ON)=1 */
128 { CR138, 0x28 }, { CR203, 0x06 },
131 static const u32 rv[] = {
141 0x0f4dc5, /* fix freq shift, 0x04edc5 */
145 0x0403b9, /* external control TX power (CR31) */
152 /* These writes happen separately in the vendor driver */
160 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
164 r = zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
171 static int zd1211b_al2230_init_hw(struct zd_rf *rf)
174 struct zd_chip *chip = zd_rf_to_chip(rf);
176 static const struct zd_ioreq16 ioreqs1[] = {
177 { CR10, 0x89 }, { CR15, 0x20 },
178 { CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
179 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
180 { CR28, 0x3e }, { CR29, 0x00 },
181 { CR33, 0x28 }, /* 5621 */
183 { CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
184 { CR41, 0x24 }, { CR44, 0x32 },
185 { CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
188 /* ZD1211B 05.06.10 */
189 { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 },
190 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
191 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
194 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
195 { CR87, 0x0a }, { CR89, 0x04 },
196 { CR91, 0x00 }, /* 5621 */
198 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */
199 { CR99, 0x00 }, /* 5621 */
200 { CR101, 0x13 }, { CR102, 0x27 },
201 { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
203 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
204 { CR110, 0x1f }, /* 4804, for 1212 new algorithm */
205 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
207 { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */
209 { CR117, 0xfa }, /* for 1211b */
210 { CR118, 0xfa }, /* for 1211b */
213 { CR121, 0x6c }, /* for 1211b */
214 { CR122, 0xfc }, /* E0->FC at 4902 */
215 { CR123, 0x57 }, /* 5623 */
216 { CR125, 0xad }, /* 4804, for 1212 new algorithm */
217 { CR126, 0x6c }, /* 5614 */
218 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
219 { CR137, 0x50 }, /* 5614 */
221 { CR144, 0xac }, /* 5621 */
222 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 },
225 static const u32 rv1[] = {
231 /* To improve AL2230 yield, improve phase noise, 4713 */
235 0x6da010, /* Reg6 update for MP versio */
236 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
238 0x9dc020, /* External control TX power (CR31) */
239 0x5ddb00, /* RegA update for MP version */
240 0xd99000, /* RegB update for MP version */
241 0x3ffbd0, /* RegC update for MP version */
242 0xb00000, /* RegD update for MP version */
244 /* improve phase noise and remove phase calibration,4713 */
248 static const struct zd_ioreq16 ioreqs2[] = {
249 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
250 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
253 static const u32 rv2[] = {
254 /* To improve AL2230 yield, 4713 */
260 static const struct zd_ioreq16 ioreqs3[] = {
261 /* related to 6M band edge patching, happens unconditionally */
262 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
265 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
266 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
269 r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
272 r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
275 r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
278 r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
281 r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
284 r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
287 return zd1211b_al2230_finalize_rf(chip);
290 static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
293 const u32 *rv = zd1211_al2230_table[channel-1];
294 struct zd_chip *chip = zd_rf_to_chip(rf);
295 static const struct zd_ioreq16 ioreqs[] = {
300 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
303 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
306 static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
309 const u32 *rv = zd1211b_al2230_table[channel-1];
310 struct zd_chip *chip = zd_rf_to_chip(rf);
312 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
313 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
317 r = zd_rfwritev_cr_locked(chip, rv, 3);
321 return zd1211b_al2230_finalize_rf(chip);
324 static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
326 struct zd_chip *chip = zd_rf_to_chip(rf);
327 static const struct zd_ioreq16 ioreqs[] = {
332 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
335 static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
337 struct zd_chip *chip = zd_rf_to_chip(rf);
338 static const struct zd_ioreq16 ioreqs[] = {
343 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
346 static int al2230_switch_radio_off(struct zd_rf *rf)
348 struct zd_chip *chip = zd_rf_to_chip(rf);
349 static const struct zd_ioreq16 ioreqs[] = {
354 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
357 int zd_rf_init_al2230(struct zd_rf *rf)
359 struct zd_chip *chip = zd_rf_to_chip(rf);
361 if (chip->al2230s_bit) {
362 dev_err(zd_chip_dev(chip), "AL2230S devices are not yet "
363 "supported by this driver.\n");
367 rf->switch_radio_off = al2230_switch_radio_off;
368 if (chip->is_zd1211b) {
369 rf->init_hw = zd1211b_al2230_init_hw;
370 rf->set_channel = zd1211b_al2230_set_channel;
371 rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
373 rf->init_hw = zd1211_al2230_init_hw;
374 rf->set_channel = zd1211_al2230_set_channel;
375 rf->switch_radio_on = zd1211_al2230_switch_radio_on;
377 rf->patch_6m_band_edge = 1;