2 * Q40 I/O port IDE Driver
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
13 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/blkdev.h>
17 #include <linux/hdreg.h>
19 #include <linux/ide.h>
22 * Bases of the IDE interfaces
25 #define Q40IDE_NUM_HWIFS 2
27 #define PCIDE_BASE1 0x1f0
28 #define PCIDE_BASE2 0x170
29 #define PCIDE_BASE3 0x1e8
30 #define PCIDE_BASE4 0x168
31 #define PCIDE_BASE5 0x1e0
32 #define PCIDE_BASE6 0x160
34 static const unsigned long pcide_bases[Q40IDE_NUM_HWIFS] = {
35 PCIDE_BASE1, PCIDE_BASE2, /* PCIDE_BASE3, PCIDE_BASE4 , PCIDE_BASE5,
39 static int q40ide_default_irq(unsigned long base)
42 case 0x1f0: return 14;
43 case 0x170: return 15;
44 case 0x1e8: return 11;
52 * Addresses are pretranslated for Q40 ISA access.
54 static void q40_ide_setup_ports(hw_regs_t *hw, unsigned long base,
55 ide_ack_intr_t *ack_intr,
58 memset(hw, 0, sizeof(hw_regs_t));
60 assumption: only DATA port is ever used in 16 bit mode */
61 hw->io_ports.data_addr = Q40_ISA_IO_W(base);
62 hw->io_ports.error_addr = Q40_ISA_IO_B(base + 1);
63 hw->io_ports.nsect_addr = Q40_ISA_IO_B(base + 2);
64 hw->io_ports.lbal_addr = Q40_ISA_IO_B(base + 3);
65 hw->io_ports.lbam_addr = Q40_ISA_IO_B(base + 4);
66 hw->io_ports.lbah_addr = Q40_ISA_IO_B(base + 5);
67 hw->io_ports.device_addr = Q40_ISA_IO_B(base + 6);
68 hw->io_ports.status_addr = Q40_ISA_IO_B(base + 7);
69 hw->io_ports.ctl_addr = Q40_ISA_IO_B(base + 0x206);
72 hw->ack_intr = ack_intr;
78 * the static array is needed to have the name reported in /proc/ioports,
79 * hwif->name unfortunately isn't available yet
81 static const char *q40_ide_names[Q40IDE_NUM_HWIFS]={
86 * Probe for Q40 IDE interfaces
89 static int __init q40ide_init(void)
94 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
99 printk(KERN_INFO "ide: Q40 IDE controller\n");
101 for (i = 0; i < Q40IDE_NUM_HWIFS; i++) {
104 name = q40_ide_names[i];
105 if (!request_region(pcide_bases[i], 8, name)) {
106 printk("could not reserve ports %lx-%lx for %s\n",
107 pcide_bases[i],pcide_bases[i]+8,name);
110 if (!request_region(pcide_bases[i]+0x206, 1, name)) {
111 printk("could not reserve port %lx for %s\n",
112 pcide_bases[i]+0x206,name);
113 release_region(pcide_bases[i], 8);
116 q40_ide_setup_ports(&hw, pcide_bases[i],
119 q40ide_default_irq(pcide_bases[i]));
121 hwif = ide_find_port();
123 ide_init_port_data(hwif, hwif->index);
124 ide_init_port_hw(hwif, &hw);
126 idx[i] = hwif->index;
130 ide_device_add(idx, NULL);
135 module_init(q40ide_init);
137 MODULE_LICENSE("GPL");