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   1 /*
   2  * arch/arm/mach-at91rm9200/at91sam9260.c
   3  *
   4  *  Copyright (C) 2006 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14
  15 #include <asm/mach/arch.h>
  16 #include <asm/mach/map.h>
  17 #include <asm/arch/at91sam9260.h>
  18 #include <asm/arch/at91_pmc.h>
  19
  20 #include "generic.h"
  21 #include "clock.h"
  22
  23 static struct map_desc at91sam9260_io_desc[] __initdata = {
  24         {
  25                 .virtual        = AT91_VA_BASE_SYS,
  26                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  27                 .length         = SZ_16K,
  28                 .type           = MT_DEVICE,
  29         }, {
  30                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
  31                 .pfn            = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
  32                 .length         = AT91SAM9260_SRAM0_SIZE,
  33                 .type           = MT_DEVICE,
  34         }, {
  35                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
  36                 .pfn            = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
  37                 .length         = AT91SAM9260_SRAM1_SIZE,
  38                 .type           = MT_DEVICE,
  39         },
  40 };
  41
  42 /* --------------------------------------------------------------------
  43  *  Clocks
  44  * -------------------------------------------------------------------- */
  45
  46 /*
  47  * The peripheral clocks.
  48  */
  49 static struct clk pioA_clk = {
  50         .name           = "pioA_clk",
  51         .pmc_mask       = 1 << AT91SAM9260_ID_PIOA,
  52         .type           = CLK_TYPE_PERIPHERAL,
  53 };
  54 static struct clk pioB_clk = {
  55         .name           = "pioB_clk",
  56         .pmc_mask       = 1 << AT91SAM9260_ID_PIOB,
  57         .type           = CLK_TYPE_PERIPHERAL,
  58 };
  59 static struct clk pioC_clk = {
  60         .name           = "pioC_clk",
  61         .pmc_mask       = 1 << AT91SAM9260_ID_PIOC,
  62         .type           = CLK_TYPE_PERIPHERAL,
  63 };
  64 static struct clk adc_clk = {
  65         .name           = "adc_clk",
  66         .pmc_mask       = 1 << AT91SAM9260_ID_ADC,
  67         .type           = CLK_TYPE_PERIPHERAL,
  68 };
  69 static struct clk usart0_clk = {
  70         .name           = "usart0_clk",
  71         .pmc_mask       = 1 << AT91SAM9260_ID_US0,
  72         .type           = CLK_TYPE_PERIPHERAL,
  73 };
  74 static struct clk usart1_clk = {
  75         .name           = "usart1_clk",
  76         .pmc_mask       = 1 << AT91SAM9260_ID_US1,
  77         .type           = CLK_TYPE_PERIPHERAL,
  78 };
  79 static struct clk usart2_clk = {
  80         .name           = "usart2_clk",
  81         .pmc_mask       = 1 << AT91SAM9260_ID_US2,
  82         .type           = CLK_TYPE_PERIPHERAL,
  83 };
  84 static struct clk mmc_clk = {
  85         .name           = "mci_clk",
  86         .pmc_mask       = 1 << AT91SAM9260_ID_MCI,
  87         .type           = CLK_TYPE_PERIPHERAL,
  88 };
  89 static struct clk udc_clk = {
  90         .name           = "udc_clk",
  91         .pmc_mask       = 1 << AT91SAM9260_ID_UDP,
  92         .type           = CLK_TYPE_PERIPHERAL,
  93 };
  94 static struct clk twi_clk = {
  95         .name           = "twi_clk",
  96         .pmc_mask       = 1 << AT91SAM9260_ID_TWI,
  97         .type           = CLK_TYPE_PERIPHERAL,
  98 };
  99 static struct clk spi0_clk = {
 100         .name           = "spi0_clk",
 101         .pmc_mask       = 1 << AT91SAM9260_ID_SPI0,
 102         .type           = CLK_TYPE_PERIPHERAL,
 103 };
 104 static struct clk spi1_clk = {
 105         .name           = "spi1_clk",
 106         .pmc_mask       = 1 << AT91SAM9260_ID_SPI1,
 107         .type           = CLK_TYPE_PERIPHERAL,
 108 };
 109 static struct clk ohci_clk = {
 110         .name           = "ohci_clk",
 111         .pmc_mask       = 1 << AT91SAM9260_ID_UHP,
 112         .type           = CLK_TYPE_PERIPHERAL,
 113 };
 114 static struct clk ether_clk = {
 115         .name           = "ether_clk",
 116         .pmc_mask       = 1 << AT91SAM9260_ID_EMAC,
 117         .type           = CLK_TYPE_PERIPHERAL,
 118 };
 119 static struct clk isi_clk = {
 120         .name           = "isi_clk",
 121         .pmc_mask       = 1 << AT91SAM9260_ID_ISI,
 122         .type           = CLK_TYPE_PERIPHERAL,
 123 };
 124 static struct clk usart3_clk = {
 125         .name           = "usart3_clk",
 126         .pmc_mask       = 1 << AT91SAM9260_ID_US3,
 127         .type           = CLK_TYPE_PERIPHERAL,
 128 };
 129 static struct clk usart4_clk = {
 130         .name           = "usart4_clk",
 131         .pmc_mask       = 1 << AT91SAM9260_ID_US4,
 132         .type           = CLK_TYPE_PERIPHERAL,
 133 };
 134 static struct clk usart5_clk = {
 135         .name           = "usart5_clk",
 136         .pmc_mask       = 1 << AT91SAM9260_ID_US5,
 137         .type           = CLK_TYPE_PERIPHERAL,
 138 };
 139
 140 static struct clk *periph_clocks[] __initdata = {
 141         &pioA_clk,
 142         &pioB_clk,
 143         &pioC_clk,
 144         &adc_clk,
 145         &usart0_clk,
 146         &usart1_clk,
 147         &usart2_clk,
 148         &mmc_clk,
 149         &udc_clk,
 150         &twi_clk,
 151         &spi0_clk,
 152         &spi1_clk,
 153         // ssc
 154         // tc0 .. tc2
 155         &ohci_clk,
 156         &ether_clk,
 157         &isi_clk,
 158         &usart3_clk,
 159         &usart4_clk,
 160         &usart5_clk,
 161         // tc3 .. tc5
 162         // irq0 .. irq2
 163 };
 164
 165 /*
 166  * The two programmable clocks.
 167  * You must configure pin multiplexing to bring these signals out.
 168  */
 169 static struct clk pck0 = {
 170         .name           = "pck0",
 171         .pmc_mask       = AT91_PMC_PCK0,
 172         .type           = CLK_TYPE_PROGRAMMABLE,
 173         .id             = 0,
 174 };
 175 static struct clk pck1 = {
 176         .name           = "pck1",
 177         .pmc_mask       = AT91_PMC_PCK1,
 178         .type           = CLK_TYPE_PROGRAMMABLE,
 179         .id             = 1,
 180 };
 181
 182 static void __init at91sam9260_register_clocks(void)
 183 {
 184         int i;
 185
 186         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 187                 clk_register(periph_clocks[i]);
 188
 189         clk_register(&pck0);
 190         clk_register(&pck1);
 191 }
 192
 193 /* --------------------------------------------------------------------
 194  *  GPIO
 195  * -------------------------------------------------------------------- */
 196
 197 static struct at91_gpio_bank at91sam9260_gpio[] = {
 198         {
 199                 .id             = AT91SAM9260_ID_PIOA,
 200                 .offset         = AT91_PIOA,
 201                 .clock          = &pioA_clk,
 202         }, {
 203                 .id             = AT91SAM9260_ID_PIOB,
 204                 .offset         = AT91_PIOB,
 205                 .clock          = &pioB_clk,
 206         }, {
 207                 .id             = AT91SAM9260_ID_PIOC,
 208                 .offset         = AT91_PIOC,
 209                 .clock          = &pioC_clk,
 210         }
 211 };
 212
 213 static void at91sam9260_reset(void)
 214 {
 215 #warning "Implement CPU reset"
 216 }
 217
 218
 219 /* --------------------------------------------------------------------
 220  *  AT91SAM9260 processor initialization
 221  * -------------------------------------------------------------------- */
 222
 223 void __init at91sam9260_initialize(unsigned long main_clock)
 224 {
 225         /* Map peripherals */
 226         iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
 227
 228         at91_arch_reset = at91sam9260_reset;
 229         at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
 230                         | (1 << AT91SAM9260_ID_IRQ2);
 231
 232         /* Init clock subsystem */
 233         at91_clock_init(main_clock);
 234
 235         /* Register the processor-specific clocks */
 236         at91sam9260_register_clocks();
 237
 238         /* Register GPIO subsystem */
 239         at91_gpio_init(at91sam9260_gpio, 3);
 240 }
 241
 242 /* --------------------------------------------------------------------
 243  *  Interrupt initialization
 244  * -------------------------------------------------------------------- */
 245
 246 /*
 247  * The default interrupt priority levels (0 = lowest, 7 = highest).
 248  */
 249 static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
 250         7,      /* Advanced Interrupt Controller */
 251         7,      /* System Peripherals */
 252         0,      /* Parallel IO Controller A */
 253         0,      /* Parallel IO Controller B */
 254         0,      /* Parallel IO Controller C */
 255         0,      /* Analog-to-Digital Converter */
 256         6,      /* USART 0 */
 257         6,      /* USART 1 */
 258         6,      /* USART 2 */
 259         0,      /* Multimedia Card Interface */
 260         4,      /* USB Device Port */
 261         0,      /* Two-Wire Interface */
 262         6,      /* Serial Peripheral Interface 0 */
 263         6,      /* Serial Peripheral Interface 1 */
 264         5,      /* Serial Synchronous Controller */
 265         0,
 266         0,
 267         0,      /* Timer Counter 0 */
 268         0,      /* Timer Counter 1 */
 269         0,      /* Timer Counter 2 */
 270         3,      /* USB Host port */
 271         3,      /* Ethernet */
 272         0,      /* Image Sensor Interface */
 273         6,      /* USART 3 */
 274         6,      /* USART 4 */
 275         6,      /* USART 5 */
 276         0,      /* Timer Counter 3 */
 277         0,      /* Timer Counter 4 */
 278         0,      /* Timer Counter 5 */
 279         0,      /* Advanced Interrupt Controller */
 280         0,      /* Advanced Interrupt Controller */
 281         0,      /* Advanced Interrupt Controller */
 282 };
 283
 284 void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 285 {
 286         if (!priority)
 287                 priority = at91sam9260_default_irq_priority;
 288
 289         /* Initialize the AIC interrupt controller */
 290         at91_aic_init(priority);
 291
 292         /* Enable GPIO interrupts */
 293         at91_gpio_irq_setup();
 294 }