[PATCH] powerpc: Rename and export ppc64_firmware_features
[linux-2.6] / include / asm-frv / system.h
1 /* system.h: FR-V CPU control definitions
2  *
3  * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4  * Written by David Howells (dhowells@redhat.com)
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11
12 #ifndef _ASM_SYSTEM_H
13 #define _ASM_SYSTEM_H
14
15 #include <linux/config.h> /* get configuration macros */
16 #include <linux/linkage.h>
17 #include <asm/atomic.h>
18
19 struct thread_struct;
20
21 #define prepare_to_switch()    do { } while(0)
22
23 /*
24  * switch_to(prev, next) should switch from task `prev' to `next'
25  * `prev' will never be the same as `next'.
26  * The `mb' is to tell GCC not to cache `current' across this call.
27  */
28 extern asmlinkage
29 struct task_struct *__switch_to(struct thread_struct *prev_thread,
30                                 struct thread_struct *next_thread,
31                                 struct task_struct *prev);
32
33 #define switch_to(prev, next, last)                                     \
34 do {                                                                    \
35         (prev)->thread.sched_lr =                                       \
36                 (unsigned long) __builtin_return_address(0);            \
37         (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
38         mb();                                                           \
39 } while(0)
40
41 /*
42  * interrupt flag manipulation
43  * - use virtual interrupt management since touching the PSR is slow
44  *   - ICC2.Z: T if interrupts virtually disabled
45  *   - ICC2.C: F if interrupts really disabled
46  * - if Z==1 upon interrupt:
47  *   - C is set to 0
48  *   - interrupts are really disabled
49  *   - entry.S returns immediately
50  * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
51  *   - if taken, the trap:
52  *     - sets ICC2.C
53  *     - enables interrupts
54  */
55 #define local_irq_disable()                                     \
56 do {                                                            \
57         /* set Z flag, but don't change the C flag */           \
58         asm volatile("  andcc   gr0,gr0,gr0,icc2        \n"     \
59                      :                                          \
60                      :                                          \
61                      : "memory", "icc2"                         \
62                      );                                         \
63 } while(0)
64
65 #define local_irq_enable()                                      \
66 do {                                                            \
67         /* clear Z flag and then test the C flag */             \
68         asm volatile("  oricc   gr0,#1,gr0,icc2         \n"     \
69                      "  tihi    icc2,gr0,#2             \n"     \
70                      :                                          \
71                      :                                          \
72                      : "memory", "icc2"                         \
73                      );                                         \
74 } while(0)
75
76 #define local_save_flags(flags)                                 \
77 do {                                                            \
78         typecheck(unsigned long, flags);                        \
79         asm volatile("movsg ccr,%0"                             \
80                      : "=r"(flags)                              \
81                      :                                          \
82                      : "memory");                               \
83                                                                 \
84         /* shift ICC2.Z to bit 0 */                             \
85         flags >>= 26;                                           \
86                                                                 \
87         /* make flags 1 if interrupts disabled, 0 otherwise */  \
88         flags &= 1UL;                                           \
89 } while(0)
90
91 #define irqs_disabled() \
92         ({unsigned long flags; local_save_flags(flags); flags; })
93
94 #define local_irq_save(flags)                   \
95 do {                                            \
96         typecheck(unsigned long, flags);        \
97         local_save_flags(flags);                \
98         local_irq_disable();                    \
99 } while(0)
100
101 #define local_irq_restore(flags)                                        \
102 do {                                                                    \
103         typecheck(unsigned long, flags);                                \
104                                                                         \
105         /* load the Z flag by turning 1 if disabled into 0 if disabled  \
106          * and thus setting the Z flag but not the C flag */            \
107         asm volatile("  xoricc  %0,#1,gr0,icc2          \n"             \
108                      /* then test Z=0 and C=0 */                        \
109                      "  tihi    icc2,gr0,#2             \n"             \
110                      :                                                  \
111                      : "r"(flags)                                       \
112                      : "memory", "icc2"                                 \
113                      );                                                 \
114                                                                         \
115 } while(0)
116
117 /*
118  * real interrupt flag manipulation
119  */
120 #define __local_irq_disable()                           \
121 do {                                                    \
122         unsigned long psr;                              \
123         asm volatile("  movsg   psr,%0          \n"     \
124                      "  andi    %0,%2,%0        \n"     \
125                      "  ori     %0,%1,%0        \n"     \
126                      "  movgs   %0,psr          \n"     \
127                      : "=r"(psr)                        \
128                      : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
129                      : "memory");                       \
130 } while(0)
131
132 #define __local_irq_enable()                            \
133 do {                                                    \
134         unsigned long psr;                              \
135         asm volatile("  movsg   psr,%0          \n"     \
136                      "  andi    %0,%1,%0        \n"     \
137                      "  movgs   %0,psr          \n"     \
138                      : "=r"(psr)                        \
139                      : "i" (~PSR_PIL)                   \
140                      : "memory");                       \
141 } while(0)
142
143 #define __local_save_flags(flags)               \
144 do {                                            \
145         typecheck(unsigned long, flags);        \
146         asm("movsg psr,%0"                      \
147             : "=r"(flags)                       \
148             :                                   \
149             : "memory");                        \
150 } while(0)
151
152 #define __local_irq_save(flags)                         \
153 do {                                                    \
154         unsigned long npsr;                             \
155         typecheck(unsigned long, flags);                \
156         asm volatile("  movsg   psr,%0          \n"     \
157                      "  andi    %0,%3,%1        \n"     \
158                      "  ori     %1,%2,%1        \n"     \
159                      "  movgs   %1,psr          \n"     \
160                      : "=r"(flags), "=r"(npsr)          \
161                      : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
162                      : "memory");                       \
163 } while(0)
164
165 #define __local_irq_restore(flags)                      \
166 do {                                                    \
167         typecheck(unsigned long, flags);                \
168         asm volatile("  movgs   %0,psr          \n"     \
169                      :                                  \
170                      : "r" (flags)                      \
171                      : "memory");                       \
172 } while(0)
173
174 #define __irqs_disabled() \
175         ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
176
177 /*
178  * Force strict CPU ordering.
179  */
180 #define nop()                   asm volatile ("nop"::)
181 #define mb()                    asm volatile ("membar" : : :"memory")
182 #define rmb()                   asm volatile ("membar" : : :"memory")
183 #define wmb()                   asm volatile ("membar" : : :"memory")
184 #define set_mb(var, value)      do { var = value; mb(); } while (0)
185 #define set_wmb(var, value)     do { var = value; wmb(); } while (0)
186
187 #define smp_mb()                mb()
188 #define smp_rmb()               rmb()
189 #define smp_wmb()               wmb()
190
191 #define read_barrier_depends()          do {} while(0)
192 #define smp_read_barrier_depends()      read_barrier_depends()
193
194 #define HARD_RESET_NOW()                        \
195 do {                                            \
196         cli();                                  \
197 } while(1)
198
199 extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
200 extern void free_initmem(void);
201
202 #define arch_align_stack(x) (x)
203
204 #endif /* _ASM_SYSTEM_H */