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   1 /*
   2  *  linux/arch/arm/lib/io-writesb.S
   3  *
   4  *  Copyright (C) 1995-2000 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/linkage.h>
  11 #include <asm/assembler.h>
  12
  13                 .macro  outword, rd
  14 #ifndef __ARMEB__
  15                 strb    \rd, [r0]
  16                 mov     \rd, \rd, lsr #8
  17                 strb    \rd, [r0]
  18                 mov     \rd, \rd, lsr #8
  19                 strb    \rd, [r0]
  20                 mov     \rd, \rd, lsr #8
  21                 strb    \rd, [r0]
  22 #else
  23                 mov     lr, \rd, lsr #24
  24                 strb    lr, [r0]
  25                 mov     lr, \rd, lsr #16
  26                 strb    lr, [r0]
  27                 mov     lr, \rd, lsr #8
  28                 strb    lr, [r0]
  29                 strb    \rd, [r0]
  30 #endif
  31                 .endm
  32
  33 .outsb_align:   rsb     ip, ip, #4
  34                 cmp     ip, r2
  35                 movgt   ip, r2
  36                 cmp     ip, #2
  37                 ldrb    r3, [r1], #1
  38                 strb    r3, [r0]
  39                 ldrgeb  r3, [r1], #1
  40                 strgeb  r3, [r0]
  41                 ldrgtb  r3, [r1], #1
  42                 strgtb  r3, [r0]
  43                 subs    r2, r2, ip
  44                 bne     .outsb_aligned
  45
  46 ENTRY(__raw_writesb)
  47                 teq     r2, #0          @ do we have to check for the zero len?
  48                 moveq   pc, lr
  49                 ands    ip, r1, #3
  50                 bne     .outsb_align
  51
  52 .outsb_aligned: stmfd   sp!, {r4, r5, lr}
  53
  54                 subs    r2, r2, #16
  55                 bmi     .outsb_no_16
  56
  57 .outsb_16_lp:   ldmia   r1!, {r3, r4, r5, ip}
  58                 outword r3
  59                 outword r4
  60                 outword r5
  61                 outword ip
  62                 subs    r2, r2, #16
  63                 bpl     .outsb_16_lp
  64
  65                 tst     r2, #15
  66                 LOADREGS(eqfd, sp!, {r4, r5, pc})
  67
  68 .outsb_no_16:   tst     r2, #8
  69                 beq     .outsb_no_8
  70
  71                 ldmia   r1!, {r3, r4}
  72                 outword r3
  73                 outword r4
  74
  75 .outsb_no_8:    tst     r2, #4
  76                 beq     .outsb_no_4
  77
  78                 ldr     r3, [r1], #4
  79                 outword r3
  80
  81 .outsb_no_4:    ands    r2, r2, #3
  82                 LOADREGS(eqfd, sp!, {r4, r5, pc})
  83
  84                 cmp     r2, #2
  85                 ldrb    r3, [r1], #1
  86                 strb    r3, [r0]
  87                 ldrgeb  r3, [r1], #1
  88                 strgeb  r3, [r0]
  89                 ldrgtb  r3, [r1]
  90                 strgtb  r3, [r0]
  91
  92                 LOADREGS(fd, sp!, {r4, r5, pc})