2 * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers
4 * Copyright 2000,1 Compaq Computer Corporation.
6 * Use consistent with the GNU GPL is permitted,
7 * provided that this copyright notice is
8 * preserved in its entirety in all copies and derived works.
10 * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
11 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
12 * FITNESS FOR ANY PARTICULAR PURPOSE.
14 * Author: Jamey Hicks.
18 * 2001-10-?? Andrew Christian Added support for iPAQ H3800
19 * and abstracted EGPIO interface.
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/tty.h>
27 #include <linux/device.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/serial_core.h>
33 #include <mach/hardware.h>
34 #include <asm/mach-types.h>
35 #include <asm/setup.h>
37 #include <asm/mach/irq.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/flash.h>
40 #include <asm/mach/irda.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/serial_sa1100.h>
44 #include <mach/h3600.h>
46 #if defined (CONFIG_SA1100_H3600) || defined (CONFIG_SA1100_H3100)
47 #include <mach/h3600_gpio.h>
50 #ifdef CONFIG_SA1100_H3800
51 #include <mach/h3600_asic.h>
56 struct ipaq_model_ops ipaq_model_ops;
57 EXPORT_SYMBOL(ipaq_model_ops);
59 static struct mtd_partition h3xxx_partitions[] = {
61 .name = "H3XXX boot firmware",
64 .mask_flags = MTD_WRITEABLE, /* force read-only */
66 #ifdef CONFIG_MTD_2PARTS_IPAQ
67 .name = "H3XXX root jffs2",
68 .size = MTDPART_SIZ_FULL,
71 .name = "H3XXX kernel",
75 .name = "H3XXX params",
79 #ifdef CONFIG_JFFS2_FS
80 .name = "H3XXX root jffs2",
81 .size = MTDPART_SIZ_FULL,
84 .name = "H3XXX initrd",
88 .name = "H3XXX root cramfs",
92 .name = "H3XXX usr cramfs",
96 .name = "H3XXX usr local",
97 .size = MTDPART_SIZ_FULL,
104 static void h3xxx_set_vpp(int vpp)
106 assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, vpp);
109 static struct flash_platform_data h3xxx_flash_data = {
110 .map_name = "cfi_probe",
111 .set_vpp = h3xxx_set_vpp,
112 .parts = h3xxx_partitions,
113 .nr_parts = ARRAY_SIZE(h3xxx_partitions),
116 static struct resource h3xxx_flash_resource = {
117 .start = SA1100_CS0_PHYS,
118 .end = SA1100_CS0_PHYS + SZ_32M - 1,
119 .flags = IORESOURCE_MEM,
123 * This turns the IRDA power on or off on the Compaq H3600
125 static int h3600_irda_set_power(struct device *dev, unsigned int state)
127 assign_h3600_egpio( IPAQ_EGPIO_IR_ON, state );
132 static void h3600_irda_set_speed(struct device *dev, unsigned int speed)
134 if (speed < 4000000) {
135 clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL);
137 set_h3600_egpio(IPAQ_EGPIO_IR_FSEL);
141 static struct irda_platform_data h3600_irda_data = {
142 .set_power = h3600_irda_set_power,
143 .set_speed = h3600_irda_set_speed,
146 static void h3xxx_mach_init(void)
148 sa11x0_set_flash_data(&h3xxx_flash_data, &h3xxx_flash_resource, 1);
149 sa11x0_set_irda_data(&h3600_irda_data);
153 * low-level UART features
156 static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl)
158 if (port->mapbase == _Ser3UTCR0) {
159 if (mctrl & TIOCM_RTS)
160 GPCR = GPIO_H3600_COM_RTS;
162 GPSR = GPIO_H3600_COM_RTS;
166 static u_int h3600_uart_get_mctrl(struct uart_port *port)
168 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
170 if (port->mapbase == _Ser3UTCR0) {
172 /* DCD and CTS bits are inverted in GPLR by RS232 transceiver */
173 if (gplr & GPIO_H3600_COM_DCD)
175 if (gplr & GPIO_H3600_COM_CTS)
182 static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
184 if (port->mapbase == _Ser2UTCR0) { /* TODO: REMOVE THIS */
185 assign_h3600_egpio(IPAQ_EGPIO_IR_ON, !state);
186 } else if (port->mapbase == _Ser3UTCR0) {
187 assign_h3600_egpio(IPAQ_EGPIO_RS232_ON, !state);
192 * Enable/Disable wake up events for this serial port.
193 * Obviously, we only support this on the normal COM port.
195 static int h3600_uart_set_wake(struct uart_port *port, u_int enable)
199 if (port->mapbase == _Ser3UTCR0) {
201 PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */
203 PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */
209 static struct sa1100_port_fns h3600_port_fns __initdata = {
210 .set_mctrl = h3600_uart_set_mctrl,
211 .get_mctrl = h3600_uart_get_mctrl,
213 .set_wake = h3600_uart_set_wake,
217 * helper for sa1100fb
219 static void h3xxx_lcd_power(int enable)
221 assign_h3600_egpio(IPAQ_EGPIO_LCD_POWER, enable);
224 static struct map_desc h3600_io_desc[] __initdata = {
225 { /* static memory bank 2 CS#2 */
226 .virtual = H3600_BANK_2_VIRT,
227 .pfn = __phys_to_pfn(SA1100_CS2_PHYS),
228 .length = 0x02800000,
230 }, { /* static memory bank 4 CS#4 */
231 .virtual = H3600_BANK_4_VIRT,
232 .pfn = __phys_to_pfn(SA1100_CS4_PHYS),
233 .length = 0x00800000,
235 }, { /* EGPIO 0 CS#5 */
236 .virtual = H3600_EGPIO_VIRT,
237 .pfn = __phys_to_pfn(H3600_EGPIO_PHYS),
238 .length = 0x01000000,
244 * Common map_io initialization
247 static void __init h3xxx_map_io(void)
250 iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc));
252 sa1100_register_uart_fns(&h3600_port_fns);
253 sa1100_register_uart(0, 3); /* Common serial port */
254 // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */
256 /* Ensure those pins are outputs and driving low */
257 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
258 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
260 /* Configure suspend conditions */
262 PWER = PWER_GPIO0 | PWER_RTC;
266 sa1100fb_lcd_power = h3xxx_lcd_power;
269 static __inline__ void do_blank(int setp)
271 if (ipaq_model_ops.blank_callback)
272 ipaq_model_ops.blank_callback(1-setp);
275 /************************* H3100 *************************/
277 #ifdef CONFIG_SA1100_H3100
279 #define H3100_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT)
280 static unsigned int h3100_egpio = 0;
282 static void h3100_control_egpio(enum ipaq_egpio_type x, int setp)
284 unsigned int egpio = 0;
289 case IPAQ_EGPIO_LCD_POWER:
290 egpio |= EGPIO_H3600_LCD_ON;
291 gpio |= GPIO_H3100_LCD_3V_ON;
294 case IPAQ_EGPIO_LCD_ENABLE:
296 case IPAQ_EGPIO_CODEC_NRESET:
297 egpio |= EGPIO_H3600_CODEC_NRESET;
299 case IPAQ_EGPIO_AUDIO_ON:
300 gpio |= GPIO_H3100_AUD_PWR_ON
303 case IPAQ_EGPIO_QMUTE:
304 gpio |= GPIO_H3100_QMUTE;
306 case IPAQ_EGPIO_OPT_NVRAM_ON:
307 egpio |= EGPIO_H3600_OPT_NVRAM_ON;
309 case IPAQ_EGPIO_OPT_ON:
310 egpio |= EGPIO_H3600_OPT_ON;
312 case IPAQ_EGPIO_CARD_RESET:
313 egpio |= EGPIO_H3600_CARD_RESET;
315 case IPAQ_EGPIO_OPT_RESET:
316 egpio |= EGPIO_H3600_OPT_RESET;
318 case IPAQ_EGPIO_IR_ON:
319 gpio |= GPIO_H3100_IR_ON;
321 case IPAQ_EGPIO_IR_FSEL:
322 gpio |= GPIO_H3100_IR_FSEL;
324 case IPAQ_EGPIO_RS232_ON:
325 egpio |= EGPIO_H3600_RS232_ON;
327 case IPAQ_EGPIO_VPP_ON:
328 egpio |= EGPIO_H3600_VPP_ON;
333 local_irq_save(flags);
335 h3100_egpio |= egpio;
338 h3100_egpio &= ~egpio;
341 H3100_EGPIO = h3100_egpio;
342 local_irq_restore(flags);
346 static unsigned long h3100_read_egpio(void)
351 static int h3100_pm_callback(int req)
353 if (ipaq_model_ops.pm_callback_aux)
354 return ipaq_model_ops.pm_callback_aux(req);
358 static struct ipaq_model_ops h3100_model_ops __initdata = {
359 .generic_name = "3100",
360 .control = h3100_control_egpio,
361 .read = h3100_read_egpio,
362 .pm_callback = h3100_pm_callback
365 #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \
368 | GPIO_H3100_LCD_3V_ON \
369 | GPIO_H3100_AUD_ON \
370 | GPIO_H3100_AUD_PWR_ON \
372 | GPIO_H3100_IR_FSEL)
374 static void __init h3100_map_io(void)
378 /* Initialize h3100-specific values here */
379 GPCR = 0x0fffffff; /* All outputs are set low by default */
380 GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
381 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
382 GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
385 /* Older bootldrs put GPIO2-9 in alternate mode on the
386 assumption that they are used for video */
387 GAFR &= ~H3100_DIRECT_EGPIO;
389 H3100_EGPIO = h3100_egpio;
390 ipaq_model_ops = h3100_model_ops;
393 MACHINE_START(H3100, "Compaq iPAQ H3100")
394 .phys_io = 0x80000000,
395 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
396 .boot_params = 0xc0000100,
397 .map_io = h3100_map_io,
398 .init_irq = sa1100_init_irq,
399 .timer = &sa1100_timer,
400 .init_machine = h3xxx_mach_init,
403 #endif /* CONFIG_SA1100_H3100 */
405 /************************* H3600 *************************/
407 #ifdef CONFIG_SA1100_H3600
409 #define H3600_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT)
410 static unsigned int h3600_egpio = EGPIO_H3600_RS232_ON;
412 static void h3600_control_egpio(enum ipaq_egpio_type x, int setp)
414 unsigned int egpio = 0;
418 case IPAQ_EGPIO_LCD_POWER:
419 egpio |= EGPIO_H3600_LCD_ON |
420 EGPIO_H3600_LCD_PCI |
421 EGPIO_H3600_LCD_5V_ON |
425 case IPAQ_EGPIO_LCD_ENABLE:
427 case IPAQ_EGPIO_CODEC_NRESET:
428 egpio |= EGPIO_H3600_CODEC_NRESET;
430 case IPAQ_EGPIO_AUDIO_ON:
431 egpio |= EGPIO_H3600_AUD_AMP_ON |
432 EGPIO_H3600_AUD_PWR_ON;
434 case IPAQ_EGPIO_QMUTE:
435 egpio |= EGPIO_H3600_QMUTE;
437 case IPAQ_EGPIO_OPT_NVRAM_ON:
438 egpio |= EGPIO_H3600_OPT_NVRAM_ON;
440 case IPAQ_EGPIO_OPT_ON:
441 egpio |= EGPIO_H3600_OPT_ON;
443 case IPAQ_EGPIO_CARD_RESET:
444 egpio |= EGPIO_H3600_CARD_RESET;
446 case IPAQ_EGPIO_OPT_RESET:
447 egpio |= EGPIO_H3600_OPT_RESET;
449 case IPAQ_EGPIO_IR_ON:
450 egpio |= EGPIO_H3600_IR_ON;
452 case IPAQ_EGPIO_IR_FSEL:
453 egpio |= EGPIO_H3600_IR_FSEL;
455 case IPAQ_EGPIO_RS232_ON:
456 egpio |= EGPIO_H3600_RS232_ON;
458 case IPAQ_EGPIO_VPP_ON:
459 egpio |= EGPIO_H3600_VPP_ON;
464 local_irq_save(flags);
466 h3600_egpio |= egpio;
468 h3600_egpio &= ~egpio;
469 H3600_EGPIO = h3600_egpio;
470 local_irq_restore(flags);
474 static unsigned long h3600_read_egpio(void)
479 static int h3600_pm_callback(int req)
481 if (ipaq_model_ops.pm_callback_aux)
482 return ipaq_model_ops.pm_callback_aux(req);
486 static struct ipaq_model_ops h3600_model_ops __initdata = {
487 .generic_name = "3600",
488 .control = h3600_control_egpio,
489 .read = h3600_read_egpio,
490 .pm_callback = h3600_pm_callback
493 static void __init h3600_map_io(void)
497 /* Initialize h3600-specific values here */
499 GPCR = 0x0fffffff; /* All outputs are set low by default */
500 GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
501 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
502 GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
503 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
504 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
506 H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */
507 ipaq_model_ops = h3600_model_ops;
510 MACHINE_START(H3600, "Compaq iPAQ H3600")
511 .phys_io = 0x80000000,
512 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
513 .boot_params = 0xc0000100,
514 .map_io = h3600_map_io,
515 .init_irq = sa1100_init_irq,
516 .timer = &sa1100_timer,
517 .init_machine = h3xxx_mach_init,
520 #endif /* CONFIG_SA1100_H3600 */
522 #ifdef CONFIG_SA1100_H3800
524 #define SET_ASIC1(x) \
525 do {if (setp) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0)
527 #define SET_ASIC2(x) \
528 do {if (setp) { H3800_ASIC2_GPIOPIOD |= (x); } else { H3800_ASIC2_GPIOPIOD &= ~(x); }} while(0)
530 #define CLEAR_ASIC1(x) \
531 do {if (setp) { H3800_ASIC1_GPIO_OUT &= ~(x); } else { H3800_ASIC1_GPIO_OUT |= (x); }} while(0)
533 #define CLEAR_ASIC2(x) \
534 do {if (setp) { H3800_ASIC2_GPIOPIOD &= ~(x); } else { H3800_ASIC2_GPIOPIOD |= (x); }} while(0)
538 On screen enable, we get
540 h3800_video_power_on(1)
541 LCD controller starts
542 h3800_video_lcd_enable(1)
544 On screen disable, we get
546 h3800_video_lcd_enable(0)
548 h3800_video_power_on(0)
552 static void h3800_video_power_on(int setp)
555 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_ON;
557 H3800_ASIC1_GPIO_OUT |= GPIO1_VGL_ON;
559 H3800_ASIC1_GPIO_OUT |= GPIO1_VGH_ON;
561 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_5V_ON;
565 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_5V_ON;
567 H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGL_ON;
569 H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGH_ON;
571 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_ON;
575 static void h3800_video_lcd_enable(int setp)
578 msleep(17); // Wait one from before turning on
579 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_PCI;
581 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_PCI;
582 msleep(30); // Wait before turning off
587 static void h3800_control_egpio(enum ipaq_egpio_type x, int setp)
590 case IPAQ_EGPIO_LCD_POWER:
591 h3800_video_power_on(setp);
593 case IPAQ_EGPIO_LCD_ENABLE:
594 h3800_video_lcd_enable(setp);
596 case IPAQ_EGPIO_CODEC_NRESET:
597 case IPAQ_EGPIO_AUDIO_ON:
598 case IPAQ_EGPIO_QMUTE:
599 printk("%s: error - should not be called\n", __func__);
601 case IPAQ_EGPIO_OPT_NVRAM_ON:
602 SET_ASIC2(GPIO2_OPT_ON_NVRAM);
604 case IPAQ_EGPIO_OPT_ON:
605 SET_ASIC2(GPIO2_OPT_ON);
607 case IPAQ_EGPIO_CARD_RESET:
608 SET_ASIC2(GPIO2_OPT_PCM_RESET);
610 case IPAQ_EGPIO_OPT_RESET:
611 SET_ASIC2(GPIO2_OPT_RESET);
613 case IPAQ_EGPIO_IR_ON:
614 CLEAR_ASIC1(GPIO1_IR_ON_N);
616 case IPAQ_EGPIO_IR_FSEL:
618 case IPAQ_EGPIO_RS232_ON:
619 SET_ASIC1(GPIO1_RS232_ON);
621 case IPAQ_EGPIO_VPP_ON:
622 H3800_ASIC2_FlashWP_VPP_ON = setp;
627 static unsigned long h3800_read_egpio(void)
629 return H3800_ASIC1_GPIO_OUT | (H3800_ASIC2_GPIOPIOD << 16);
632 /* We need to fix ASIC2 GPIO over suspend/resume. At the moment,
633 it doesn't appear that ASIC1 GPIO has the same problem */
635 static int h3800_pm_callback(int req)
637 static u16 asic1_data;
638 static u16 asic2_data;
641 printk("%s %d\n", __func__, req);
645 MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; /* Set MSC2 correctly */
647 H3800_ASIC2_GPIOPIOD = asic2_data;
648 H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ
654 H3800_ASIC1_GPIO_OUT = asic1_data;
656 if (ipaq_model_ops.pm_callback_aux)
657 result = ipaq_model_ops.pm_callback_aux(req);
661 if (ipaq_model_ops.pm_callback_aux &&
662 ((result = ipaq_model_ops.pm_callback_aux(req)) != 0))
665 asic1_data = H3800_ASIC1_GPIO_OUT;
666 asic2_data = H3800_ASIC2_GPIOPIOD;
669 printk("%s: unrecognized PM callback\n", __func__);
675 static struct ipaq_model_ops h3800_model_ops __initdata = {
676 .generic_name = "3800",
677 .control = h3800_control_egpio,
678 .read = h3800_read_egpio,
679 .pm_callback = h3800_pm_callback
682 #define MAX_ASIC_ISR_LOOPS 20
684 /* The order of these is important - see #include <mach/irqs.h> */
685 static u32 kpio_irq_mask[] = {
697 static u32 gpio_irq_mask[] = {
705 static void h3800_IRQ_demux(unsigned int irq, struct irq_desc *desc)
709 if (0) printk("%s: interrupt received\n", __func__);
711 desc->chip->ack(irq);
713 for (i = 0; i < MAX_ASIC_ISR_LOOPS && (GPLR & GPIO_H3800_ASIC); i++) {
718 irq = H3800_ASIC2_KPIINTFLAG;
719 if (0) printk("%s KPIO 0x%08X\n", __func__, irq);
720 for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
721 if (irq & kpio_irq_mask[j])
722 handle_edge_irq(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
725 irq = H3800_ASIC2_GPIINTFLAG;
726 if (0) printk("%s GPIO 0x%08X\n", __func__, irq);
727 for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
728 if (irq & gpio_irq_mask[j])
729 handle_edge_irq(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
732 if (i >= MAX_ASIC_ISR_LOOPS)
733 printk("%s: interrupt processing overrun\n", __func__);
735 /* For level-based interrupts */
736 desc->chip->unmask(irq);
740 static struct irqaction h3800_irq = {
741 .name = "h3800_asic",
742 .handler = h3800_IRQ_demux,
743 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
746 u32 kpio_int_shadow = 0;
749 /* mask_ack <- IRQ is first serviced.
750 mask <- IRQ is disabled.
751 unmask <- IRQ is enabled
753 The INTCLR registers are poorly documented. I believe that writing
754 a "1" to the register clears the specific interrupt, but the documentation
755 indicates writing a "0" clears the interrupt. In any case, they shouldn't
756 be read (that's the INTFLAG register)
759 static void h3800_mask_ack_kpio_irq(unsigned int irq)
761 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
762 kpio_int_shadow &= ~mask;
763 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
764 H3800_ASIC2_KPIINTCLR = mask;
767 static void h3800_mask_kpio_irq(unsigned int irq)
769 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
770 kpio_int_shadow &= ~mask;
771 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
774 static void h3800_unmask_kpio_irq(unsigned int irq)
776 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
777 kpio_int_shadow |= mask;
778 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
781 static void h3800_mask_ack_gpio_irq(unsigned int irq)
783 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
784 H3800_ASIC2_GPIINTSTAT &= ~mask;
785 H3800_ASIC2_GPIINTCLR = mask;
788 static void h3800_mask_gpio_irq(unsigned int irq)
790 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
791 H3800_ASIC2_GPIINTSTAT &= ~mask;
794 static void h3800_unmask_gpio_irq(unsigned int irq)
796 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
797 H3800_ASIC2_GPIINTSTAT |= mask;
800 static void __init h3800_init_irq(void)
804 /* Initialize standard IRQs */
807 /* Disable all IRQs and set up clock */
808 H3800_ASIC2_KPIINTSTAT = 0; /* Disable all interrupts */
809 H3800_ASIC2_GPIINTSTAT = 0;
811 H3800_ASIC2_KPIINTCLR = 0; /* Clear all KPIO interrupts */
812 H3800_ASIC2_GPIINTCLR = 0; /* Clear all GPIO interrupts */
814 // H3800_ASIC2_KPIINTCLR = 0xffff; /* Clear all KPIO interrupts */
815 // H3800_ASIC2_GPIINTCLR = 0xffff; /* Clear all GPIO interrupts */
817 H3800_ASIC2_CLOCK_Enable |= ASIC2_CLOCK_EX0; /* 32 kHZ crystal on */
818 H3800_ASIC2_INTR_ClockPrescale |= ASIC2_INTCPS_SET;
819 H3800_ASIC2_INTR_ClockPrescale = ASIC2_INTCPS_CPS(0x0e) | ASIC2_INTCPS_SET;
820 H3800_ASIC2_INTR_TimerSet = 1;
823 for (i = 0; i < H3800_KPIO_IRQ_COUNT; i++) {
824 int irq = i + H3800_KPIO_IRQ_START;
825 irq_desc[irq].valid = 1;
826 irq_desc[irq].probe_ok = 1;
827 set_irq_chip(irq, &h3800_kpio_irqchip);
830 for (i = 0; i < H3800_GPIO_IRQ_COUNT; i++) {
831 int irq = i + H3800_GPIO_IRQ_START;
832 irq_desc[irq].valid = 1;
833 irq_desc[irq].probe_ok = 1;
834 set_irq_chip(irq, &h3800_gpio_irqchip);
837 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQ_TYPE_EDGE_RISING);
838 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux);
842 #define ASIC1_OUTPUTS 0x7fff /* First 15 bits are used */
844 static void __init h3800_map_io(void)
848 /* Add wakeup on AC plug/unplug */
851 /* Initialize h3800-specific values here */
852 GPCR = 0x0fffffff; /* All outputs are set low by default */
853 GAFR = GPIO_H3800_CLK_OUT |
854 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
855 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
856 GPDR = GPIO_H3800_CLK_OUT |
857 GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
858 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
859 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
860 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
861 TUCR = TUCR_3_6864MHz; /* Seems to be used only for the Bluetooth UART */
863 /* Fix the memory bus */
864 MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000;
867 H3800_ASIC1_GPIO_DIR = ASIC1_OUTPUTS; /* All outputs */
868 H3800_ASIC1_GPIO_MASK = ASIC1_OUTPUTS; /* No interrupts */
869 H3800_ASIC1_GPIO_SLEEP_MASK = ASIC1_OUTPUTS;
870 H3800_ASIC1_GPIO_SLEEP_DIR = ASIC1_OUTPUTS;
871 H3800_ASIC1_GPIO_SLEEP_OUT = GPIO1_EAR_ON_N;
872 H3800_ASIC1_GPIO_BATT_FAULT_DIR = ASIC1_OUTPUTS;
873 H3800_ASIC1_GPIO_BATT_FAULT_OUT = GPIO1_EAR_ON_N;
875 H3800_ASIC1_GPIO_OUT = GPIO1_IR_ON_N
880 H3800_ASIC2_GPIOPIOD = GPIO2_IN_Y1_N | GPIO2_IN_X1_N;
881 H3800_ASIC2_GPOBFSTAT = GPIO2_IN_Y1_N | GPIO2_IN_X1_N;
883 H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ
889 /* TODO : Set sleep states & battery fault states */
891 /* Clear VPP Enable */
892 H3800_ASIC2_FlashWP_VPP_ON = 0;
893 ipaq_model_ops = h3800_model_ops;
896 MACHINE_START(H3800, "Compaq iPAQ H3800")
897 .phys_io = 0x80000000,
898 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
899 .boot_params = 0xc0000100,
900 .map_io = h3800_map_io,
901 .init_irq = h3800_init_irq,
902 .timer = &sa1100_timer,
903 .init_machine = h3xxx_mach_init,
906 #endif /* CONFIG_SA1100_H3800 */