git.oblomov.eu Git - linux-2.6/blob - sound/pci/oxygen/oxygen_pcm.c

   1 /*
   2  * C-Media CMI8788 driver - PCM code
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <sound/driver.h>
  21 #include <linux/pci.h>
  22 #include <sound/control.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include "oxygen.h"
  27
  28 static struct snd_pcm_hardware oxygen_hardware[PCM_COUNT] = {
  29         [PCM_A] = {
  30                 .info = SNDRV_PCM_INFO_MMAP |
  31                         SNDRV_PCM_INFO_MMAP_VALID |
  32                         SNDRV_PCM_INFO_INTERLEAVED |
  33                         SNDRV_PCM_INFO_PAUSE |
  34                         SNDRV_PCM_INFO_SYNC_START,
  35                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  36                            SNDRV_PCM_FMTBIT_S32_LE,
  37                 .rates = SNDRV_PCM_RATE_44100 |
  38                          SNDRV_PCM_RATE_48000 |
  39                          SNDRV_PCM_RATE_96000 |
  40                          SNDRV_PCM_RATE_192000,
  41                 .rate_min = 44100,
  42                 .rate_max = 192000,
  43                 .channels_min = 2,
  44                 .channels_max = 2,
  45                 .buffer_bytes_max = 256 * 1024,
  46                 .period_bytes_min = 128,
  47                 .period_bytes_max = 128 * 1024,
  48                 .periods_min = 2,
  49                 .periods_max = 2048,
  50         },
  51         [PCM_B] = {
  52                 .info = SNDRV_PCM_INFO_MMAP |
  53                         SNDRV_PCM_INFO_MMAP_VALID |
  54                         SNDRV_PCM_INFO_INTERLEAVED |
  55                         SNDRV_PCM_INFO_PAUSE |
  56                         SNDRV_PCM_INFO_SYNC_START,
  57                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  58                            SNDRV_PCM_FMTBIT_S32_LE,
  59                 .rates = SNDRV_PCM_RATE_32000 |
  60                          SNDRV_PCM_RATE_44100 |
  61                          SNDRV_PCM_RATE_48000 |
  62                          SNDRV_PCM_RATE_64000 |
  63                          SNDRV_PCM_RATE_88200 |
  64                          SNDRV_PCM_RATE_96000 |
  65                          SNDRV_PCM_RATE_176400 |
  66                          SNDRV_PCM_RATE_192000,
  67                 .rate_min = 32000,
  68                 .rate_max = 192000,
  69                 .channels_min = 2,
  70                 .channels_max = 2,
  71                 .buffer_bytes_max = 256 * 1024,
  72                 .period_bytes_min = 128,
  73                 .period_bytes_max = 128 * 1024,
  74                 .periods_min = 2,
  75                 .periods_max = 2048,
  76         },
  77         [PCM_C] = {
  78                 .info = SNDRV_PCM_INFO_MMAP |
  79                         SNDRV_PCM_INFO_MMAP_VALID |
  80                         SNDRV_PCM_INFO_INTERLEAVED |
  81                         SNDRV_PCM_INFO_PAUSE |
  82                         SNDRV_PCM_INFO_SYNC_START,
  83                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  84                            SNDRV_PCM_FMTBIT_S32_LE,
  85                 .rates = SNDRV_PCM_RATE_44100 |
  86                          SNDRV_PCM_RATE_48000 |
  87                          SNDRV_PCM_RATE_88200 |
  88                          SNDRV_PCM_RATE_96000,
  89                 .rate_min = 44100,
  90                 .rate_max = 96000,
  91                 .channels_min = 2,
  92                 .channels_max = 2,
  93                 .buffer_bytes_max = 256 * 1024,
  94                 .period_bytes_min = 128,
  95                 .period_bytes_max = 128 * 1024,
  96                 .periods_min = 2,
  97                 .periods_max = 2048,
  98         },
  99         [PCM_SPDIF] = {
 100                 .info = SNDRV_PCM_INFO_MMAP |
 101                         SNDRV_PCM_INFO_MMAP_VALID |
 102                         SNDRV_PCM_INFO_INTERLEAVED |
 103                         SNDRV_PCM_INFO_PAUSE |
 104                         SNDRV_PCM_INFO_SYNC_START,
 105                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 106                            SNDRV_PCM_FMTBIT_S32_LE,
 107                 .rates = SNDRV_PCM_RATE_32000 |
 108                          SNDRV_PCM_RATE_44100 |
 109                          SNDRV_PCM_RATE_48000 |
 110                          SNDRV_PCM_RATE_64000 |
 111                          SNDRV_PCM_RATE_88200 |
 112                          SNDRV_PCM_RATE_96000 |
 113                          SNDRV_PCM_RATE_176400 |
 114                          SNDRV_PCM_RATE_192000,
 115                 .rate_min = 32000,
 116                 .rate_max = 192000,
 117                 .channels_min = 2,
 118                 .channels_max = 2,
 119                 .buffer_bytes_max = 256 * 1024,
 120                 .period_bytes_min = 128,
 121                 .period_bytes_max = 128 * 1024,
 122                 .periods_min = 2,
 123                 .periods_max = 2048,
 124         },
 125         [PCM_MULTICH] = {
 126                 .info = SNDRV_PCM_INFO_MMAP |
 127                         SNDRV_PCM_INFO_MMAP_VALID |
 128                         SNDRV_PCM_INFO_INTERLEAVED |
 129                         SNDRV_PCM_INFO_PAUSE |
 130                         SNDRV_PCM_INFO_SYNC_START,
 131                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 132                            SNDRV_PCM_FMTBIT_S32_LE,
 133                 .rates = SNDRV_PCM_RATE_32000 |
 134                          SNDRV_PCM_RATE_44100 |
 135                          SNDRV_PCM_RATE_48000 |
 136                          SNDRV_PCM_RATE_64000 |
 137                          SNDRV_PCM_RATE_88200 |
 138                          SNDRV_PCM_RATE_96000 |
 139                          SNDRV_PCM_RATE_176400 |
 140                          SNDRV_PCM_RATE_192000,
 141                 .rate_min = 32000,
 142                 .rate_max = 192000,
 143                 .channels_min = 2,
 144                 .channels_max = 8,
 145                 .buffer_bytes_max = 2048 * 1024,
 146                 .period_bytes_min = 128,
 147                 .period_bytes_max = 256 * 1024,
 148                 .periods_min = 2,
 149                 .periods_max = 16384,
 150         },
 151         [PCM_AC97] = {
 152                 .info = SNDRV_PCM_INFO_MMAP |
 153                         SNDRV_PCM_INFO_MMAP_VALID |
 154                         SNDRV_PCM_INFO_INTERLEAVED |
 155                         SNDRV_PCM_INFO_PAUSE |
 156                         SNDRV_PCM_INFO_SYNC_START,
 157                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 158                 .rates = SNDRV_PCM_RATE_48000,
 159                 .rate_min = 48000,
 160                 .rate_max = 48000,
 161                 .channels_min = 2,
 162                 .channels_max = 2,
 163                 .buffer_bytes_max = 256 * 1024,
 164                 .period_bytes_min = 128,
 165                 .period_bytes_max = 128 * 1024,
 166                 .periods_min = 2,
 167                 .periods_max = 2048,
 168         },
 169 };
 170
 171 static int oxygen_open(struct snd_pcm_substream *substream,
 172                        unsigned int channel)
 173 {
 174         struct oxygen *chip = snd_pcm_substream_chip(substream);
 175         struct snd_pcm_runtime *runtime = substream->runtime;
 176         int err;
 177
 178         runtime->private_data = (void *)channel;
 179         runtime->hw = oxygen_hardware[channel];
 180         err = snd_pcm_hw_constraint_step(runtime, 0,
 181                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
 182         if (err < 0)
 183                 return err;
 184         err = snd_pcm_hw_constraint_step(runtime, 0,
 185                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
 186         if (err < 0)
 187                 return err;
 188         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
 189                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 190                 if (err < 0)
 191                         return err;
 192         }
 193         if (runtime->hw.channels_max > 2) {
 194                 err = snd_pcm_hw_constraint_step(runtime, 0,
 195                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
 196                                                  2);
 197                 if (err < 0)
 198                         return err;
 199         }
 200         snd_pcm_set_sync(substream);
 201         chip->streams[channel] = substream;
 202
 203         mutex_lock(&chip->mutex);
 204         chip->pcm_active |= 1 << channel;
 205         if (channel == PCM_SPDIF) {
 206                 chip->spdif_pcm_bits = chip->spdif_bits;
 207                 chip->spdif_pcm_ctl->vd[0].access &=
 208                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 209                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 210                                SNDRV_CTL_EVENT_MASK_INFO,
 211                                &chip->spdif_pcm_ctl->id);
 212         }
 213         mutex_unlock(&chip->mutex);
 214
 215         return 0;
 216 }
 217
 218 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
 219 {
 220         return oxygen_open(substream, PCM_A);
 221 }
 222
 223 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
 224 {
 225         return oxygen_open(substream, PCM_B);
 226 }
 227
 228 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
 229 {
 230         return oxygen_open(substream, PCM_C);
 231 }
 232
 233 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
 234 {
 235         return oxygen_open(substream, PCM_SPDIF);
 236 }
 237
 238 static int oxygen_multich_open(struct snd_pcm_substream *substream)
 239 {
 240         return oxygen_open(substream, PCM_MULTICH);
 241 }
 242
 243 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
 244 {
 245         return oxygen_open(substream, PCM_AC97);
 246 }
 247
 248 static int oxygen_close(struct snd_pcm_substream *substream)
 249 {
 250         struct oxygen *chip = snd_pcm_substream_chip(substream);
 251         unsigned int channel = (unsigned int)substream->runtime->private_data;
 252
 253         mutex_lock(&chip->mutex);
 254         chip->pcm_active &= ~(1 << channel);
 255         if (channel == PCM_SPDIF) {
 256                 chip->spdif_pcm_ctl->vd[0].access |=
 257                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 258                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 259                                SNDRV_CTL_EVENT_MASK_INFO,
 260                                &chip->spdif_pcm_ctl->id);
 261         }
 262         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
 263                 oxygen_update_spdif_source(chip);
 264         mutex_unlock(&chip->mutex);
 265
 266         chip->streams[channel] = NULL;
 267         return 0;
 268 }
 269
 270 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
 271 {
 272         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 273                 return OXYGEN_FORMAT_24;
 274         else
 275                 return OXYGEN_FORMAT_16;
 276 }
 277
 278 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
 279 {
 280         switch (params_rate(hw_params)) {
 281         case 32000:
 282                 return OXYGEN_RATE_32000;
 283         case 44100:
 284                 return OXYGEN_RATE_44100;
 285         default: /* 48000 */
 286                 return OXYGEN_RATE_48000;
 287         case 64000:
 288                 return OXYGEN_RATE_64000;
 289         case 88200:
 290                 return OXYGEN_RATE_88200;
 291         case 96000:
 292                 return OXYGEN_RATE_96000;
 293         case 176400:
 294                 return OXYGEN_RATE_176400;
 295         case 192000:
 296                 return OXYGEN_RATE_192000;
 297         }
 298 }
 299
 300 static unsigned int oxygen_i2s_magic2(struct snd_pcm_hw_params *hw_params)
 301 {
 302         return params_rate(hw_params) <= 96000 ? 0x10 : 0x00;
 303 }
 304
 305 static unsigned int oxygen_i2s_format(struct snd_pcm_hw_params *hw_params)
 306 {
 307         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 308                 return OXYGEN_I2S_FORMAT_24;
 309         else
 310                 return OXYGEN_I2S_FORMAT_16;
 311 }
 312
 313 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
 314 {
 315         switch (params_channels(hw_params)) {
 316         default: /* 2 */
 317                 return OXYGEN_PLAY_CHANNELS_2;
 318         case 4:
 319                 return OXYGEN_PLAY_CHANNELS_4;
 320         case 6:
 321                 return OXYGEN_PLAY_CHANNELS_6;
 322         case 8:
 323                 return OXYGEN_PLAY_CHANNELS_8;
 324         }
 325 }
 326
 327 static const unsigned int channel_base_registers[PCM_COUNT] = {
 328         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
 329         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
 330         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
 331         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
 332         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
 333         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
 334 };
 335
 336 static int oxygen_hw_params(struct snd_pcm_substream *substream,
 337                             struct snd_pcm_hw_params *hw_params)
 338 {
 339         struct oxygen *chip = snd_pcm_substream_chip(substream);
 340         unsigned int channel = (unsigned int)substream->runtime->private_data;
 341         int err;
 342
 343         err = snd_pcm_lib_malloc_pages(substream,
 344                                        params_buffer_bytes(hw_params));
 345         if (err < 0)
 346                 return err;
 347
 348         oxygen_write32(chip, channel_base_registers[channel],
 349                        (u32)substream->runtime->dma_addr);
 350         if (channel == PCM_MULTICH) {
 351                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
 352                                params_buffer_bytes(hw_params) / 4 - 1);
 353                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
 354                                params_period_bytes(hw_params) / 4 - 1);
 355         } else {
 356                 oxygen_write16(chip, channel_base_registers[channel] + 4,
 357                                params_buffer_bytes(hw_params) / 4 - 1);
 358                 oxygen_write16(chip, channel_base_registers[channel] + 6,
 359                                params_period_bytes(hw_params) / 4 - 1);
 360         }
 361         return 0;
 362 }
 363
 364 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
 365                                   struct snd_pcm_hw_params *hw_params)
 366 {
 367         struct oxygen *chip = snd_pcm_substream_chip(substream);
 368         int err;
 369
 370         err = oxygen_hw_params(substream, hw_params);
 371         if (err < 0)
 372                 return err;
 373
 374         spin_lock_irq(&chip->reg_lock);
 375         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 376                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
 377                              OXYGEN_REC_FORMAT_A_MASK);
 378         oxygen_write8_masked(chip, OXYGEN_I2S_A_FORMAT,
 379                              oxygen_rate(hw_params) |
 380                              oxygen_i2s_magic2(hw_params) |
 381                              oxygen_i2s_format(hw_params),
 382                              OXYGEN_I2S_RATE_MASK |
 383                              OXYGEN_I2S_MAGIC2_MASK |
 384                              OXYGEN_I2S_FORMAT_MASK);
 385         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x08);
 386         spin_unlock_irq(&chip->reg_lock);
 387
 388         mutex_lock(&chip->mutex);
 389         chip->model->set_adc_params(chip, hw_params);
 390         mutex_unlock(&chip->mutex);
 391         return 0;
 392 }
 393
 394 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
 395                                   struct snd_pcm_hw_params *hw_params)
 396 {
 397         struct oxygen *chip = snd_pcm_substream_chip(substream);
 398         int err;
 399
 400         err = oxygen_hw_params(substream, hw_params);
 401         if (err < 0)
 402                 return err;
 403
 404         spin_lock_irq(&chip->reg_lock);
 405         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 406                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
 407                              OXYGEN_REC_FORMAT_B_MASK);
 408         oxygen_write8_masked(chip, OXYGEN_I2S_B_FORMAT,
 409                              oxygen_rate(hw_params) |
 410                              oxygen_i2s_magic2(hw_params) |
 411                              oxygen_i2s_format(hw_params),
 412                              OXYGEN_I2S_RATE_MASK |
 413                              OXYGEN_I2S_MAGIC2_MASK |
 414                              OXYGEN_I2S_FORMAT_MASK);
 415         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x10);
 416         spin_unlock_irq(&chip->reg_lock);
 417
 418         mutex_lock(&chip->mutex);
 419         chip->model->set_adc_params(chip, hw_params);
 420         mutex_unlock(&chip->mutex);
 421         return 0;
 422 }
 423
 424 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
 425                                   struct snd_pcm_hw_params *hw_params)
 426 {
 427         struct oxygen *chip = snd_pcm_substream_chip(substream);
 428         int err;
 429
 430         err = oxygen_hw_params(substream, hw_params);
 431         if (err < 0)
 432                 return err;
 433
 434         spin_lock_irq(&chip->reg_lock);
 435         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 436                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
 437                              OXYGEN_REC_FORMAT_C_MASK);
 438         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x20);
 439         spin_unlock_irq(&chip->reg_lock);
 440         return 0;
 441 }
 442
 443 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
 444                                   struct snd_pcm_hw_params *hw_params)
 445 {
 446         struct oxygen *chip = snd_pcm_substream_chip(substream);
 447         int err;
 448
 449         err = oxygen_hw_params(substream, hw_params);
 450         if (err < 0)
 451                 return err;
 452
 453         spin_lock_irq(&chip->reg_lock);
 454         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 455                             OXYGEN_SPDIF_OUT_ENABLE);
 456         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 457                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
 458                              OXYGEN_SPDIF_FORMAT_MASK);
 459         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 460                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
 461                               OXYGEN_SPDIF_OUT_RATE_MASK);
 462         oxygen_update_spdif_source(chip);
 463         spin_unlock_irq(&chip->reg_lock);
 464         return 0;
 465 }
 466
 467 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
 468                                     struct snd_pcm_hw_params *hw_params)
 469 {
 470         struct oxygen *chip = snd_pcm_substream_chip(substream);
 471         int err;
 472
 473         err = oxygen_hw_params(substream, hw_params);
 474         if (err < 0)
 475                 return err;
 476
 477         spin_lock_irq(&chip->reg_lock);
 478         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
 479                              oxygen_play_channels(hw_params),
 480                              OXYGEN_PLAY_CHANNELS_MASK);
 481         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 482                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
 483                              OXYGEN_MULTICH_FORMAT_MASK);
 484         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
 485                               oxygen_rate(hw_params) | oxygen_i2s_format(hw_params),
 486                               OXYGEN_I2S_RATE_MASK | OXYGEN_I2S_FORMAT_MASK);
 487         oxygen_clear_bits16(chip, OXYGEN_PLAY_ROUTING, 0x001f);
 488         oxygen_update_dac_routing(chip);
 489         oxygen_update_spdif_source(chip);
 490         spin_unlock_irq(&chip->reg_lock);
 491
 492         mutex_lock(&chip->mutex);
 493         chip->model->set_dac_params(chip, hw_params);
 494         mutex_unlock(&chip->mutex);
 495         return 0;
 496 }
 497
 498 static int oxygen_ac97_hw_params(struct snd_pcm_substream *substream,
 499                                  struct snd_pcm_hw_params *hw_params)
 500 {
 501         struct oxygen *chip = snd_pcm_substream_chip(substream);
 502         int err;
 503
 504         err = oxygen_hw_params(substream, hw_params);
 505         if (err < 0)
 506                 return err;
 507
 508         spin_lock_irq(&chip->reg_lock);
 509         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 510                              oxygen_format(hw_params) << OXYGEN_AC97_FORMAT_SHIFT,
 511                              OXYGEN_AC97_FORMAT_MASK);
 512         spin_unlock_irq(&chip->reg_lock);
 513         return 0;
 514 }
 515
 516 static int oxygen_hw_free(struct snd_pcm_substream *substream)
 517 {
 518         struct oxygen *chip = snd_pcm_substream_chip(substream);
 519         unsigned int channel = (unsigned int)substream->runtime->private_data;
 520
 521         spin_lock_irq(&chip->reg_lock);
 522         chip->interrupt_mask &= ~(1 << channel);
 523         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 524         spin_unlock_irq(&chip->reg_lock);
 525
 526         return snd_pcm_lib_free_pages(substream);
 527 }
 528
 529 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
 530 {
 531         struct oxygen *chip = snd_pcm_substream_chip(substream);
 532
 533         spin_lock_irq(&chip->reg_lock);
 534         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 535                             OXYGEN_SPDIF_OUT_ENABLE);
 536         spin_unlock_irq(&chip->reg_lock);
 537         return oxygen_hw_free(substream);
 538 }
 539
 540 static int oxygen_prepare(struct snd_pcm_substream *substream)
 541 {
 542         struct oxygen *chip = snd_pcm_substream_chip(substream);
 543         unsigned int channel = (unsigned int)substream->runtime->private_data;
 544         unsigned int channel_mask = 1 << channel;
 545
 546         spin_lock_irq(&chip->reg_lock);
 547         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 548         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 549
 550         chip->interrupt_mask |= channel_mask;
 551         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 552         spin_unlock_irq(&chip->reg_lock);
 553         return 0;
 554 }
 555
 556 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
 557 {
 558         struct oxygen *chip = snd_pcm_substream_chip(substream);
 559         struct snd_pcm_substream *s;
 560         unsigned int mask = 0;
 561         int running;
 562
 563         switch (cmd) {
 564         case SNDRV_PCM_TRIGGER_STOP:
 565         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 566                 running = 0;
 567                 break;
 568         case SNDRV_PCM_TRIGGER_START:
 569         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 570                 running = 1;
 571                 break;
 572         default:
 573                 return -EINVAL;
 574         }
 575
 576         snd_pcm_group_for_each_entry(s, substream) {
 577                 if (snd_pcm_substream_chip(s) == chip) {
 578                         mask |= 1 << (unsigned int)s->runtime->private_data;
 579                         snd_pcm_trigger_done(s, substream);
 580                 }
 581         }
 582
 583         spin_lock(&chip->reg_lock);
 584         if (running)
 585                 chip->pcm_running |= mask;
 586         else
 587                 chip->pcm_running &= ~mask;
 588         oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
 589         spin_unlock(&chip->reg_lock);
 590         return 0;
 591 }
 592
 593 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
 594 {
 595         struct oxygen *chip = snd_pcm_substream_chip(substream);
 596         struct snd_pcm_runtime *runtime = substream->runtime;
 597         unsigned int channel = (unsigned int)runtime->private_data;
 598         u32 curr_addr;
 599
 600         /* no spinlock, this read should be atomic */
 601         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
 602         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
 603 }
 604
 605 static struct snd_pcm_ops oxygen_rec_a_ops = {
 606         .open      = oxygen_rec_a_open,
 607         .close     = oxygen_close,
 608         .ioctl     = snd_pcm_lib_ioctl,
 609         .hw_params = oxygen_rec_a_hw_params,
 610         .hw_free   = oxygen_hw_free,
 611         .prepare   = oxygen_prepare,
 612         .trigger   = oxygen_trigger,
 613         .pointer   = oxygen_pointer,
 614 };
 615
 616 static struct snd_pcm_ops oxygen_rec_b_ops = {
 617         .open      = oxygen_rec_b_open,
 618         .close     = oxygen_close,
 619         .ioctl     = snd_pcm_lib_ioctl,
 620         .hw_params = oxygen_rec_b_hw_params,
 621         .hw_free   = oxygen_hw_free,
 622         .prepare   = oxygen_prepare,
 623         .trigger   = oxygen_trigger,
 624         .pointer   = oxygen_pointer,
 625 };
 626
 627 static struct snd_pcm_ops oxygen_rec_c_ops = {
 628         .open      = oxygen_rec_c_open,
 629         .close     = oxygen_close,
 630         .ioctl     = snd_pcm_lib_ioctl,
 631         .hw_params = oxygen_rec_c_hw_params,
 632         .hw_free   = oxygen_hw_free,
 633         .prepare   = oxygen_prepare,
 634         .trigger   = oxygen_trigger,
 635         .pointer   = oxygen_pointer,
 636 };
 637
 638 static struct snd_pcm_ops oxygen_spdif_ops = {
 639         .open      = oxygen_spdif_open,
 640         .close     = oxygen_close,
 641         .ioctl     = snd_pcm_lib_ioctl,
 642         .hw_params = oxygen_spdif_hw_params,
 643         .hw_free   = oxygen_spdif_hw_free,
 644         .prepare   = oxygen_prepare,
 645         .trigger   = oxygen_trigger,
 646         .pointer   = oxygen_pointer,
 647 };
 648
 649 static struct snd_pcm_ops oxygen_multich_ops = {
 650         .open      = oxygen_multich_open,
 651         .close     = oxygen_close,
 652         .ioctl     = snd_pcm_lib_ioctl,
 653         .hw_params = oxygen_multich_hw_params,
 654         .hw_free   = oxygen_hw_free,
 655         .prepare   = oxygen_prepare,
 656         .trigger   = oxygen_trigger,
 657         .pointer   = oxygen_pointer,
 658 };
 659
 660 static struct snd_pcm_ops oxygen_ac97_ops = {
 661         .open      = oxygen_ac97_open,
 662         .close     = oxygen_close,
 663         .ioctl     = snd_pcm_lib_ioctl,
 664         .hw_params = oxygen_ac97_hw_params,
 665         .hw_free   = oxygen_hw_free,
 666         .prepare   = oxygen_prepare,
 667         .trigger   = oxygen_trigger,
 668         .pointer   = oxygen_pointer,
 669 };
 670
 671 static void oxygen_pcm_free(struct snd_pcm *pcm)
 672 {
 673         snd_pcm_lib_preallocate_free_for_all(pcm);
 674 }
 675
 676 int __devinit oxygen_pcm_init(struct oxygen *chip)
 677 {
 678         struct snd_pcm *pcm;
 679         int err;
 680
 681         err = snd_pcm_new(chip->card, "Analog", 0, 1, 1, &pcm);
 682         if (err < 0)
 683                 return err;
 684         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &oxygen_multich_ops);
 685         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 686                         chip->model->record_from_dma_b ?
 687                         &oxygen_rec_b_ops : &oxygen_rec_a_ops);
 688         pcm->private_data = chip;
 689         pcm->private_free = oxygen_pcm_free;
 690         strcpy(pcm->name, "Analog");
 691         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
 692                                       SNDRV_DMA_TYPE_DEV,
 693                                       snd_dma_pci_data(chip->pci),
 694                                       512 * 1024, 2048 * 1024);
 695         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
 696                                       SNDRV_DMA_TYPE_DEV,
 697                                       snd_dma_pci_data(chip->pci),
 698                                       128 * 1024, 256 * 1024);
 699
 700         err = snd_pcm_new(chip->card, "Digital", 1, 1, 1, &pcm);
 701         if (err < 0)
 702                 return err;
 703         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &oxygen_spdif_ops);
 704         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &oxygen_rec_c_ops);
 705         pcm->private_data = chip;
 706         pcm->private_free = oxygen_pcm_free;
 707         strcpy(pcm->name, "Digital");
 708         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 709                                               snd_dma_pci_data(chip->pci),
 710                                               128 * 1024, 256 * 1024);
 711
 712         if (chip->has_2nd_ac97_codec) {
 713                 err = snd_pcm_new(chip->card, "AC97", 2, 1, 0, &pcm);
 714                 if (err < 0)
 715                         return err;
 716                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 717                                 &oxygen_ac97_ops);
 718                 pcm->private_data = chip;
 719                 pcm->private_free = oxygen_pcm_free;
 720                 strcpy(pcm->name, "Front Panel");
 721                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 722                                                       snd_dma_pci_data(chip->pci),
 723                                                       128 * 1024, 256 * 1024);
 724         }
 725         return 0;
 726 }