2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
10 * based on a lot of other RTC drivers.
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/i2c.h>
21 #include <linux/bcd.h>
22 #include <linux/rtc.h>
23 #include <linux/delay.h>
25 #define DRV_VERSION "1.0.7"
27 /* Addresses to scan: none. This chip is located at
28 * 0x6f and uses a two bytes register addressing.
29 * Two bytes need to be written to read a single register,
30 * while most other chips just require one and take the second
31 * one as the data to be written. To prevent corrupting
32 * unknown chips, the user must explicitly set the probe parameter.
35 static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
37 /* Insmod parameters */
40 /* offsets into CCR area */
51 #define X1205_REG_SR 0x3F /* status register */
52 #define X1205_REG_Y2K 0x37
53 #define X1205_REG_DW 0x36
54 #define X1205_REG_YR 0x35
55 #define X1205_REG_MO 0x34
56 #define X1205_REG_DT 0x33
57 #define X1205_REG_HR 0x32
58 #define X1205_REG_MN 0x31
59 #define X1205_REG_SC 0x30
60 #define X1205_REG_DTR 0x13
61 #define X1205_REG_ATR 0x12
62 #define X1205_REG_INT 0x11
63 #define X1205_REG_0 0x10
64 #define X1205_REG_Y2K1 0x0F
65 #define X1205_REG_DWA1 0x0E
66 #define X1205_REG_YRA1 0x0D
67 #define X1205_REG_MOA1 0x0C
68 #define X1205_REG_DTA1 0x0B
69 #define X1205_REG_HRA1 0x0A
70 #define X1205_REG_MNA1 0x09
71 #define X1205_REG_SCA1 0x08
72 #define X1205_REG_Y2K0 0x07
73 #define X1205_REG_DWA0 0x06
74 #define X1205_REG_YRA0 0x05
75 #define X1205_REG_MOA0 0x04
76 #define X1205_REG_DTA0 0x03
77 #define X1205_REG_HRA0 0x02
78 #define X1205_REG_MNA0 0x01
79 #define X1205_REG_SCA0 0x00
81 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
82 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
84 #define X1205_SR_RTCF 0x01 /* Clock failure */
85 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
86 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
88 #define X1205_DTR_DTR0 0x01
89 #define X1205_DTR_DTR1 0x02
90 #define X1205_DTR_DTR2 0x04
92 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
95 static int x1205_attach(struct i2c_adapter *adapter);
96 static int x1205_detach(struct i2c_client *client);
97 static int x1205_probe(struct i2c_adapter *adapter, int address, int kind);
99 static struct i2c_driver x1205_driver = {
103 .id = I2C_DRIVERID_X1205,
104 .attach_adapter = &x1205_attach,
105 .detach_client = &x1205_detach,
109 * In the routines that deal directly with the x1205 hardware, we use
110 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
111 * Epoch is initialized as 2000. Time is set to UTC.
113 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
114 unsigned char reg_base)
116 unsigned char dt_addr[2] = { 0, reg_base };
118 unsigned char buf[8];
120 struct i2c_msg msgs[] = {
121 { client->addr, 0, 2, dt_addr }, /* setup read ptr */
122 { client->addr, I2C_M_RD, 8, buf }, /* read date */
125 /* read date registers */
126 if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
127 dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
131 dev_dbg(&client->dev,
132 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
133 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
135 buf[0], buf[1], buf[2], buf[3],
136 buf[4], buf[5], buf[6], buf[7]);
138 tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
139 tm->tm_min = BCD2BIN(buf[CCR_MIN]);
140 tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
141 tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
142 tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
143 tm->tm_year = BCD2BIN(buf[CCR_YEAR])
144 + (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
145 tm->tm_wday = buf[CCR_WDAY];
147 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
148 "mday=%d, mon=%d, year=%d, wday=%d\n",
150 tm->tm_sec, tm->tm_min, tm->tm_hour,
151 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
156 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
158 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
160 struct i2c_msg msgs[] = {
161 { client->addr, 0, 2, sr_addr }, /* setup read ptr */
162 { client->addr, I2C_M_RD, 1, sr }, /* read status */
165 /* read status register */
166 if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
167 dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
174 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
175 int datetoo, u8 reg_base)
178 unsigned char buf[8];
180 static const unsigned char wel[3] = { 0, X1205_REG_SR,
183 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
184 X1205_SR_WEL | X1205_SR_RWEL };
186 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
188 dev_dbg(&client->dev,
189 "%s: secs=%d, mins=%d, hours=%d\n",
191 tm->tm_sec, tm->tm_min, tm->tm_hour);
193 buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
194 buf[CCR_MIN] = BIN2BCD(tm->tm_min);
196 /* set hour and 24hr bit */
197 buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;
199 /* should we also set the date? */
201 dev_dbg(&client->dev,
202 "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
204 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
206 buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
209 buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
211 /* year, since the rtc epoch*/
212 buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
213 buf[CCR_WDAY] = tm->tm_wday & 0x07;
214 buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
217 /* this sequence is required to unlock the chip */
218 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
219 dev_err(&client->dev, "%s: wel - %d\n", __FUNCTION__, xfer);
223 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
224 dev_err(&client->dev, "%s: rwel - %d\n", __FUNCTION__, xfer);
228 /* write register's data */
229 for (i = 0; i < (datetoo ? 8 : 3); i++) {
230 unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
232 xfer = i2c_master_send(client, rdata, 3);
234 dev_err(&client->dev,
235 "%s: xfer=%d addr=%02x, data=%02x\n",
237 xfer, rdata[1], rdata[2]);
242 /* disable further writes */
243 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
244 dev_err(&client->dev, "%s: diswe - %d\n", __FUNCTION__, xfer);
251 static int x1205_fix_osc(struct i2c_client *client)
256 tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
258 if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
259 dev_err(&client->dev,
260 "unable to restart the oscillator\n");
265 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
268 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
270 struct i2c_msg msgs[] = {
271 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
272 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
275 /* read dtr register */
276 if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
277 dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
281 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __FUNCTION__, dtr);
285 if (dtr & X1205_DTR_DTR0)
288 if (dtr & X1205_DTR_DTR1)
291 if (dtr & X1205_DTR_DTR2)
297 static int x1205_get_atrim(struct i2c_client *client, int *trim)
300 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
302 struct i2c_msg msgs[] = {
303 { client->addr, 0, 2, atr_addr }, /* setup read ptr */
304 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
307 /* read atr register */
308 if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
309 dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
313 dev_dbg(&client->dev, "%s: raw atr=%x\n", __FUNCTION__, atr);
315 /* atr is a two's complement value on 6 bits,
316 * perform sign extension. The formula is
317 * Catr = (atr * 0.25pF) + 11.00pF.
322 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __FUNCTION__, atr, atr);
324 *trim = (atr * 250) + 11000;
326 dev_dbg(&client->dev, "%s: real=%d\n", __FUNCTION__, *trim);
333 unsigned char reg, mask, min, max;
336 static int x1205_validate_client(struct i2c_client *client)
340 /* Probe array. We will read the register at the specified
341 * address and check if the given bits are zero.
343 static const unsigned char probe_zero_pattern[] = {
352 static const struct x1205_limit probe_limits_pattern[] = {
353 /* register, mask, min, max */
354 { X1205_REG_Y2K, 0xFF, 19, 20 },
355 { X1205_REG_DW, 0xFF, 0, 6 },
356 { X1205_REG_YR, 0xFF, 0, 99 },
357 { X1205_REG_MO, 0xFF, 0, 12 },
358 { X1205_REG_DT, 0xFF, 0, 31 },
359 { X1205_REG_HR, 0x7F, 0, 23 },
360 { X1205_REG_MN, 0xFF, 0, 59 },
361 { X1205_REG_SC, 0xFF, 0, 59 },
362 { X1205_REG_Y2K1, 0xFF, 19, 20 },
363 { X1205_REG_Y2K0, 0xFF, 19, 20 },
366 /* check that registers have bits a 0 where expected */
367 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
370 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
372 struct i2c_msg msgs[2] = {
373 { client->addr, 0, 2, addr },
374 { client->addr, I2C_M_RD, 1, &buf },
377 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
378 dev_err(&client->dev,
379 "%s: could not read register %x\n",
380 __FUNCTION__, probe_zero_pattern[i]);
385 if ((buf & probe_zero_pattern[i+1]) != 0) {
386 dev_err(&client->dev,
387 "%s: register=%02x, zero pattern=%d, value=%x\n",
388 __FUNCTION__, probe_zero_pattern[i], i, buf);
394 /* check limits (only registers with bcd values) */
395 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
396 unsigned char reg, value;
398 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
400 struct i2c_msg msgs[2] = {
401 { client->addr, 0, 2, addr },
402 { client->addr, I2C_M_RD, 1, ® },
405 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
406 dev_err(&client->dev,
407 "%s: could not read register %x\n",
408 __FUNCTION__, probe_limits_pattern[i].reg);
413 value = BCD2BIN(reg & probe_limits_pattern[i].mask);
415 if (value > probe_limits_pattern[i].max ||
416 value < probe_limits_pattern[i].min) {
417 dev_dbg(&client->dev,
418 "%s: register=%x, lim pattern=%d, value=%d\n",
419 __FUNCTION__, probe_limits_pattern[i].reg,
429 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
431 return x1205_get_datetime(to_i2c_client(dev),
432 &alrm->time, X1205_ALM0_BASE);
435 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
437 return x1205_set_datetime(to_i2c_client(dev),
438 &alrm->time, 1, X1205_ALM0_BASE);
441 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
443 return x1205_get_datetime(to_i2c_client(dev),
447 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
449 return x1205_set_datetime(to_i2c_client(dev),
450 tm, 1, X1205_CCR_BASE);
453 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
455 int err, dtrim, atrim;
457 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
458 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
460 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
461 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
462 atrim / 1000, atrim % 1000);
466 static const struct rtc_class_ops x1205_rtc_ops = {
467 .proc = x1205_rtc_proc,
468 .read_time = x1205_rtc_read_time,
469 .set_time = x1205_rtc_set_time,
470 .read_alarm = x1205_rtc_read_alarm,
471 .set_alarm = x1205_rtc_set_alarm,
474 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
475 struct device_attribute *attr, char *buf)
479 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
483 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
485 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
487 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
488 struct device_attribute *attr, char *buf)
492 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
496 return sprintf(buf, "%d ppm\n", dtrim);
498 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
500 static int x1205_attach(struct i2c_adapter *adapter)
502 return i2c_probe(adapter, &addr_data, x1205_probe);
505 static int x1205_probe(struct i2c_adapter *adapter, int address, int kind)
509 struct i2c_client *client;
510 struct rtc_device *rtc;
512 dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);
514 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
519 if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
525 client->addr = address;
526 client->driver = &x1205_driver;
527 client->adapter = adapter;
529 strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE);
531 /* Verify the chip is really an X1205 */
533 if (x1205_validate_client(client) < 0) {
539 /* Inform the i2c layer */
540 if ((err = i2c_attach_client(client)))
543 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
545 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
546 &x1205_rtc_ops, THIS_MODULE);
553 i2c_set_clientdata(client, rtc);
555 /* Check for power failures and eventualy enable the osc */
556 if ((err = x1205_get_status(client, &sr)) == 0) {
557 if (sr & X1205_SR_RTCF) {
558 dev_err(&client->dev,
559 "power failure detected, "
560 "please set the clock\n");
562 x1205_fix_osc(client);
566 dev_err(&client->dev, "couldn't read status\n");
568 err = device_create_file(&client->dev, &dev_attr_atrim);
569 if (err) goto exit_devreg;
570 err = device_create_file(&client->dev, &dev_attr_dtrim);
571 if (err) goto exit_atrim;
576 device_remove_file(&client->dev, &dev_attr_atrim);
579 rtc_device_unregister(rtc);
582 i2c_detach_client(client);
591 static int x1205_detach(struct i2c_client *client)
594 struct rtc_device *rtc = i2c_get_clientdata(client);
597 rtc_device_unregister(rtc);
599 if ((err = i2c_detach_client(client)))
607 static int __init x1205_init(void)
609 return i2c_add_driver(&x1205_driver);
612 static void __exit x1205_exit(void)
614 i2c_del_driver(&x1205_driver);
618 "Karen Spearel <kas111 at gmail dot com>, "
619 "Alessandro Zummo <a.zummo@towertech.it>");
620 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
621 MODULE_LICENSE("GPL");
622 MODULE_VERSION(DRV_VERSION);
624 module_init(x1205_init);
625 module_exit(x1205_exit);