2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
15 as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
16 -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
17 else echo "$(2)"; fi ;)
22 # Select the object file format to substitute into the linker script.
24 ifdef CONFIG_CPU_LITTLE_ENDIAN
25 32bit-tool-prefix = mipsel-linux-
26 64bit-tool-prefix = mips64el-linux-
27 32bit-bfd = elf32-tradlittlemips
28 64bit-bfd = elf64-tradlittlemips
29 32bit-emul = elf32ltsmip
30 64bit-emul = elf64ltsmip
32 32bit-tool-prefix = mips-linux-
33 64bit-tool-prefix = mips64-linux-
34 32bit-bfd = elf32-tradbigmips
35 64bit-bfd = elf64-tradbigmips
36 32bit-emul = elf32btsmip
37 64bit-emul = elf64btsmip
42 tool-prefix = $(32bit-tool-prefix)
47 tool-prefix = $(64bit-tool-prefix)
51 ifdef CONFIG_CROSSCOMPILE
52 CROSS_COMPILE := $(tool-prefix)
55 CHECKFLAGS-y += -D__linux__ -D__mips__ \
59 CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
61 -D__PTRDIFF_TYPE__=int
62 CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
64 -D__PTRDIFF_TYPE__="long int"
65 CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
66 CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
68 CHECKFLAGS = $(CHECKFLAGS-y)
70 ifdef CONFIG_BUILD_ELF64
72 ld-emul = $(64bit-emul)
73 vmlinux-32 = vmlinux.32
77 ld-emul = $(32bit-emul)
79 vmlinux-64 = vmlinux.64
81 cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
85 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
86 # code since it only slows down the whole thing. At some point we might make
87 # use of global pointer optimizations but their use of $28 conflicts with
88 # the current pointer optimization.
90 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
91 # machines may also. Since BFD is incredibly buggy with respect to
92 # crossformat linking we rely on the elf2ecoff tool for format conversion.
94 cflags-y += -I $(TOPDIR)/include/asm/gcc
95 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
96 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
97 MODFLAGS += -mlong-calls
100 # We explicitly add the endianness specifier if needed, this allows
101 # to compile kernels with a toolchain for the other endianness. We
102 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
103 # when fed the toolchain default!
105 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
106 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
108 cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
111 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
113 # <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
115 # <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
116 # with up to the oldest supported tools)
117 # <isa2> -- an ISA designation used as an ABI selector for
118 # gcc versions that do not support "-mabi=32"
119 # (depending on the CPU type, either "mips1" or
122 set_gccflags = $(shell \
124 cpu=$(1); isa=-$(2); \
125 for gcc_opt in -march= -mcpu=; do \
126 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
127 -xc /dev/null > /dev/null 2>&1 && \
130 cpu=$(3); isa=-$(4); \
131 for gcc_opt in -march= -mcpu=; do \
132 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
133 -xc /dev/null > /dev/null 2>&1 && \
138 gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
139 if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
142 gcc_abi=; gcc_isa=-$(5); \
144 gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
146 for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
147 $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
148 -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
151 gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
154 if test "$(gcc-abi)" != "$(gas-abi)"; then \
155 gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
157 if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
158 $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
159 -xc /dev/null > /dev/null 2>&1 && \
162 echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
165 # CPU-dependent compiler/assembler options for optimization.
167 cflags-$(CONFIG_CPU_R3000) += \
168 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
170 cflags-$(CONFIG_CPU_TX39XX) += \
171 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
173 cflags-$(CONFIG_CPU_R6000) += \
174 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
177 cflags-$(CONFIG_CPU_R4300) += \
178 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
181 cflags-$(CONFIG_CPU_VR41XX) += \
182 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
185 cflags-$(CONFIG_CPU_R4X00) += \
186 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
189 cflags-$(CONFIG_CPU_TX49XX) += \
190 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
193 cflags-$(CONFIG_CPU_MIPS32_R1) += \
194 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
197 cflags-$(CONFIG_CPU_MIPS32_R2) += \
198 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
201 cflags-$(CONFIG_CPU_MIPS64_R1) += \
202 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
205 cflags-$(CONFIG_CPU_MIPS64_R2) += \
206 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
209 cflags-$(CONFIG_CPU_R5000) += \
210 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
213 cflags-$(CONFIG_CPU_R5432) += \
214 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
217 cflags-$(CONFIG_CPU_NEVADA) += \
218 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
220 # $(call cc-option,-mmad)
222 cflags-$(CONFIG_CPU_RM7000) += \
223 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
226 cflags-$(CONFIG_CPU_RM9000) += \
227 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
231 cflags-$(CONFIG_CPU_SB1) += \
232 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
235 cflags-$(CONFIG_CPU_R8000) += \
236 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
239 cflags-$(CONFIG_CPU_R10000) += \
240 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
244 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
245 MODFLAGS += -msb1-pass1-workarounds
252 libs-$(CONFIG_ARC) += arch/mips/arc/
253 libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
256 # Board-dependent options and extra files
260 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
262 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
263 cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
264 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
267 # Common Alchemy Au1x00 stuff
269 core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
270 cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
273 # AMD Alchemy Pb1000 eval board
275 libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
276 cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
277 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
280 # AMD Alchemy Pb1100 eval board
282 libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
283 cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
284 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
287 # AMD Alchemy Pb1500 eval board
289 libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
290 cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
291 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
294 # AMD Alchemy Pb1550 eval board
296 libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
297 cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
298 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
301 # AMD Alchemy Pb1200 eval board
303 libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
304 cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
305 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
308 # AMD Alchemy Db1000 eval board
310 libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
311 cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
312 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
315 # AMD Alchemy Db1100 eval board
317 libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
318 cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
319 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
322 # AMD Alchemy Db1500 eval board
324 libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
325 cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
326 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
329 # AMD Alchemy Db1550 eval board
331 libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
332 cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
333 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
336 # AMD Alchemy Db1200 eval board
338 libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
339 cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
340 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
343 # AMD Alchemy Bosporus eval board
345 libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
346 cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
347 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
350 # AMD Alchemy Mirage eval board
352 libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
353 cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
354 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
357 # 4G-Systems eval board
359 libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
360 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
365 libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
366 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
371 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
372 cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/cobalt
373 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
378 core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
379 cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
380 libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
381 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
382 CLEAN_FILES += drivers/tc/lk201-map.c
385 # Galileo EV64120 Board
387 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
388 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
389 cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
390 load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
393 # Galileo EV96100 Board
395 core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
396 cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
397 load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
400 # Globespan IVR eval board with QED 5231 CPU
402 core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
403 core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
404 load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
407 # ITE 8172 eval board with QED 5231 CPU
409 core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
410 load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
413 # For all MIPS, Inc. eval boards
415 core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
420 core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
421 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
422 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
423 load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
428 core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
429 cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
430 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
435 core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
436 load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
441 core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
442 cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
443 load-$(CONFIG_MIPS_SIM) += 0x80100000
446 # Momentum Ocelot board
448 # The Ocelot setup.o must be linked early - it does the ioremap() for the
451 core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
452 arch/mips/gt64120/momenco_ocelot/
453 cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
454 load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
457 # Momentum Ocelot-G board
459 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
462 core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
463 load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
466 # Momentum Ocelot-C and -CS boards
468 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
470 core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
471 load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
474 # PMC-Sierra Yosemite
476 core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
477 cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
478 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
480 # Qemu simulating MIPS32 4Kc
482 core-$(CONFIG_QEMU) += arch/mips/qemu/
483 cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
484 load-$(CONFIG_QEMU) += 0xffffffff80010000
489 core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
490 cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
491 load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
494 # Momentum Jaguar ATX
496 core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
497 cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
498 #ifdef CONFIG_JAGUAR_DMALOW
499 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
501 load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
507 core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
512 core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
513 load-$(CONFIG_DDB5074) += 0xffffffff80080000
518 core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
519 load-$(CONFIG_DDB5476) += 0xffffffff80080000
524 core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
525 load-$(CONFIG_DDB5477) += 0xffffffff80100000
527 core-$(CONFIG_LASAT) += arch/mips/lasat/
528 cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
529 load-$(CONFIG_LASAT) += 0xffffffff80000000
534 core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
535 cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
540 core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
541 load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
544 # ZAO Networks Capcella (VR4131)
546 load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
549 # Victor MP-C303/304 (VR4122)
551 load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
554 # IBM WorkPad z50 (VR4121)
556 core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
557 load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
560 # CASIO CASSIPEIA E-55/65 (VR4111)
562 core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
563 load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
566 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
568 load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
571 # Common Philips PNX8550
573 core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
574 cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
577 # Philips PNX8550 JBS board
579 libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
580 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
581 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
584 # SGI IP22 (Indy/Indigo2)
586 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
587 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
588 # be aligned to a multiple of the kernel stack size or the handling of the
589 # current variable will break so for 64-bit kernels we have to raise the start
592 core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
593 cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
595 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
598 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
602 # SGI-IP27 (Origin200/2000)
604 # Set the load address to >= 0xc000000000300000 if you want to leave space for
605 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
606 # be 16kb aligned or the handling of the current variable will break.
608 ifdef CONFIG_SGI_IP27
609 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
610 cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
611 ifdef CONFIG_BUILD_ELF64
612 ifdef CONFIG_MAPPED_KERNEL
613 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
614 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
615 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
617 load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
618 OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
621 ifdef CONFIG_MAPPED_KERNEL
622 load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000
623 OBJCOPYFLAGS := --change-addresses=0xc000000080000000
624 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
626 load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000
627 OBJCOPYFLAGS := --change-addresses=0xa800000080000000
635 # Set the load address to >= 80069000 if you want to leave space for symmon,
636 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
637 # a multiple of the kernel stack size or the handling of the current variable
640 core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
641 cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
642 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
647 # This is a LIB so that it links at the end, and initcalls are later
648 # the sequence; but it is built as an object so that modules don't get
649 # removed (as happens, even if they have __initcall/module_init)
651 core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
652 cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
653 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
655 core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
656 cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
657 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
659 core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
660 cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
661 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
663 core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
664 cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
665 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
668 # Sibyte BCM91120x (Carmel) board
669 # Sibyte BCM91120C (CRhine) board
670 # Sibyte BCM91125C (CRhone) board
671 # Sibyte BCM91125E (Rhone) board
673 # Sibyte BCM91x80 (BigSur) board
675 libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
676 load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
677 libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
678 load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
679 libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
680 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
681 libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
682 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
683 libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
684 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
685 libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
686 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
687 libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
688 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
693 core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
694 cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
695 load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
698 # Toshiba JMR-TX3927 board
700 core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
701 arch/mips/jmr3927/common/
702 cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
703 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
706 # Toshiba RBTX4927 board or
707 # Toshiba RBTX4937 board
709 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
710 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
711 load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
714 # Toshiba RBTX4938 board
716 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
717 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
718 load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
720 cflags-y += -Iinclude/asm-mips/mach-generic
721 drivers-$(CONFIG_PCI) += arch/mips/pci/
724 ifdef CONFIG_CPU_LITTLE_ENDIAN
727 JIFFIES = jiffies_64 + 4
733 AFLAGS += $(cflags-y)
734 CFLAGS += $(cflags-y)
736 LDFLAGS += -m $(ld-emul)
738 OBJCOPYFLAGS += --remove-section=.reginfo
741 # Choosing incompatible machines durings configuration will result in
742 # error messages during linking. Select a default linkscript if
743 # none has been choosen above.
746 CPPFLAGS_vmlinux.lds := \
748 -D"LOADADDR=$(load-y)" \
749 -D"JIFFIES=$(JIFFIES)" \
750 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
752 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
754 libs-y += arch/mips/lib/
755 libs-$(CONFIG_32BIT) += arch/mips/lib-32/
756 libs-$(CONFIG_64BIT) += arch/mips/lib-64/
758 core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
760 drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
763 rom.bin rom.sw: vmlinux
764 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
768 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
769 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
770 # convert to ECOFF using elf2ecoff.
773 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
776 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
777 # ELF files from 32-bit files by conversion.
780 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
782 makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
784 ifdef CONFIG_BOOT_ELF32
788 ifdef CONFIG_BOOT_ELF64
792 ifdef CONFIG_MIPS_ATLAS
796 ifdef CONFIG_MIPS_MALTA
800 ifdef CONFIG_MIPS_SEAD
808 ifdef CONFIG_SNI_RM200_PCI
812 vmlinux.bin: $(vmlinux-32)
813 +@$(call makeboot,$@)
815 vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
816 +@$(call makeboot,$@)
818 vmlinux.srec: $(vmlinux-32)
819 +@$(call makeboot,$@)
821 CLEAN_FILES += vmlinux.ecoff \
827 @$(MAKE) $(clean)=arch/mips/boot
828 @$(MAKE) $(clean)=arch/mips/lasat
830 CLEAN_FILES += vmlinux.32 \