Merge branches 'arm', 'at91', 'ep93xx', 'iop', 'ks8695', 'misc', 'mxc', 'ns9x', ...
[linux-2.6] / drivers / usb / host / ehci-sched.c
1 /*
2  * Copyright (c) 2001-2004 by David Brownell
3  * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2 of the License, or (at your
8  * option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software Foundation,
17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  */
19
20 /* this file is part of ehci-hcd.c */
21
22 /*-------------------------------------------------------------------------*/
23
24 /*
25  * EHCI scheduled transaction support:  interrupt, iso, split iso
26  * These are called "periodic" transactions in the EHCI spec.
27  *
28  * Note that for interrupt transfers, the QH/QTD manipulation is shared
29  * with the "asynchronous" transaction support (control/bulk transfers).
30  * The only real difference is in how interrupt transfers are scheduled.
31  *
32  * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33  * It keeps track of every ITD (or SITD) that's linked, and holds enough
34  * pre-calculated schedule data to make appending to the queue be quick.
35  */
36
37 static int ehci_get_frame (struct usb_hcd *hcd);
38
39 /*-------------------------------------------------------------------------*/
40
41 /*
42  * periodic_next_shadow - return "next" pointer on shadow list
43  * @periodic: host pointer to qh/itd/sitd
44  * @tag: hardware tag for type of this record
45  */
46 static union ehci_shadow *
47 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
48                 __hc32 tag)
49 {
50         switch (hc32_to_cpu(ehci, tag)) {
51         case Q_TYPE_QH:
52                 return &periodic->qh->qh_next;
53         case Q_TYPE_FSTN:
54                 return &periodic->fstn->fstn_next;
55         case Q_TYPE_ITD:
56                 return &periodic->itd->itd_next;
57         // case Q_TYPE_SITD:
58         default:
59                 return &periodic->sitd->sitd_next;
60         }
61 }
62
63 /* caller must hold ehci->lock */
64 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
65 {
66         union ehci_shadow       *prev_p = &ehci->pshadow[frame];
67         __hc32                  *hw_p = &ehci->periodic[frame];
68         union ehci_shadow       here = *prev_p;
69
70         /* find predecessor of "ptr"; hw and shadow lists are in sync */
71         while (here.ptr && here.ptr != ptr) {
72                 prev_p = periodic_next_shadow(ehci, prev_p,
73                                 Q_NEXT_TYPE(ehci, *hw_p));
74                 hw_p = here.hw_next;
75                 here = *prev_p;
76         }
77         /* an interrupt entry (at list end) could have been shared */
78         if (!here.ptr)
79                 return;
80
81         /* update shadow and hardware lists ... the old "next" pointers
82          * from ptr may still be in use, the caller updates them.
83          */
84         *prev_p = *periodic_next_shadow(ehci, &here,
85                         Q_NEXT_TYPE(ehci, *hw_p));
86         *hw_p = *here.hw_next;
87 }
88
89 /* how many of the uframe's 125 usecs are allocated? */
90 static unsigned short
91 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
92 {
93         __hc32                  *hw_p = &ehci->periodic [frame];
94         union ehci_shadow       *q = &ehci->pshadow [frame];
95         unsigned                usecs = 0;
96
97         while (q->ptr) {
98                 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
99                 case Q_TYPE_QH:
100                         /* is it in the S-mask? */
101                         if (q->qh->hw_info2 & cpu_to_hc32(ehci, 1 << uframe))
102                                 usecs += q->qh->usecs;
103                         /* ... or C-mask? */
104                         if (q->qh->hw_info2 & cpu_to_hc32(ehci,
105                                         1 << (8 + uframe)))
106                                 usecs += q->qh->c_usecs;
107                         hw_p = &q->qh->hw_next;
108                         q = &q->qh->qh_next;
109                         break;
110                 // case Q_TYPE_FSTN:
111                 default:
112                         /* for "save place" FSTNs, count the relevant INTR
113                          * bandwidth from the previous frame
114                          */
115                         if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) {
116                                 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
117                         }
118                         hw_p = &q->fstn->hw_next;
119                         q = &q->fstn->fstn_next;
120                         break;
121                 case Q_TYPE_ITD:
122                         if (q->itd->hw_transaction[uframe])
123                                 usecs += q->itd->stream->usecs;
124                         hw_p = &q->itd->hw_next;
125                         q = &q->itd->itd_next;
126                         break;
127                 case Q_TYPE_SITD:
128                         /* is it in the S-mask?  (count SPLIT, DATA) */
129                         if (q->sitd->hw_uframe & cpu_to_hc32(ehci,
130                                         1 << uframe)) {
131                                 if (q->sitd->hw_fullspeed_ep &
132                                                 cpu_to_hc32(ehci, 1<<31))
133                                         usecs += q->sitd->stream->usecs;
134                                 else    /* worst case for OUT start-split */
135                                         usecs += HS_USECS_ISO (188);
136                         }
137
138                         /* ... C-mask?  (count CSPLIT, DATA) */
139                         if (q->sitd->hw_uframe &
140                                         cpu_to_hc32(ehci, 1 << (8 + uframe))) {
141                                 /* worst case for IN complete-split */
142                                 usecs += q->sitd->stream->c_usecs;
143                         }
144
145                         hw_p = &q->sitd->hw_next;
146                         q = &q->sitd->sitd_next;
147                         break;
148                 }
149         }
150 #ifdef  DEBUG
151         if (usecs > 100)
152                 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
153                         frame * 8 + uframe, usecs);
154 #endif
155         return usecs;
156 }
157
158 /*-------------------------------------------------------------------------*/
159
160 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
161 {
162         if (!dev1->tt || !dev2->tt)
163                 return 0;
164         if (dev1->tt != dev2->tt)
165                 return 0;
166         if (dev1->tt->multi)
167                 return dev1->ttport == dev2->ttport;
168         else
169                 return 1;
170 }
171
172 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
173
174 /* Which uframe does the low/fullspeed transfer start in?
175  *
176  * The parameter is the mask of ssplits in "H-frame" terms
177  * and this returns the transfer start uframe in "B-frame" terms,
178  * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
179  * will cause a transfer in "B-frame" uframe 0.  "B-frames" lag
180  * "H-frames" by 1 uframe.  See the EHCI spec sec 4.5 and figure 4.7.
181  */
182 static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
183 {
184         unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask);
185         if (!smask) {
186                 ehci_err(ehci, "invalid empty smask!\n");
187                 /* uframe 7 can't have bw so this will indicate failure */
188                 return 7;
189         }
190         return ffs(smask) - 1;
191 }
192
193 static const unsigned char
194 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
195
196 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
197 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
198 {
199         int i;
200         for (i=0; i<7; i++) {
201                 if (max_tt_usecs[i] < tt_usecs[i]) {
202                         tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
203                         tt_usecs[i] = max_tt_usecs[i];
204                 }
205         }
206 }
207
208 /* How many of the tt's periodic downstream 1000 usecs are allocated?
209  *
210  * While this measures the bandwidth in terms of usecs/uframe,
211  * the low/fullspeed bus has no notion of uframes, so any particular
212  * low/fullspeed transfer can "carry over" from one uframe to the next,
213  * since the TT just performs downstream transfers in sequence.
214  *
215  * For example two separate 100 usec transfers can start in the same uframe,
216  * and the second one would "carry over" 75 usecs into the next uframe.
217  */
218 static void
219 periodic_tt_usecs (
220         struct ehci_hcd *ehci,
221         struct usb_device *dev,
222         unsigned frame,
223         unsigned short tt_usecs[8]
224 )
225 {
226         __hc32                  *hw_p = &ehci->periodic [frame];
227         union ehci_shadow       *q = &ehci->pshadow [frame];
228         unsigned char           uf;
229
230         memset(tt_usecs, 0, 16);
231
232         while (q->ptr) {
233                 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
234                 case Q_TYPE_ITD:
235                         hw_p = &q->itd->hw_next;
236                         q = &q->itd->itd_next;
237                         continue;
238                 case Q_TYPE_QH:
239                         if (same_tt(dev, q->qh->dev)) {
240                                 uf = tt_start_uframe(ehci, q->qh->hw_info2);
241                                 tt_usecs[uf] += q->qh->tt_usecs;
242                         }
243                         hw_p = &q->qh->hw_next;
244                         q = &q->qh->qh_next;
245                         continue;
246                 case Q_TYPE_SITD:
247                         if (same_tt(dev, q->sitd->urb->dev)) {
248                                 uf = tt_start_uframe(ehci, q->sitd->hw_uframe);
249                                 tt_usecs[uf] += q->sitd->stream->tt_usecs;
250                         }
251                         hw_p = &q->sitd->hw_next;
252                         q = &q->sitd->sitd_next;
253                         continue;
254                 // case Q_TYPE_FSTN:
255                 default:
256                         ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n",
257                                         frame);
258                         hw_p = &q->fstn->hw_next;
259                         q = &q->fstn->fstn_next;
260                 }
261         }
262
263         carryover_tt_bandwidth(tt_usecs);
264
265         if (max_tt_usecs[7] < tt_usecs[7])
266                 ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
267                         frame, tt_usecs[7] - max_tt_usecs[7]);
268 }
269
270 /*
271  * Return true if the device's tt's downstream bus is available for a
272  * periodic transfer of the specified length (usecs), starting at the
273  * specified frame/uframe.  Note that (as summarized in section 11.19
274  * of the usb 2.0 spec) TTs can buffer multiple transactions for each
275  * uframe.
276  *
277  * The uframe parameter is when the fullspeed/lowspeed transfer
278  * should be executed in "B-frame" terms, which is the same as the
279  * highspeed ssplit's uframe (which is in "H-frame" terms).  For example
280  * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
281  * See the EHCI spec sec 4.5 and fig 4.7.
282  *
283  * This checks if the full/lowspeed bus, at the specified starting uframe,
284  * has the specified bandwidth available, according to rules listed
285  * in USB 2.0 spec section 11.18.1 fig 11-60.
286  *
287  * This does not check if the transfer would exceed the max ssplit
288  * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
289  * since proper scheduling limits ssplits to less than 16 per uframe.
290  */
291 static int tt_available (
292         struct ehci_hcd         *ehci,
293         unsigned                period,
294         struct usb_device       *dev,
295         unsigned                frame,
296         unsigned                uframe,
297         u16                     usecs
298 )
299 {
300         if ((period == 0) || (uframe >= 7))     /* error */
301                 return 0;
302
303         for (; frame < ehci->periodic_size; frame += period) {
304                 unsigned short tt_usecs[8];
305
306                 periodic_tt_usecs (ehci, dev, frame, tt_usecs);
307
308                 ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in"
309                         " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
310                         frame, usecs, uframe,
311                         tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3],
312                         tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]);
313
314                 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) {
315                         ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n",
316                                 frame, uframe);
317                         return 0;
318                 }
319
320                 /* special case for isoc transfers larger than 125us:
321                  * the first and each subsequent fully used uframe
322                  * must be empty, so as to not illegally delay
323                  * already scheduled transactions
324                  */
325                 if (125 < usecs) {
326                         int ufs = (usecs / 125) - 1;
327                         int i;
328                         for (i = uframe; i < (uframe + ufs) && i < 8; i++)
329                                 if (0 < tt_usecs[i]) {
330                                         ehci_vdbg(ehci,
331                                                 "multi-uframe xfer can't fit "
332                                                 "in frame %d uframe %d\n",
333                                                 frame, i);
334                                         return 0;
335                                 }
336                 }
337
338                 tt_usecs[uframe] += usecs;
339
340                 carryover_tt_bandwidth(tt_usecs);
341
342                 /* fail if the carryover pushed bw past the last uframe's limit */
343                 if (max_tt_usecs[7] < tt_usecs[7]) {
344                         ehci_vdbg(ehci,
345                                 "tt unavailable usecs %d frame %d uframe %d\n",
346                                 usecs, frame, uframe);
347                         return 0;
348                 }
349         }
350
351         return 1;
352 }
353
354 #else
355
356 /* return true iff the device's transaction translator is available
357  * for a periodic transfer starting at the specified frame, using
358  * all the uframes in the mask.
359  */
360 static int tt_no_collision (
361         struct ehci_hcd         *ehci,
362         unsigned                period,
363         struct usb_device       *dev,
364         unsigned                frame,
365         u32                     uf_mask
366 )
367 {
368         if (period == 0)        /* error */
369                 return 0;
370
371         /* note bandwidth wastage:  split never follows csplit
372          * (different dev or endpoint) until the next uframe.
373          * calling convention doesn't make that distinction.
374          */
375         for (; frame < ehci->periodic_size; frame += period) {
376                 union ehci_shadow       here;
377                 __hc32                  type;
378
379                 here = ehci->pshadow [frame];
380                 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]);
381                 while (here.ptr) {
382                         switch (hc32_to_cpu(ehci, type)) {
383                         case Q_TYPE_ITD:
384                                 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
385                                 here = here.itd->itd_next;
386                                 continue;
387                         case Q_TYPE_QH:
388                                 if (same_tt (dev, here.qh->dev)) {
389                                         u32             mask;
390
391                                         mask = hc32_to_cpu(ehci,
392                                                         here.qh->hw_info2);
393                                         /* "knows" no gap is needed */
394                                         mask |= mask >> 8;
395                                         if (mask & uf_mask)
396                                                 break;
397                                 }
398                                 type = Q_NEXT_TYPE(ehci, here.qh->hw_next);
399                                 here = here.qh->qh_next;
400                                 continue;
401                         case Q_TYPE_SITD:
402                                 if (same_tt (dev, here.sitd->urb->dev)) {
403                                         u16             mask;
404
405                                         mask = hc32_to_cpu(ehci, here.sitd
406                                                                 ->hw_uframe);
407                                         /* FIXME assumes no gap for IN! */
408                                         mask |= mask >> 8;
409                                         if (mask & uf_mask)
410                                                 break;
411                                 }
412                                 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
413                                 here = here.sitd->sitd_next;
414                                 continue;
415                         // case Q_TYPE_FSTN:
416                         default:
417                                 ehci_dbg (ehci,
418                                         "periodic frame %d bogus type %d\n",
419                                         frame, type);
420                         }
421
422                         /* collision or error */
423                         return 0;
424                 }
425         }
426
427         /* no collision */
428         return 1;
429 }
430
431 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
432
433 /*-------------------------------------------------------------------------*/
434
435 static int enable_periodic (struct ehci_hcd *ehci)
436 {
437         u32     cmd;
438         int     status;
439
440         /* did clearing PSE did take effect yet?
441          * takes effect only at frame boundaries...
442          */
443         status = handshake(ehci, &ehci->regs->status, STS_PSS, 0, 9 * 125);
444         if (status != 0) {
445                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
446                 return status;
447         }
448
449         cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
450         ehci_writel(ehci, cmd, &ehci->regs->command);
451         /* posted write ... PSS happens later */
452         ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
453
454         /* make sure ehci_work scans these */
455         ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
456                 % (ehci->periodic_size << 3);
457         return 0;
458 }
459
460 static int disable_periodic (struct ehci_hcd *ehci)
461 {
462         u32     cmd;
463         int     status;
464
465         /* did setting PSE not take effect yet?
466          * takes effect only at frame boundaries...
467          */
468         status = handshake(ehci, &ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);
469         if (status != 0) {
470                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
471                 return status;
472         }
473
474         cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
475         ehci_writel(ehci, cmd, &ehci->regs->command);
476         /* posted write ... */
477
478         ehci->next_uframe = -1;
479         return 0;
480 }
481
482 /*-------------------------------------------------------------------------*/
483
484 /* periodic schedule slots have iso tds (normal or split) first, then a
485  * sparse tree for active interrupt transfers.
486  *
487  * this just links in a qh; caller guarantees uframe masks are set right.
488  * no FSTN support (yet; ehci 0.96+)
489  */
490 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
491 {
492         unsigned        i;
493         unsigned        period = qh->period;
494
495         dev_dbg (&qh->dev->dev,
496                 "link qh%d-%04x/%p start %d [%d/%d us]\n",
497                 period, hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
498                 qh, qh->start, qh->usecs, qh->c_usecs);
499
500         /* high bandwidth, or otherwise every microframe */
501         if (period == 0)
502                 period = 1;
503
504         for (i = qh->start; i < ehci->periodic_size; i += period) {
505                 union ehci_shadow       *prev = &ehci->pshadow[i];
506                 __hc32                  *hw_p = &ehci->periodic[i];
507                 union ehci_shadow       here = *prev;
508                 __hc32                  type = 0;
509
510                 /* skip the iso nodes at list head */
511                 while (here.ptr) {
512                         type = Q_NEXT_TYPE(ehci, *hw_p);
513                         if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
514                                 break;
515                         prev = periodic_next_shadow(ehci, prev, type);
516                         hw_p = &here.qh->hw_next;
517                         here = *prev;
518                 }
519
520                 /* sorting each branch by period (slow-->fast)
521                  * enables sharing interior tree nodes
522                  */
523                 while (here.ptr && qh != here.qh) {
524                         if (qh->period > here.qh->period)
525                                 break;
526                         prev = &here.qh->qh_next;
527                         hw_p = &here.qh->hw_next;
528                         here = *prev;
529                 }
530                 /* link in this qh, unless some earlier pass did that */
531                 if (qh != here.qh) {
532                         qh->qh_next = here;
533                         if (here.qh)
534                                 qh->hw_next = *hw_p;
535                         wmb ();
536                         prev->qh = qh;
537                         *hw_p = QH_NEXT (ehci, qh->qh_dma);
538                 }
539         }
540         qh->qh_state = QH_STATE_LINKED;
541         qh_get (qh);
542
543         /* update per-qh bandwidth for usbfs */
544         ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
545                 ? ((qh->usecs + qh->c_usecs) / qh->period)
546                 : (qh->usecs * 8);
547
548         /* maybe enable periodic schedule processing */
549         if (!ehci->periodic_sched++)
550                 return enable_periodic (ehci);
551
552         return 0;
553 }
554
555 static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
556 {
557         unsigned        i;
558         unsigned        period;
559
560         // FIXME:
561         // IF this isn't high speed
562         //   and this qh is active in the current uframe
563         //   (and overlay token SplitXstate is false?)
564         // THEN
565         //   qh->hw_info1 |= __constant_cpu_to_hc32(1 << 7 /* "ignore" */);
566
567         /* high bandwidth, or otherwise part of every microframe */
568         if ((period = qh->period) == 0)
569                 period = 1;
570
571         for (i = qh->start; i < ehci->periodic_size; i += period)
572                 periodic_unlink (ehci, i, qh);
573
574         /* update per-qh bandwidth for usbfs */
575         ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
576                 ? ((qh->usecs + qh->c_usecs) / qh->period)
577                 : (qh->usecs * 8);
578
579         dev_dbg (&qh->dev->dev,
580                 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
581                 qh->period,
582                 hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
583                 qh, qh->start, qh->usecs, qh->c_usecs);
584
585         /* qh->qh_next still "live" to HC */
586         qh->qh_state = QH_STATE_UNLINK;
587         qh->qh_next.ptr = NULL;
588         qh_put (qh);
589
590         /* maybe turn off periodic schedule */
591         ehci->periodic_sched--;
592         if (!ehci->periodic_sched)
593                 (void) disable_periodic (ehci);
594 }
595
596 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
597 {
598         unsigned        wait;
599
600         qh_unlink_periodic (ehci, qh);
601
602         /* simple/paranoid:  always delay, expecting the HC needs to read
603          * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
604          * expect khubd to clean up after any CSPLITs we won't issue.
605          * active high speed queues may need bigger delays...
606          */
607         if (list_empty (&qh->qtd_list)
608                         || (cpu_to_hc32(ehci, QH_CMASK)
609                                         & qh->hw_info2) != 0)
610                 wait = 2;
611         else
612                 wait = 55;      /* worst case: 3 * 1024 */
613
614         udelay (wait);
615         qh->qh_state = QH_STATE_IDLE;
616         qh->hw_next = EHCI_LIST_END(ehci);
617         wmb ();
618 }
619
620 /*-------------------------------------------------------------------------*/
621
622 static int check_period (
623         struct ehci_hcd *ehci,
624         unsigned        frame,
625         unsigned        uframe,
626         unsigned        period,
627         unsigned        usecs
628 ) {
629         int             claimed;
630
631         /* complete split running into next frame?
632          * given FSTN support, we could sometimes check...
633          */
634         if (uframe >= 8)
635                 return 0;
636
637         /*
638          * 80% periodic == 100 usec/uframe available
639          * convert "usecs we need" to "max already claimed"
640          */
641         usecs = 100 - usecs;
642
643         /* we "know" 2 and 4 uframe intervals were rejected; so
644          * for period 0, check _every_ microframe in the schedule.
645          */
646         if (unlikely (period == 0)) {
647                 do {
648                         for (uframe = 0; uframe < 7; uframe++) {
649                                 claimed = periodic_usecs (ehci, frame, uframe);
650                                 if (claimed > usecs)
651                                         return 0;
652                         }
653                 } while ((frame += 1) < ehci->periodic_size);
654
655         /* just check the specified uframe, at that period */
656         } else {
657                 do {
658                         claimed = periodic_usecs (ehci, frame, uframe);
659                         if (claimed > usecs)
660                                 return 0;
661                 } while ((frame += period) < ehci->periodic_size);
662         }
663
664         // success!
665         return 1;
666 }
667
668 static int check_intr_schedule (
669         struct ehci_hcd         *ehci,
670         unsigned                frame,
671         unsigned                uframe,
672         const struct ehci_qh    *qh,
673         __hc32                  *c_maskp
674 )
675 {
676         int             retval = -ENOSPC;
677         u8              mask = 0;
678
679         if (qh->c_usecs && uframe >= 6)         /* FSTN territory? */
680                 goto done;
681
682         if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
683                 goto done;
684         if (!qh->c_usecs) {
685                 retval = 0;
686                 *c_maskp = 0;
687                 goto done;
688         }
689
690 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
691         if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
692                                 qh->tt_usecs)) {
693                 unsigned i;
694
695                 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
696                 for (i=uframe+1; i<8 && i<uframe+4; i++)
697                         if (!check_period (ehci, frame, i,
698                                                 qh->period, qh->c_usecs))
699                                 goto done;
700                         else
701                                 mask |= 1 << i;
702
703                 retval = 0;
704
705                 *c_maskp = cpu_to_hc32(ehci, mask << 8);
706         }
707 #else
708         /* Make sure this tt's buffer is also available for CSPLITs.
709          * We pessimize a bit; probably the typical full speed case
710          * doesn't need the second CSPLIT.
711          *
712          * NOTE:  both SPLIT and CSPLIT could be checked in just
713          * one smart pass...
714          */
715         mask = 0x03 << (uframe + qh->gap_uf);
716         *c_maskp = cpu_to_hc32(ehci, mask << 8);
717
718         mask |= 1 << uframe;
719         if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
720                 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
721                                         qh->period, qh->c_usecs))
722                         goto done;
723                 if (!check_period (ehci, frame, uframe + qh->gap_uf,
724                                         qh->period, qh->c_usecs))
725                         goto done;
726                 retval = 0;
727         }
728 #endif
729 done:
730         return retval;
731 }
732
733 /* "first fit" scheduling policy used the first time through,
734  * or when the previous schedule slot can't be re-used.
735  */
736 static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
737 {
738         int             status;
739         unsigned        uframe;
740         __hc32          c_mask;
741         unsigned        frame;          /* 0..(qh->period - 1), or NO_FRAME */
742
743         qh_refresh(ehci, qh);
744         qh->hw_next = EHCI_LIST_END(ehci);
745         frame = qh->start;
746
747         /* reuse the previous schedule slots, if we can */
748         if (frame < qh->period) {
749                 uframe = ffs(hc32_to_cpup(ehci, &qh->hw_info2) & QH_SMASK);
750                 status = check_intr_schedule (ehci, frame, --uframe,
751                                 qh, &c_mask);
752         } else {
753                 uframe = 0;
754                 c_mask = 0;
755                 status = -ENOSPC;
756         }
757
758         /* else scan the schedule to find a group of slots such that all
759          * uframes have enough periodic bandwidth available.
760          */
761         if (status) {
762                 /* "normal" case, uframing flexible except with splits */
763                 if (qh->period) {
764                         frame = qh->period - 1;
765                         do {
766                                 for (uframe = 0; uframe < 8; uframe++) {
767                                         status = check_intr_schedule (ehci,
768                                                         frame, uframe, qh,
769                                                         &c_mask);
770                                         if (status == 0)
771                                                 break;
772                                 }
773                         } while (status && frame--);
774
775                 /* qh->period == 0 means every uframe */
776                 } else {
777                         frame = 0;
778                         status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
779                 }
780                 if (status)
781                         goto done;
782                 qh->start = frame;
783
784                 /* reset S-frame and (maybe) C-frame masks */
785                 qh->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
786                 qh->hw_info2 |= qh->period
787                         ? cpu_to_hc32(ehci, 1 << uframe)
788                         : cpu_to_hc32(ehci, QH_SMASK);
789                 qh->hw_info2 |= c_mask;
790         } else
791                 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
792
793         /* stuff into the periodic schedule */
794         status = qh_link_periodic (ehci, qh);
795 done:
796         return status;
797 }
798
799 static int intr_submit (
800         struct ehci_hcd         *ehci,
801         struct urb              *urb,
802         struct list_head        *qtd_list,
803         gfp_t                   mem_flags
804 ) {
805         unsigned                epnum;
806         unsigned long           flags;
807         struct ehci_qh          *qh;
808         int                     status;
809         struct list_head        empty;
810
811         /* get endpoint and transfer/schedule data */
812         epnum = urb->ep->desc.bEndpointAddress;
813
814         spin_lock_irqsave (&ehci->lock, flags);
815
816         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
817                         &ehci_to_hcd(ehci)->flags))) {
818                 status = -ESHUTDOWN;
819                 goto done_not_linked;
820         }
821         status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
822         if (unlikely(status))
823                 goto done_not_linked;
824
825         /* get qh and force any scheduling errors */
826         INIT_LIST_HEAD (&empty);
827         qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
828         if (qh == NULL) {
829                 status = -ENOMEM;
830                 goto done;
831         }
832         if (qh->qh_state == QH_STATE_IDLE) {
833                 if ((status = qh_schedule (ehci, qh)) != 0)
834                         goto done;
835         }
836
837         /* then queue the urb's tds to the qh */
838         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
839         BUG_ON (qh == NULL);
840
841         /* ... update usbfs periodic stats */
842         ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
843
844 done:
845         if (unlikely(status))
846                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
847 done_not_linked:
848         spin_unlock_irqrestore (&ehci->lock, flags);
849         if (status)
850                 qtd_list_free (ehci, urb, qtd_list);
851
852         return status;
853 }
854
855 /*-------------------------------------------------------------------------*/
856
857 /* ehci_iso_stream ops work with both ITD and SITD */
858
859 static struct ehci_iso_stream *
860 iso_stream_alloc (gfp_t mem_flags)
861 {
862         struct ehci_iso_stream *stream;
863
864         stream = kzalloc(sizeof *stream, mem_flags);
865         if (likely (stream != NULL)) {
866                 INIT_LIST_HEAD(&stream->td_list);
867                 INIT_LIST_HEAD(&stream->free_list);
868                 stream->next_uframe = -1;
869                 stream->refcount = 1;
870         }
871         return stream;
872 }
873
874 static void
875 iso_stream_init (
876         struct ehci_hcd         *ehci,
877         struct ehci_iso_stream  *stream,
878         struct usb_device       *dev,
879         int                     pipe,
880         unsigned                interval
881 )
882 {
883         static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
884
885         u32                     buf1;
886         unsigned                epnum, maxp;
887         int                     is_input;
888         long                    bandwidth;
889
890         /*
891          * this might be a "high bandwidth" highspeed endpoint,
892          * as encoded in the ep descriptor's wMaxPacket field
893          */
894         epnum = usb_pipeendpoint (pipe);
895         is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
896         maxp = usb_maxpacket(dev, pipe, !is_input);
897         if (is_input) {
898                 buf1 = (1 << 11);
899         } else {
900                 buf1 = 0;
901         }
902
903         /* knows about ITD vs SITD */
904         if (dev->speed == USB_SPEED_HIGH) {
905                 unsigned multi = hb_mult(maxp);
906
907                 stream->highspeed = 1;
908
909                 maxp = max_packet(maxp);
910                 buf1 |= maxp;
911                 maxp *= multi;
912
913                 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
914                 stream->buf1 = cpu_to_hc32(ehci, buf1);
915                 stream->buf2 = cpu_to_hc32(ehci, multi);
916
917                 /* usbfs wants to report the average usecs per frame tied up
918                  * when transfers on this endpoint are scheduled ...
919                  */
920                 stream->usecs = HS_USECS_ISO (maxp);
921                 bandwidth = stream->usecs * 8;
922                 bandwidth /= 1 << (interval - 1);
923
924         } else {
925                 u32             addr;
926                 int             think_time;
927                 int             hs_transfers;
928
929                 addr = dev->ttport << 24;
930                 if (!ehci_is_TDI(ehci)
931                                 || (dev->tt->hub !=
932                                         ehci_to_hcd(ehci)->self.root_hub))
933                         addr |= dev->tt->hub->devnum << 16;
934                 addr |= epnum << 8;
935                 addr |= dev->devnum;
936                 stream->usecs = HS_USECS_ISO (maxp);
937                 think_time = dev->tt ? dev->tt->think_time : 0;
938                 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
939                                 dev->speed, is_input, 1, maxp));
940                 hs_transfers = max (1u, (maxp + 187) / 188);
941                 if (is_input) {
942                         u32     tmp;
943
944                         addr |= 1 << 31;
945                         stream->c_usecs = stream->usecs;
946                         stream->usecs = HS_USECS_ISO (1);
947                         stream->raw_mask = 1;
948
949                         /* c-mask as specified in USB 2.0 11.18.4 3.c */
950                         tmp = (1 << (hs_transfers + 2)) - 1;
951                         stream->raw_mask |= tmp << (8 + 2);
952                 } else
953                         stream->raw_mask = smask_out [hs_transfers - 1];
954                 bandwidth = stream->usecs + stream->c_usecs;
955                 bandwidth /= 1 << (interval + 2);
956
957                 /* stream->splits gets created from raw_mask later */
958                 stream->address = cpu_to_hc32(ehci, addr);
959         }
960         stream->bandwidth = bandwidth;
961
962         stream->udev = dev;
963
964         stream->bEndpointAddress = is_input | epnum;
965         stream->interval = interval;
966         stream->maxp = maxp;
967 }
968
969 static void
970 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
971 {
972         stream->refcount--;
973
974         /* free whenever just a dev->ep reference remains.
975          * not like a QH -- no persistent state (toggle, halt)
976          */
977         if (stream->refcount == 1) {
978                 int             is_in;
979
980                 // BUG_ON (!list_empty(&stream->td_list));
981
982                 while (!list_empty (&stream->free_list)) {
983                         struct list_head        *entry;
984
985                         entry = stream->free_list.next;
986                         list_del (entry);
987
988                         /* knows about ITD vs SITD */
989                         if (stream->highspeed) {
990                                 struct ehci_itd         *itd;
991
992                                 itd = list_entry (entry, struct ehci_itd,
993                                                 itd_list);
994                                 dma_pool_free (ehci->itd_pool, itd,
995                                                 itd->itd_dma);
996                         } else {
997                                 struct ehci_sitd        *sitd;
998
999                                 sitd = list_entry (entry, struct ehci_sitd,
1000                                                 sitd_list);
1001                                 dma_pool_free (ehci->sitd_pool, sitd,
1002                                                 sitd->sitd_dma);
1003                         }
1004                 }
1005
1006                 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
1007                 stream->bEndpointAddress &= 0x0f;
1008                 stream->ep->hcpriv = NULL;
1009
1010                 if (stream->rescheduled) {
1011                         ehci_info (ehci, "ep%d%s-iso rescheduled "
1012                                 "%lu times in %lu seconds\n",
1013                                 stream->bEndpointAddress, is_in ? "in" : "out",
1014                                 stream->rescheduled,
1015                                 ((jiffies - stream->start)/HZ)
1016                                 );
1017                 }
1018
1019                 kfree(stream);
1020         }
1021 }
1022
1023 static inline struct ehci_iso_stream *
1024 iso_stream_get (struct ehci_iso_stream *stream)
1025 {
1026         if (likely (stream != NULL))
1027                 stream->refcount++;
1028         return stream;
1029 }
1030
1031 static struct ehci_iso_stream *
1032 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1033 {
1034         unsigned                epnum;
1035         struct ehci_iso_stream  *stream;
1036         struct usb_host_endpoint *ep;
1037         unsigned long           flags;
1038
1039         epnum = usb_pipeendpoint (urb->pipe);
1040         if (usb_pipein(urb->pipe))
1041                 ep = urb->dev->ep_in[epnum];
1042         else
1043                 ep = urb->dev->ep_out[epnum];
1044
1045         spin_lock_irqsave (&ehci->lock, flags);
1046         stream = ep->hcpriv;
1047
1048         if (unlikely (stream == NULL)) {
1049                 stream = iso_stream_alloc(GFP_ATOMIC);
1050                 if (likely (stream != NULL)) {
1051                         /* dev->ep owns the initial refcount */
1052                         ep->hcpriv = stream;
1053                         stream->ep = ep;
1054                         iso_stream_init(ehci, stream, urb->dev, urb->pipe,
1055                                         urb->interval);
1056                 }
1057
1058         /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
1059         } else if (unlikely (stream->hw_info1 != 0)) {
1060                 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
1061                         urb->dev->devpath, epnum,
1062                         usb_pipein(urb->pipe) ? "in" : "out");
1063                 stream = NULL;
1064         }
1065
1066         /* caller guarantees an eventual matching iso_stream_put */
1067         stream = iso_stream_get (stream);
1068
1069         spin_unlock_irqrestore (&ehci->lock, flags);
1070         return stream;
1071 }
1072
1073 /*-------------------------------------------------------------------------*/
1074
1075 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1076
1077 static struct ehci_iso_sched *
1078 iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1079 {
1080         struct ehci_iso_sched   *iso_sched;
1081         int                     size = sizeof *iso_sched;
1082
1083         size += packets * sizeof (struct ehci_iso_packet);
1084         iso_sched = kzalloc(size, mem_flags);
1085         if (likely (iso_sched != NULL)) {
1086                 INIT_LIST_HEAD (&iso_sched->td_list);
1087         }
1088         return iso_sched;
1089 }
1090
1091 static inline void
1092 itd_sched_init(
1093         struct ehci_hcd         *ehci,
1094         struct ehci_iso_sched   *iso_sched,
1095         struct ehci_iso_stream  *stream,
1096         struct urb              *urb
1097 )
1098 {
1099         unsigned        i;
1100         dma_addr_t      dma = urb->transfer_dma;
1101
1102         /* how many uframes are needed for these transfers */
1103         iso_sched->span = urb->number_of_packets * stream->interval;
1104
1105         /* figure out per-uframe itd fields that we'll need later
1106          * when we fit new itds into the schedule.
1107          */
1108         for (i = 0; i < urb->number_of_packets; i++) {
1109                 struct ehci_iso_packet  *uframe = &iso_sched->packet [i];
1110                 unsigned                length;
1111                 dma_addr_t              buf;
1112                 u32                     trans;
1113
1114                 length = urb->iso_frame_desc [i].length;
1115                 buf = dma + urb->iso_frame_desc [i].offset;
1116
1117                 trans = EHCI_ISOC_ACTIVE;
1118                 trans |= buf & 0x0fff;
1119                 if (unlikely (((i + 1) == urb->number_of_packets))
1120                                 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1121                         trans |= EHCI_ITD_IOC;
1122                 trans |= length << 16;
1123                 uframe->transaction = cpu_to_hc32(ehci, trans);
1124
1125                 /* might need to cross a buffer page within a uframe */
1126                 uframe->bufp = (buf & ~(u64)0x0fff);
1127                 buf += length;
1128                 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
1129                         uframe->cross = 1;
1130         }
1131 }
1132
1133 static void
1134 iso_sched_free (
1135         struct ehci_iso_stream  *stream,
1136         struct ehci_iso_sched   *iso_sched
1137 )
1138 {
1139         if (!iso_sched)
1140                 return;
1141         // caller must hold ehci->lock!
1142         list_splice (&iso_sched->td_list, &stream->free_list);
1143         kfree (iso_sched);
1144 }
1145
1146 static int
1147 itd_urb_transaction (
1148         struct ehci_iso_stream  *stream,
1149         struct ehci_hcd         *ehci,
1150         struct urb              *urb,
1151         gfp_t                   mem_flags
1152 )
1153 {
1154         struct ehci_itd         *itd;
1155         dma_addr_t              itd_dma;
1156         int                     i;
1157         unsigned                num_itds;
1158         struct ehci_iso_sched   *sched;
1159         unsigned long           flags;
1160
1161         sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1162         if (unlikely (sched == NULL))
1163                 return -ENOMEM;
1164
1165         itd_sched_init(ehci, sched, stream, urb);
1166
1167         if (urb->interval < 8)
1168                 num_itds = 1 + (sched->span + 7) / 8;
1169         else
1170                 num_itds = urb->number_of_packets;
1171
1172         /* allocate/init ITDs */
1173         spin_lock_irqsave (&ehci->lock, flags);
1174         for (i = 0; i < num_itds; i++) {
1175
1176                 /* free_list.next might be cache-hot ... but maybe
1177                  * the HC caches it too. avoid that issue for now.
1178                  */
1179
1180                 /* prefer previously-allocated itds */
1181                 if (likely (!list_empty(&stream->free_list))) {
1182                         itd = list_entry (stream->free_list.prev,
1183                                         struct ehci_itd, itd_list);
1184                         list_del (&itd->itd_list);
1185                         itd_dma = itd->itd_dma;
1186                 } else
1187                         itd = NULL;
1188
1189                 if (!itd) {
1190                         spin_unlock_irqrestore (&ehci->lock, flags);
1191                         itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
1192                                         &itd_dma);
1193                         spin_lock_irqsave (&ehci->lock, flags);
1194                 }
1195
1196                 if (unlikely (NULL == itd)) {
1197                         iso_sched_free (stream, sched);
1198                         spin_unlock_irqrestore (&ehci->lock, flags);
1199                         return -ENOMEM;
1200                 }
1201                 memset (itd, 0, sizeof *itd);
1202                 itd->itd_dma = itd_dma;
1203                 list_add (&itd->itd_list, &sched->td_list);
1204         }
1205         spin_unlock_irqrestore (&ehci->lock, flags);
1206
1207         /* temporarily store schedule info in hcpriv */
1208         urb->hcpriv = sched;
1209         urb->error_count = 0;
1210         return 0;
1211 }
1212
1213 /*-------------------------------------------------------------------------*/
1214
1215 static inline int
1216 itd_slot_ok (
1217         struct ehci_hcd         *ehci,
1218         u32                     mod,
1219         u32                     uframe,
1220         u8                      usecs,
1221         u32                     period
1222 )
1223 {
1224         uframe %= period;
1225         do {
1226                 /* can't commit more than 80% periodic == 100 usec */
1227                 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1228                                 > (100 - usecs))
1229                         return 0;
1230
1231                 /* we know urb->interval is 2^N uframes */
1232                 uframe += period;
1233         } while (uframe < mod);
1234         return 1;
1235 }
1236
1237 static inline int
1238 sitd_slot_ok (
1239         struct ehci_hcd         *ehci,
1240         u32                     mod,
1241         struct ehci_iso_stream  *stream,
1242         u32                     uframe,
1243         struct ehci_iso_sched   *sched,
1244         u32                     period_uframes
1245 )
1246 {
1247         u32                     mask, tmp;
1248         u32                     frame, uf;
1249
1250         mask = stream->raw_mask << (uframe & 7);
1251
1252         /* for IN, don't wrap CSPLIT into the next frame */
1253         if (mask & ~0xffff)
1254                 return 0;
1255
1256         /* this multi-pass logic is simple, but performance may
1257          * suffer when the schedule data isn't cached.
1258          */
1259
1260         /* check bandwidth */
1261         uframe %= period_uframes;
1262         do {
1263                 u32             max_used;
1264
1265                 frame = uframe >> 3;
1266                 uf = uframe & 7;
1267
1268 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1269                 /* The tt's fullspeed bus bandwidth must be available.
1270                  * tt_available scheduling guarantees 10+% for control/bulk.
1271                  */
1272                 if (!tt_available (ehci, period_uframes << 3,
1273                                 stream->udev, frame, uf, stream->tt_usecs))
1274                         return 0;
1275 #else
1276                 /* tt must be idle for start(s), any gap, and csplit.
1277                  * assume scheduling slop leaves 10+% for control/bulk.
1278                  */
1279                 if (!tt_no_collision (ehci, period_uframes << 3,
1280                                 stream->udev, frame, mask))
1281                         return 0;
1282 #endif
1283
1284                 /* check starts (OUT uses more than one) */
1285                 max_used = 100 - stream->usecs;
1286                 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1287                         if (periodic_usecs (ehci, frame, uf) > max_used)
1288                                 return 0;
1289                 }
1290
1291                 /* for IN, check CSPLIT */
1292                 if (stream->c_usecs) {
1293                         uf = uframe & 7;
1294                         max_used = 100 - stream->c_usecs;
1295                         do {
1296                                 tmp = 1 << uf;
1297                                 tmp <<= 8;
1298                                 if ((stream->raw_mask & tmp) == 0)
1299                                         continue;
1300                                 if (periodic_usecs (ehci, frame, uf)
1301                                                 > max_used)
1302                                         return 0;
1303                         } while (++uf < 8);
1304                 }
1305
1306                 /* we know urb->interval is 2^N uframes */
1307                 uframe += period_uframes;
1308         } while (uframe < mod);
1309
1310         stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
1311         return 1;
1312 }
1313
1314 /*
1315  * This scheduler plans almost as far into the future as it has actual
1316  * periodic schedule slots.  (Affected by TUNE_FLS, which defaults to
1317  * "as small as possible" to be cache-friendlier.)  That limits the size
1318  * transfers you can stream reliably; avoid more than 64 msec per urb.
1319  * Also avoid queue depths of less than ehci's worst irq latency (affected
1320  * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1321  * and other factors); or more than about 230 msec total (for portability,
1322  * given EHCI_TUNE_FLS and the slop).  Or, write a smarter scheduler!
1323  */
1324
1325 #define SCHEDULE_SLOP   10      /* frames */
1326
1327 static int
1328 iso_stream_schedule (
1329         struct ehci_hcd         *ehci,
1330         struct urb              *urb,
1331         struct ehci_iso_stream  *stream
1332 )
1333 {
1334         u32                     now, start, max, period;
1335         int                     status;
1336         unsigned                mod = ehci->periodic_size << 3;
1337         struct ehci_iso_sched   *sched = urb->hcpriv;
1338
1339         if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1340                 ehci_dbg (ehci, "iso request %p too long\n", urb);
1341                 status = -EFBIG;
1342                 goto fail;
1343         }
1344
1345         if ((stream->depth + sched->span) > mod) {
1346                 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1347                         urb, stream->depth, sched->span, mod);
1348                 status = -EFBIG;
1349                 goto fail;
1350         }
1351
1352         now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1353
1354         /* when's the last uframe this urb could start? */
1355         max = now + mod;
1356
1357         /* typical case: reuse current schedule. stream is still active,
1358          * and no gaps from host falling behind (irq delays etc)
1359          */
1360         if (likely (!list_empty (&stream->td_list))) {
1361                 start = stream->next_uframe;
1362                 if (start < now)
1363                         start += mod;
1364                 if (likely ((start + sched->span) < max))
1365                         goto ready;
1366                 /* else fell behind; someday, try to reschedule */
1367                 status = -EL2NSYNC;
1368                 goto fail;
1369         }
1370
1371         /* need to schedule; when's the next (u)frame we could start?
1372          * this is bigger than ehci->i_thresh allows; scheduling itself
1373          * isn't free, the slop should handle reasonably slow cpus.  it
1374          * can also help high bandwidth if the dma and irq loads don't
1375          * jump until after the queue is primed.
1376          */
1377         start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1378         start %= mod;
1379         stream->next_uframe = start;
1380
1381         /* NOTE:  assumes URB_ISO_ASAP, to limit complexity/bugs */
1382
1383         period = urb->interval;
1384         if (!stream->highspeed)
1385                 period <<= 3;
1386
1387         /* find a uframe slot with enough bandwidth */
1388         for (; start < (stream->next_uframe + period); start++) {
1389                 int             enough_space;
1390
1391                 /* check schedule: enough space? */
1392                 if (stream->highspeed)
1393                         enough_space = itd_slot_ok (ehci, mod, start,
1394                                         stream->usecs, period);
1395                 else {
1396                         if ((start % 8) >= 6)
1397                                 continue;
1398                         enough_space = sitd_slot_ok (ehci, mod, stream,
1399                                         start, sched, period);
1400                 }
1401
1402                 /* schedule it here if there's enough bandwidth */
1403                 if (enough_space) {
1404                         stream->next_uframe = start % mod;
1405                         goto ready;
1406                 }
1407         }
1408
1409         /* no room in the schedule */
1410         ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1411                 list_empty (&stream->td_list) ? "" : "re",
1412                 urb, now, max);
1413         status = -ENOSPC;
1414
1415 fail:
1416         iso_sched_free (stream, sched);
1417         urb->hcpriv = NULL;
1418         return status;
1419
1420 ready:
1421         /* report high speed start in uframes; full speed, in frames */
1422         urb->start_frame = stream->next_uframe;
1423         if (!stream->highspeed)
1424                 urb->start_frame >>= 3;
1425         return 0;
1426 }
1427
1428 /*-------------------------------------------------------------------------*/
1429
1430 static inline void
1431 itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1432                 struct ehci_itd *itd)
1433 {
1434         int i;
1435
1436         /* it's been recently zeroed */
1437         itd->hw_next = EHCI_LIST_END(ehci);
1438         itd->hw_bufp [0] = stream->buf0;
1439         itd->hw_bufp [1] = stream->buf1;
1440         itd->hw_bufp [2] = stream->buf2;
1441
1442         for (i = 0; i < 8; i++)
1443                 itd->index[i] = -1;
1444
1445         /* All other fields are filled when scheduling */
1446 }
1447
1448 static inline void
1449 itd_patch(
1450         struct ehci_hcd         *ehci,
1451         struct ehci_itd         *itd,
1452         struct ehci_iso_sched   *iso_sched,
1453         unsigned                index,
1454         u16                     uframe
1455 )
1456 {
1457         struct ehci_iso_packet  *uf = &iso_sched->packet [index];
1458         unsigned                pg = itd->pg;
1459
1460         // BUG_ON (pg == 6 && uf->cross);
1461
1462         uframe &= 0x07;
1463         itd->index [uframe] = index;
1464
1465         itd->hw_transaction[uframe] = uf->transaction;
1466         itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1467         itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1468         itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1469
1470         /* iso_frame_desc[].offset must be strictly increasing */
1471         if (unlikely (uf->cross)) {
1472                 u64     bufp = uf->bufp + 4096;
1473
1474                 itd->pg = ++pg;
1475                 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1476                 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1477         }
1478 }
1479
1480 static inline void
1481 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1482 {
1483         /* always prepend ITD/SITD ... only QH tree is order-sensitive */
1484         itd->itd_next = ehci->pshadow [frame];
1485         itd->hw_next = ehci->periodic [frame];
1486         ehci->pshadow [frame].itd = itd;
1487         itd->frame = frame;
1488         wmb ();
1489         ehci->periodic[frame] = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1490 }
1491
1492 /* fit urb's itds into the selected schedule slot; activate as needed */
1493 static int
1494 itd_link_urb (
1495         struct ehci_hcd         *ehci,
1496         struct urb              *urb,
1497         unsigned                mod,
1498         struct ehci_iso_stream  *stream
1499 )
1500 {
1501         int                     packet;
1502         unsigned                next_uframe, uframe, frame;
1503         struct ehci_iso_sched   *iso_sched = urb->hcpriv;
1504         struct ehci_itd         *itd;
1505
1506         next_uframe = stream->next_uframe % mod;
1507
1508         if (unlikely (list_empty(&stream->td_list))) {
1509                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1510                                 += stream->bandwidth;
1511                 ehci_vdbg (ehci,
1512                         "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1513                         urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1514                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1515                         urb->interval,
1516                         next_uframe >> 3, next_uframe & 0x7);
1517                 stream->start = jiffies;
1518         }
1519         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1520
1521         /* fill iTDs uframe by uframe */
1522         for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1523                 if (itd == NULL) {
1524                         /* ASSERT:  we have all necessary itds */
1525                         // BUG_ON (list_empty (&iso_sched->td_list));
1526
1527                         /* ASSERT:  no itds for this endpoint in this uframe */
1528
1529                         itd = list_entry (iso_sched->td_list.next,
1530                                         struct ehci_itd, itd_list);
1531                         list_move_tail (&itd->itd_list, &stream->td_list);
1532                         itd->stream = iso_stream_get (stream);
1533                         itd->urb = usb_get_urb (urb);
1534                         itd_init (ehci, stream, itd);
1535                 }
1536
1537                 uframe = next_uframe & 0x07;
1538                 frame = next_uframe >> 3;
1539
1540                 itd_patch(ehci, itd, iso_sched, packet, uframe);
1541
1542                 next_uframe += stream->interval;
1543                 stream->depth += stream->interval;
1544                 next_uframe %= mod;
1545                 packet++;
1546
1547                 /* link completed itds into the schedule */
1548                 if (((next_uframe >> 3) != frame)
1549                                 || packet == urb->number_of_packets) {
1550                         itd_link (ehci, frame % ehci->periodic_size, itd);
1551                         itd = NULL;
1552                 }
1553         }
1554         stream->next_uframe = next_uframe;
1555
1556         /* don't need that schedule data any more */
1557         iso_sched_free (stream, iso_sched);
1558         urb->hcpriv = NULL;
1559
1560         timer_action (ehci, TIMER_IO_WATCHDOG);
1561         if (unlikely (!ehci->periodic_sched++))
1562                 return enable_periodic (ehci);
1563         return 0;
1564 }
1565
1566 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1567
1568 /* Process and recycle a completed ITD.  Return true iff its urb completed,
1569  * and hence its completion callback probably added things to the hardware
1570  * schedule.
1571  *
1572  * Note that we carefully avoid recycling this descriptor until after any
1573  * completion callback runs, so that it won't be reused quickly.  That is,
1574  * assuming (a) no more than two urbs per frame on this endpoint, and also
1575  * (b) only this endpoint's completions submit URBs.  It seems some silicon
1576  * corrupts things if you reuse completed descriptors very quickly...
1577  */
1578 static unsigned
1579 itd_complete (
1580         struct ehci_hcd *ehci,
1581         struct ehci_itd *itd
1582 ) {
1583         struct urb                              *urb = itd->urb;
1584         struct usb_iso_packet_descriptor        *desc;
1585         u32                                     t;
1586         unsigned                                uframe;
1587         int                                     urb_index = -1;
1588         struct ehci_iso_stream                  *stream = itd->stream;
1589         struct usb_device                       *dev;
1590         unsigned                                retval = false;
1591
1592         /* for each uframe with a packet */
1593         for (uframe = 0; uframe < 8; uframe++) {
1594                 if (likely (itd->index[uframe] == -1))
1595                         continue;
1596                 urb_index = itd->index[uframe];
1597                 desc = &urb->iso_frame_desc [urb_index];
1598
1599                 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]);
1600                 itd->hw_transaction [uframe] = 0;
1601                 stream->depth -= stream->interval;
1602
1603                 /* report transfer status */
1604                 if (unlikely (t & ISO_ERRS)) {
1605                         urb->error_count++;
1606                         if (t & EHCI_ISOC_BUF_ERR)
1607                                 desc->status = usb_pipein (urb->pipe)
1608                                         ? -ENOSR  /* hc couldn't read */
1609                                         : -ECOMM; /* hc couldn't write */
1610                         else if (t & EHCI_ISOC_BABBLE)
1611                                 desc->status = -EOVERFLOW;
1612                         else /* (t & EHCI_ISOC_XACTERR) */
1613                                 desc->status = -EPROTO;
1614
1615                         /* HC need not update length with this error */
1616                         if (!(t & EHCI_ISOC_BABBLE))
1617                                 desc->actual_length = EHCI_ITD_LENGTH (t);
1618                 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1619                         desc->status = 0;
1620                         desc->actual_length = EHCI_ITD_LENGTH (t);
1621                 }
1622         }
1623
1624         /* handle completion now? */
1625         if (likely ((urb_index + 1) != urb->number_of_packets))
1626                 goto done;
1627
1628         /* ASSERT: it's really the last itd for this urb
1629         list_for_each_entry (itd, &stream->td_list, itd_list)
1630                 BUG_ON (itd->urb == urb);
1631          */
1632
1633         /* give urb back to the driver; completion often (re)submits */
1634         dev = urb->dev;
1635         ehci_urb_done(ehci, urb, 0);
1636         retval = true;
1637         urb = NULL;
1638         ehci->periodic_sched--;
1639         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1640
1641         if (unlikely (list_empty (&stream->td_list))) {
1642                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1643                                 -= stream->bandwidth;
1644                 ehci_vdbg (ehci,
1645                         "deschedule devp %s ep%d%s-iso\n",
1646                         dev->devpath, stream->bEndpointAddress & 0x0f,
1647                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1648         }
1649         iso_stream_put (ehci, stream);
1650         /* OK to recycle this ITD now that its completion callback ran. */
1651 done:
1652         usb_put_urb(urb);
1653         itd->urb = NULL;
1654         itd->stream = NULL;
1655         list_move(&itd->itd_list, &stream->free_list);
1656         iso_stream_put(ehci, stream);
1657
1658         return retval;
1659 }
1660
1661 /*-------------------------------------------------------------------------*/
1662
1663 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1664         gfp_t mem_flags)
1665 {
1666         int                     status = -EINVAL;
1667         unsigned long           flags;
1668         struct ehci_iso_stream  *stream;
1669
1670         /* Get iso_stream head */
1671         stream = iso_stream_find (ehci, urb);
1672         if (unlikely (stream == NULL)) {
1673                 ehci_dbg (ehci, "can't get iso stream\n");
1674                 return -ENOMEM;
1675         }
1676         if (unlikely (urb->interval != stream->interval)) {
1677                 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1678                         stream->interval, urb->interval);
1679                 goto done;
1680         }
1681
1682 #ifdef EHCI_URB_TRACE
1683         ehci_dbg (ehci,
1684                 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1685                 __FUNCTION__, urb->dev->devpath, urb,
1686                 usb_pipeendpoint (urb->pipe),
1687                 usb_pipein (urb->pipe) ? "in" : "out",
1688                 urb->transfer_buffer_length,
1689                 urb->number_of_packets, urb->interval,
1690                 stream);
1691 #endif
1692
1693         /* allocate ITDs w/o locking anything */
1694         status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1695         if (unlikely (status < 0)) {
1696                 ehci_dbg (ehci, "can't init itds\n");
1697                 goto done;
1698         }
1699
1700         /* schedule ... need to lock */
1701         spin_lock_irqsave (&ehci->lock, flags);
1702         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1703                                &ehci_to_hcd(ehci)->flags))) {
1704                 status = -ESHUTDOWN;
1705                 goto done_not_linked;
1706         }
1707         status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1708         if (unlikely(status))
1709                 goto done_not_linked;
1710         status = iso_stream_schedule(ehci, urb, stream);
1711         if (likely (status == 0))
1712                 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1713         else
1714                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1715 done_not_linked:
1716         spin_unlock_irqrestore (&ehci->lock, flags);
1717
1718 done:
1719         if (unlikely (status < 0))
1720                 iso_stream_put (ehci, stream);
1721         return status;
1722 }
1723
1724 /*-------------------------------------------------------------------------*/
1725
1726 /*
1727  * "Split ISO TDs" ... used for USB 1.1 devices going through the
1728  * TTs in USB 2.0 hubs.  These need microframe scheduling.
1729  */
1730
1731 static inline void
1732 sitd_sched_init(
1733         struct ehci_hcd         *ehci,
1734         struct ehci_iso_sched   *iso_sched,
1735         struct ehci_iso_stream  *stream,
1736         struct urb              *urb
1737 )
1738 {
1739         unsigned        i;
1740         dma_addr_t      dma = urb->transfer_dma;
1741
1742         /* how many frames are needed for these transfers */
1743         iso_sched->span = urb->number_of_packets * stream->interval;
1744
1745         /* figure out per-frame sitd fields that we'll need later
1746          * when we fit new sitds into the schedule.
1747          */
1748         for (i = 0; i < urb->number_of_packets; i++) {
1749                 struct ehci_iso_packet  *packet = &iso_sched->packet [i];
1750                 unsigned                length;
1751                 dma_addr_t              buf;
1752                 u32                     trans;
1753
1754                 length = urb->iso_frame_desc [i].length & 0x03ff;
1755                 buf = dma + urb->iso_frame_desc [i].offset;
1756
1757                 trans = SITD_STS_ACTIVE;
1758                 if (((i + 1) == urb->number_of_packets)
1759                                 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1760                         trans |= SITD_IOC;
1761                 trans |= length << 16;
1762                 packet->transaction = cpu_to_hc32(ehci, trans);
1763
1764                 /* might need to cross a buffer page within a td */
1765                 packet->bufp = buf;
1766                 packet->buf1 = (buf + length) & ~0x0fff;
1767                 if (packet->buf1 != (buf & ~(u64)0x0fff))
1768                         packet->cross = 1;
1769
1770                 /* OUT uses multiple start-splits */
1771                 if (stream->bEndpointAddress & USB_DIR_IN)
1772                         continue;
1773                 length = (length + 187) / 188;
1774                 if (length > 1) /* BEGIN vs ALL */
1775                         length |= 1 << 3;
1776                 packet->buf1 |= length;
1777         }
1778 }
1779
1780 static int
1781 sitd_urb_transaction (
1782         struct ehci_iso_stream  *stream,
1783         struct ehci_hcd         *ehci,
1784         struct urb              *urb,
1785         gfp_t                   mem_flags
1786 )
1787 {
1788         struct ehci_sitd        *sitd;
1789         dma_addr_t              sitd_dma;
1790         int                     i;
1791         struct ehci_iso_sched   *iso_sched;
1792         unsigned long           flags;
1793
1794         iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1795         if (iso_sched == NULL)
1796                 return -ENOMEM;
1797
1798         sitd_sched_init(ehci, iso_sched, stream, urb);
1799
1800         /* allocate/init sITDs */
1801         spin_lock_irqsave (&ehci->lock, flags);
1802         for (i = 0; i < urb->number_of_packets; i++) {
1803
1804                 /* NOTE:  for now, we don't try to handle wraparound cases
1805                  * for IN (using sitd->hw_backpointer, like a FSTN), which
1806                  * means we never need two sitds for full speed packets.
1807                  */
1808
1809                 /* free_list.next might be cache-hot ... but maybe
1810                  * the HC caches it too. avoid that issue for now.
1811                  */
1812
1813                 /* prefer previously-allocated sitds */
1814                 if (!list_empty(&stream->free_list)) {
1815                         sitd = list_entry (stream->free_list.prev,
1816                                          struct ehci_sitd, sitd_list);
1817                         list_del (&sitd->sitd_list);
1818                         sitd_dma = sitd->sitd_dma;
1819                 } else
1820                         sitd = NULL;
1821
1822                 if (!sitd) {
1823                         spin_unlock_irqrestore (&ehci->lock, flags);
1824                         sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1825                                         &sitd_dma);
1826                         spin_lock_irqsave (&ehci->lock, flags);
1827                 }
1828
1829                 if (!sitd) {
1830                         iso_sched_free (stream, iso_sched);
1831                         spin_unlock_irqrestore (&ehci->lock, flags);
1832                         return -ENOMEM;
1833                 }
1834                 memset (sitd, 0, sizeof *sitd);
1835                 sitd->sitd_dma = sitd_dma;
1836                 list_add (&sitd->sitd_list, &iso_sched->td_list);
1837         }
1838
1839         /* temporarily store schedule info in hcpriv */
1840         urb->hcpriv = iso_sched;
1841         urb->error_count = 0;
1842
1843         spin_unlock_irqrestore (&ehci->lock, flags);
1844         return 0;
1845 }
1846
1847 /*-------------------------------------------------------------------------*/
1848
1849 static inline void
1850 sitd_patch(
1851         struct ehci_hcd         *ehci,
1852         struct ehci_iso_stream  *stream,
1853         struct ehci_sitd        *sitd,
1854         struct ehci_iso_sched   *iso_sched,
1855         unsigned                index
1856 )
1857 {
1858         struct ehci_iso_packet  *uf = &iso_sched->packet [index];
1859         u64                     bufp = uf->bufp;
1860
1861         sitd->hw_next = EHCI_LIST_END(ehci);
1862         sitd->hw_fullspeed_ep = stream->address;
1863         sitd->hw_uframe = stream->splits;
1864         sitd->hw_results = uf->transaction;
1865         sitd->hw_backpointer = EHCI_LIST_END(ehci);
1866
1867         bufp = uf->bufp;
1868         sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
1869         sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
1870
1871         sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
1872         if (uf->cross)
1873                 bufp += 4096;
1874         sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
1875         sitd->index = index;
1876 }
1877
1878 static inline void
1879 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1880 {
1881         /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1882         sitd->sitd_next = ehci->pshadow [frame];
1883         sitd->hw_next = ehci->periodic [frame];
1884         ehci->pshadow [frame].sitd = sitd;
1885         sitd->frame = frame;
1886         wmb ();
1887         ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
1888 }
1889
1890 /* fit urb's sitds into the selected schedule slot; activate as needed */
1891 static int
1892 sitd_link_urb (
1893         struct ehci_hcd         *ehci,
1894         struct urb              *urb,
1895         unsigned                mod,
1896         struct ehci_iso_stream  *stream
1897 )
1898 {
1899         int                     packet;
1900         unsigned                next_uframe;
1901         struct ehci_iso_sched   *sched = urb->hcpriv;
1902         struct ehci_sitd        *sitd;
1903
1904         next_uframe = stream->next_uframe;
1905
1906         if (list_empty(&stream->td_list)) {
1907                 /* usbfs ignores TT bandwidth */
1908                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1909                                 += stream->bandwidth;
1910                 ehci_vdbg (ehci,
1911                         "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
1912                         urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1913                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1914                         (next_uframe >> 3) % ehci->periodic_size,
1915                         stream->interval, hc32_to_cpu(ehci, stream->splits));
1916                 stream->start = jiffies;
1917         }
1918         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1919
1920         /* fill sITDs frame by frame */
1921         for (packet = 0, sitd = NULL;
1922                         packet < urb->number_of_packets;
1923                         packet++) {
1924
1925                 /* ASSERT:  we have all necessary sitds */
1926                 BUG_ON (list_empty (&sched->td_list));
1927
1928                 /* ASSERT:  no itds for this endpoint in this frame */
1929
1930                 sitd = list_entry (sched->td_list.next,
1931                                 struct ehci_sitd, sitd_list);
1932                 list_move_tail (&sitd->sitd_list, &stream->td_list);
1933                 sitd->stream = iso_stream_get (stream);
1934                 sitd->urb = usb_get_urb (urb);
1935
1936                 sitd_patch(ehci, stream, sitd, sched, packet);
1937                 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
1938                                 sitd);
1939
1940                 next_uframe += stream->interval << 3;
1941                 stream->depth += stream->interval << 3;
1942         }
1943         stream->next_uframe = next_uframe % mod;
1944
1945         /* don't need that schedule data any more */
1946         iso_sched_free (stream, sched);
1947         urb->hcpriv = NULL;
1948
1949         timer_action (ehci, TIMER_IO_WATCHDOG);
1950         if (!ehci->periodic_sched++)
1951                 return enable_periodic (ehci);
1952         return 0;
1953 }
1954
1955 /*-------------------------------------------------------------------------*/
1956
1957 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
1958                                 | SITD_STS_XACT | SITD_STS_MMF)
1959
1960 /* Process and recycle a completed SITD.  Return true iff its urb completed,
1961  * and hence its completion callback probably added things to the hardware
1962  * schedule.
1963  *
1964  * Note that we carefully avoid recycling this descriptor until after any
1965  * completion callback runs, so that it won't be reused quickly.  That is,
1966  * assuming (a) no more than two urbs per frame on this endpoint, and also
1967  * (b) only this endpoint's completions submit URBs.  It seems some silicon
1968  * corrupts things if you reuse completed descriptors very quickly...
1969  */
1970 static unsigned
1971 sitd_complete (
1972         struct ehci_hcd         *ehci,
1973         struct ehci_sitd        *sitd
1974 ) {
1975         struct urb                              *urb = sitd->urb;
1976         struct usb_iso_packet_descriptor        *desc;
1977         u32                                     t;
1978         int                                     urb_index = -1;
1979         struct ehci_iso_stream                  *stream = sitd->stream;
1980         struct usb_device                       *dev;
1981         unsigned                                retval = false;
1982
1983         urb_index = sitd->index;
1984         desc = &urb->iso_frame_desc [urb_index];
1985         t = hc32_to_cpup(ehci, &sitd->hw_results);
1986
1987         /* report transfer status */
1988         if (t & SITD_ERRS) {
1989                 urb->error_count++;
1990                 if (t & SITD_STS_DBE)
1991                         desc->status = usb_pipein (urb->pipe)
1992                                 ? -ENOSR  /* hc couldn't read */
1993                                 : -ECOMM; /* hc couldn't write */
1994                 else if (t & SITD_STS_BABBLE)
1995                         desc->status = -EOVERFLOW;
1996                 else /* XACT, MMF, etc */
1997                         desc->status = -EPROTO;
1998         } else {
1999                 desc->status = 0;
2000                 desc->actual_length = desc->length - SITD_LENGTH (t);
2001         }
2002         stream->depth -= stream->interval << 3;
2003
2004         /* handle completion now? */
2005         if ((urb_index + 1) != urb->number_of_packets)
2006                 goto done;
2007
2008         /* ASSERT: it's really the last sitd for this urb
2009         list_for_each_entry (sitd, &stream->td_list, sitd_list)
2010                 BUG_ON (sitd->urb == urb);
2011          */
2012
2013         /* give urb back to the driver; completion often (re)submits */
2014         dev = urb->dev;
2015         ehci_urb_done(ehci, urb, 0);
2016         retval = true;
2017         urb = NULL;
2018         ehci->periodic_sched--;
2019         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2020
2021         if (list_empty (&stream->td_list)) {
2022                 ehci_to_hcd(ehci)->self.bandwidth_allocated
2023                                 -= stream->bandwidth;
2024                 ehci_vdbg (ehci,
2025                         "deschedule devp %s ep%d%s-iso\n",
2026                         dev->devpath, stream->bEndpointAddress & 0x0f,
2027                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
2028         }
2029         iso_stream_put (ehci, stream);
2030         /* OK to recycle this SITD now that its completion callback ran. */
2031 done:
2032         usb_put_urb(urb);
2033         sitd->urb = NULL;
2034         sitd->stream = NULL;
2035         list_move(&sitd->sitd_list, &stream->free_list);
2036         iso_stream_put(ehci, stream);
2037
2038         return retval;
2039 }
2040
2041
2042 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2043         gfp_t mem_flags)
2044 {
2045         int                     status = -EINVAL;
2046         unsigned long           flags;
2047         struct ehci_iso_stream  *stream;
2048
2049         /* Get iso_stream head */
2050         stream = iso_stream_find (ehci, urb);
2051         if (stream == NULL) {
2052                 ehci_dbg (ehci, "can't get iso stream\n");
2053                 return -ENOMEM;
2054         }
2055         if (urb->interval != stream->interval) {
2056                 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
2057                         stream->interval, urb->interval);
2058                 goto done;
2059         }
2060
2061 #ifdef EHCI_URB_TRACE
2062         ehci_dbg (ehci,
2063                 "submit %p dev%s ep%d%s-iso len %d\n",
2064                 urb, urb->dev->devpath,
2065                 usb_pipeendpoint (urb->pipe),
2066                 usb_pipein (urb->pipe) ? "in" : "out",
2067                 urb->transfer_buffer_length);
2068 #endif
2069
2070         /* allocate SITDs */
2071         status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
2072         if (status < 0) {
2073                 ehci_dbg (ehci, "can't init sitds\n");
2074                 goto done;
2075         }
2076
2077         /* schedule ... need to lock */
2078         spin_lock_irqsave (&ehci->lock, flags);
2079         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
2080                                &ehci_to_hcd(ehci)->flags))) {
2081                 status = -ESHUTDOWN;
2082                 goto done_not_linked;
2083         }
2084         status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2085         if (unlikely(status))
2086                 goto done_not_linked;
2087         status = iso_stream_schedule(ehci, urb, stream);
2088         if (status == 0)
2089                 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
2090         else
2091                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2092 done_not_linked:
2093         spin_unlock_irqrestore (&ehci->lock, flags);
2094
2095 done:
2096         if (status < 0)
2097                 iso_stream_put (ehci, stream);
2098         return status;
2099 }
2100
2101 /*-------------------------------------------------------------------------*/
2102
2103 static void
2104 scan_periodic (struct ehci_hcd *ehci)
2105 {
2106         unsigned        frame, clock, now_uframe, mod;
2107         unsigned        modified;
2108
2109         mod = ehci->periodic_size << 3;
2110
2111         /*
2112          * When running, scan from last scan point up to "now"
2113          * else clean up by scanning everything that's left.
2114          * Touches as few pages as possible:  cache-friendly.
2115          */
2116         now_uframe = ehci->next_uframe;
2117         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
2118                 clock = ehci_readl(ehci, &ehci->regs->frame_index);
2119         else
2120                 clock = now_uframe + mod - 1;
2121         clock %= mod;
2122
2123         for (;;) {
2124                 union ehci_shadow       q, *q_p;
2125                 __hc32                  type, *hw_p;
2126                 unsigned                incomplete = false;
2127
2128                 frame = now_uframe >> 3;
2129
2130 restart:
2131                 /* scan each element in frame's queue for completions */
2132                 q_p = &ehci->pshadow [frame];
2133                 hw_p = &ehci->periodic [frame];
2134                 q.ptr = q_p->ptr;
2135                 type = Q_NEXT_TYPE(ehci, *hw_p);
2136                 modified = 0;
2137
2138                 while (q.ptr != NULL) {
2139                         unsigned                uf;
2140                         union ehci_shadow       temp;
2141                         int                     live;
2142
2143                         live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
2144                         switch (hc32_to_cpu(ehci, type)) {
2145                         case Q_TYPE_QH:
2146                                 /* handle any completions */
2147                                 temp.qh = qh_get (q.qh);
2148                                 type = Q_NEXT_TYPE(ehci, q.qh->hw_next);
2149                                 q = q.qh->qh_next;
2150                                 modified = qh_completions (ehci, temp.qh);
2151                                 if (unlikely (list_empty (&temp.qh->qtd_list)))
2152                                         intr_deschedule (ehci, temp.qh);
2153                                 qh_put (temp.qh);
2154                                 break;
2155                         case Q_TYPE_FSTN:
2156                                 /* for "save place" FSTNs, look at QH entries
2157                                  * in the previous frame for completions.
2158                                  */
2159                                 if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) {
2160                                         dbg ("ignoring completions from FSTNs");
2161                                 }
2162                                 type = Q_NEXT_TYPE(ehci, q.fstn->hw_next);
2163                                 q = q.fstn->fstn_next;
2164                                 break;
2165                         case Q_TYPE_ITD:
2166                                 /* If this ITD is still active, leave it for
2167                                  * later processing ... check the next entry.
2168                                  */
2169                                 rmb ();
2170                                 for (uf = 0; uf < 8 && live; uf++) {
2171                                         if (0 == (q.itd->hw_transaction [uf]
2172                                                         & ITD_ACTIVE(ehci)))
2173                                                 continue;
2174                                         incomplete = true;
2175                                         q_p = &q.itd->itd_next;
2176                                         hw_p = &q.itd->hw_next;
2177                                         type = Q_NEXT_TYPE(ehci,
2178                                                         q.itd->hw_next);
2179                                         q = *q_p;
2180                                         break;
2181                                 }
2182                                 if (uf < 8 && live)
2183                                         break;
2184
2185                                 /* Take finished ITDs out of the schedule
2186                                  * and process them:  recycle, maybe report
2187                                  * URB completion.  HC won't cache the
2188                                  * pointer for much longer, if at all.
2189                                  */
2190                                 *q_p = q.itd->itd_next;
2191                                 *hw_p = q.itd->hw_next;
2192                                 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2193                                 wmb();
2194                                 modified = itd_complete (ehci, q.itd);
2195                                 q = *q_p;
2196                                 break;
2197                         case Q_TYPE_SITD:
2198                                 /* If this SITD is still active, leave it for
2199                                  * later processing ... check the next entry.
2200                                  */
2201                                 if ((q.sitd->hw_results & SITD_ACTIVE(ehci))
2202                                                 && live) {
2203                                         incomplete = true;
2204                                         q_p = &q.sitd->sitd_next;
2205                                         hw_p = &q.sitd->hw_next;
2206                                         type = Q_NEXT_TYPE(ehci,
2207                                                         q.sitd->hw_next);
2208                                         q = *q_p;
2209                                         break;
2210                                 }
2211
2212                                 /* Take finished SITDs out of the schedule
2213                                  * and process them:  recycle, maybe report
2214                                  * URB completion.
2215                                  */
2216                                 *q_p = q.sitd->sitd_next;
2217                                 *hw_p = q.sitd->hw_next;
2218                                 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2219                                 wmb();
2220                                 modified = sitd_complete (ehci, q.sitd);
2221                                 q = *q_p;
2222                                 break;
2223                         default:
2224                                 dbg ("corrupt type %d frame %d shadow %p",
2225                                         type, frame, q.ptr);
2226                                 // BUG ();
2227                                 q.ptr = NULL;
2228                         }
2229
2230                         /* assume completion callbacks modify the queue */
2231                         if (unlikely (modified)) {
2232                                 if (likely(ehci->periodic_sched > 0))
2233                                         goto restart;
2234                                 /* maybe we can short-circuit this scan! */
2235                                 disable_periodic(ehci);
2236                                 now_uframe = clock;
2237                                 break;
2238                         }
2239                 }
2240
2241                 /* If we can tell we caught up to the hardware, stop now.
2242                  * We can't advance our scan without collecting the ISO
2243                  * transfers that are still pending in this frame.
2244                  */
2245                 if (incomplete && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2246                         ehci->next_uframe = now_uframe;
2247                         break;
2248                 }
2249
2250                 // FIXME:  this assumes we won't get lapped when
2251                 // latencies climb; that should be rare, but...
2252                 // detect it, and just go all the way around.
2253                 // FLR might help detect this case, so long as latencies
2254                 // don't exceed periodic_size msec (default 1.024 sec).
2255
2256                 // FIXME:  likewise assumes HC doesn't halt mid-scan
2257
2258                 if (now_uframe == clock) {
2259                         unsigned        now;
2260
2261                         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
2262                                         || ehci->periodic_sched == 0)
2263                                 break;
2264                         ehci->next_uframe = now_uframe;
2265                         now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
2266                         if (now_uframe == now)
2267                                 break;
2268
2269                         /* rescan the rest of this frame, then ... */
2270                         clock = now;
2271                 } else {
2272                         now_uframe++;
2273                         now_uframe %= mod;
2274                 }
2275         }
2276 }