3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
135 MODULE_ALIAS("platform:smc91x");
138 * The internal workings of the driver. If you are changing anything
139 * here with the SMC stuff, you should have the datasheet and know
140 * what you are doing.
142 #define CARDNAME "smc91x"
145 * Use power-down feature of the chip
150 * Wait time for memory to be free. This probably shouldn't be
151 * tuned that much, as waiting for this means nothing else happens
154 #define MEMORY_WAIT_TIME 16
157 * The maximum number of processing loops allowed for each call to the
160 #define MAX_IRQ_LOOPS 8
163 * This selects whether TX packets are sent one by one to the SMC91x internal
164 * memory and throttled until transmission completes. This may prevent
165 * RX overruns a litle by keeping much of the memory free for RX packets
166 * but to the expense of reduced TX throughput and increased IRQ overhead.
167 * Note this is not a cure for a too slow data bus or too high IRQ latency.
169 #define THROTTLE_TX_PKTS 0
172 * The MII clock high/low times. 2x this number gives the MII clock period
173 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
178 #define DBG(n, args...) \
180 if (SMC_DEBUG >= (n)) \
184 #define PRINTK(args...) printk(args)
186 #define DBG(n, args...) do { } while(0)
187 #define PRINTK(args...) printk(KERN_DEBUG args)
191 static void PRINT_PKT(u_char *buf, int length)
198 remainder = length % 16;
200 for (i = 0; i < lines ; i ++) {
202 for (cur = 0; cur < 8; cur++) {
206 printk("%02x%02x ", a, b);
210 for (i = 0; i < remainder/2 ; i++) {
214 printk("%02x%02x ", a, b);
219 #define PRINT_PKT(x...) do { } while(0)
223 /* this enables an interrupt in the interrupt mask register */
224 #define SMC_ENABLE_INT(lp, x) do { \
225 unsigned char mask; \
226 spin_lock_irq(&lp->lock); \
227 mask = SMC_GET_INT_MASK(lp); \
229 SMC_SET_INT_MASK(lp, mask); \
230 spin_unlock_irq(&lp->lock); \
233 /* this disables an interrupt from the interrupt mask register */
234 #define SMC_DISABLE_INT(lp, x) do { \
235 unsigned char mask; \
236 spin_lock_irq(&lp->lock); \
237 mask = SMC_GET_INT_MASK(lp); \
239 SMC_SET_INT_MASK(lp, mask); \
240 spin_unlock_irq(&lp->lock); \
244 * Wait while MMU is busy. This is usually in the order of a few nanosecs
245 * if at all, but let's avoid deadlocking the system if the hardware
246 * decides to go south.
248 #define SMC_WAIT_MMU_BUSY(lp) do { \
249 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
250 unsigned long timeout = jiffies + 2; \
251 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
252 if (time_after(jiffies, timeout)) { \
253 printk("%s: timeout %s line %d\n", \
254 dev->name, __FILE__, __LINE__); \
264 * this does a soft reset on the device
266 static void smc_reset(struct net_device *dev)
268 struct smc_local *lp = netdev_priv(dev);
269 void __iomem *ioaddr = lp->base;
270 unsigned int ctl, cfg;
271 struct sk_buff *pending_skb;
273 DBG(2, "%s: %s\n", dev->name, __func__);
275 /* Disable all interrupts, block TX tasklet */
276 spin_lock_irq(&lp->lock);
277 SMC_SELECT_BANK(lp, 2);
278 SMC_SET_INT_MASK(lp, 0);
279 pending_skb = lp->pending_tx_skb;
280 lp->pending_tx_skb = NULL;
281 spin_unlock_irq(&lp->lock);
283 /* free any pending tx skb */
285 dev_kfree_skb(pending_skb);
286 dev->stats.tx_errors++;
287 dev->stats.tx_aborted_errors++;
291 * This resets the registers mostly to defaults, but doesn't
292 * affect EEPROM. That seems unnecessary
294 SMC_SELECT_BANK(lp, 0);
295 SMC_SET_RCR(lp, RCR_SOFTRST);
298 * Setup the Configuration Register
299 * This is necessary because the CONFIG_REG is not affected
302 SMC_SELECT_BANK(lp, 1);
304 cfg = CONFIG_DEFAULT;
307 * Setup for fast accesses if requested. If the card/system
308 * can't handle it then there will be no recovery except for
309 * a hard reset or power cycle
311 if (lp->cfg.flags & SMC91X_NOWAIT)
312 cfg |= CONFIG_NO_WAIT;
315 * Release from possible power-down state
316 * Configuration register is not affected by Soft Reset
318 cfg |= CONFIG_EPH_POWER_EN;
320 SMC_SET_CONFIG(lp, cfg);
322 /* this should pause enough for the chip to be happy */
324 * elaborate? What does the chip _need_? --jgarzik
326 * This seems to be undocumented, but something the original
327 * driver(s) have always done. Suspect undocumented timing
328 * info/determined empirically. --rmk
332 /* Disable transmit and receive functionality */
333 SMC_SELECT_BANK(lp, 0);
334 SMC_SET_RCR(lp, RCR_CLEAR);
335 SMC_SET_TCR(lp, TCR_CLEAR);
337 SMC_SELECT_BANK(lp, 1);
338 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
341 * Set the control register to automatically release successfully
342 * transmitted packets, to make the best use out of our limited
345 if(!THROTTLE_TX_PKTS)
346 ctl |= CTL_AUTO_RELEASE;
348 ctl &= ~CTL_AUTO_RELEASE;
349 SMC_SET_CTL(lp, ctl);
352 SMC_SELECT_BANK(lp, 2);
353 SMC_SET_MMU_CMD(lp, MC_RESET);
354 SMC_WAIT_MMU_BUSY(lp);
358 * Enable Interrupts, Receive, and Transmit
360 static void smc_enable(struct net_device *dev)
362 struct smc_local *lp = netdev_priv(dev);
363 void __iomem *ioaddr = lp->base;
366 DBG(2, "%s: %s\n", dev->name, __func__);
368 /* see the header file for options in TCR/RCR DEFAULT */
369 SMC_SELECT_BANK(lp, 0);
370 SMC_SET_TCR(lp, lp->tcr_cur_mode);
371 SMC_SET_RCR(lp, lp->rcr_cur_mode);
373 SMC_SELECT_BANK(lp, 1);
374 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
376 /* now, enable interrupts */
377 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
378 if (lp->version >= (CHIP_91100 << 4))
380 SMC_SELECT_BANK(lp, 2);
381 SMC_SET_INT_MASK(lp, mask);
384 * From this point the register bank must _NOT_ be switched away
385 * to something else than bank 2 without proper locking against
386 * races with any tasklet or interrupt handlers until smc_shutdown()
387 * or smc_reset() is called.
392 * this puts the device in an inactive state
394 static void smc_shutdown(struct net_device *dev)
396 struct smc_local *lp = netdev_priv(dev);
397 void __iomem *ioaddr = lp->base;
398 struct sk_buff *pending_skb;
400 DBG(2, "%s: %s\n", CARDNAME, __func__);
402 /* no more interrupts for me */
403 spin_lock_irq(&lp->lock);
404 SMC_SELECT_BANK(lp, 2);
405 SMC_SET_INT_MASK(lp, 0);
406 pending_skb = lp->pending_tx_skb;
407 lp->pending_tx_skb = NULL;
408 spin_unlock_irq(&lp->lock);
410 dev_kfree_skb(pending_skb);
412 /* and tell the card to stay away from that nasty outside world */
413 SMC_SELECT_BANK(lp, 0);
414 SMC_SET_RCR(lp, RCR_CLEAR);
415 SMC_SET_TCR(lp, TCR_CLEAR);
418 /* finally, shut the chip down */
419 SMC_SELECT_BANK(lp, 1);
420 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
425 * This is the procedure to handle the receipt of a packet.
427 static inline void smc_rcv(struct net_device *dev)
429 struct smc_local *lp = netdev_priv(dev);
430 void __iomem *ioaddr = lp->base;
431 unsigned int packet_number, status, packet_len;
433 DBG(3, "%s: %s\n", dev->name, __func__);
435 packet_number = SMC_GET_RXFIFO(lp);
436 if (unlikely(packet_number & RXFIFO_REMPTY)) {
437 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
441 /* read from start of packet */
442 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
444 /* First two words are status and packet length */
445 SMC_GET_PKT_HDR(lp, status, packet_len);
446 packet_len &= 0x07ff; /* mask off top bits */
447 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
448 dev->name, packet_number, status,
449 packet_len, packet_len);
452 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
453 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
454 /* accept VLAN packets */
455 status &= ~RS_TOOLONG;
458 if (packet_len < 6) {
459 /* bloody hardware */
460 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
461 dev->name, packet_len, status);
462 status |= RS_TOOSHORT;
464 SMC_WAIT_MMU_BUSY(lp);
465 SMC_SET_MMU_CMD(lp, MC_RELEASE);
466 dev->stats.rx_errors++;
467 if (status & RS_ALGNERR)
468 dev->stats.rx_frame_errors++;
469 if (status & (RS_TOOSHORT | RS_TOOLONG))
470 dev->stats.rx_length_errors++;
471 if (status & RS_BADCRC)
472 dev->stats.rx_crc_errors++;
476 unsigned int data_len;
478 /* set multicast stats */
479 if (status & RS_MULTICAST)
480 dev->stats.multicast++;
483 * Actual payload is packet_len - 6 (or 5 if odd byte).
484 * We want skb_reserve(2) and the final ctrl word
485 * (2 bytes, possibly containing the payload odd byte).
486 * Furthermore, we add 2 bytes to allow rounding up to
487 * multiple of 4 bytes on 32 bit buses.
488 * Hence packet_len - 6 + 2 + 2 + 2.
490 skb = dev_alloc_skb(packet_len);
491 if (unlikely(skb == NULL)) {
492 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
494 SMC_WAIT_MMU_BUSY(lp);
495 SMC_SET_MMU_CMD(lp, MC_RELEASE);
496 dev->stats.rx_dropped++;
500 /* Align IP header to 32 bits */
503 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
504 if (lp->version == 0x90)
505 status |= RS_ODDFRAME;
508 * If odd length: packet_len - 5,
509 * otherwise packet_len - 6.
510 * With the trailing ctrl byte it's packet_len - 4.
512 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
513 data = skb_put(skb, data_len);
514 SMC_PULL_DATA(lp, data, packet_len - 4);
516 SMC_WAIT_MMU_BUSY(lp);
517 SMC_SET_MMU_CMD(lp, MC_RELEASE);
519 PRINT_PKT(data, packet_len - 4);
521 dev->last_rx = jiffies;
522 skb->protocol = eth_type_trans(skb, dev);
524 dev->stats.rx_packets++;
525 dev->stats.rx_bytes += data_len;
531 * On SMP we have the following problem:
533 * A = smc_hardware_send_pkt()
534 * B = smc_hard_start_xmit()
535 * C = smc_interrupt()
537 * A and B can never be executed simultaneously. However, at least on UP,
538 * it is possible (and even desirable) for C to interrupt execution of
539 * A or B in order to have better RX reliability and avoid overruns.
540 * C, just like A and B, must have exclusive access to the chip and
541 * each of them must lock against any other concurrent access.
542 * Unfortunately this is not possible to have C suspend execution of A or
543 * B taking place on another CPU. On UP this is no an issue since A and B
544 * are run from softirq context and C from hard IRQ context, and there is
545 * no other CPU where concurrent access can happen.
546 * If ever there is a way to force at least B and C to always be executed
547 * on the same CPU then we could use read/write locks to protect against
548 * any other concurrent access and C would always interrupt B. But life
549 * isn't that easy in a SMP world...
551 #define smc_special_trylock(lock) \
554 local_irq_disable(); \
555 __ret = spin_trylock(lock); \
557 local_irq_enable(); \
560 #define smc_special_lock(lock) spin_lock_irq(lock)
561 #define smc_special_unlock(lock) spin_unlock_irq(lock)
563 #define smc_special_trylock(lock) (1)
564 #define smc_special_lock(lock) do { } while (0)
565 #define smc_special_unlock(lock) do { } while (0)
569 * This is called to actually send a packet to the chip.
571 static void smc_hardware_send_pkt(unsigned long data)
573 struct net_device *dev = (struct net_device *)data;
574 struct smc_local *lp = netdev_priv(dev);
575 void __iomem *ioaddr = lp->base;
577 unsigned int packet_no, len;
580 DBG(3, "%s: %s\n", dev->name, __func__);
582 if (!smc_special_trylock(&lp->lock)) {
583 netif_stop_queue(dev);
584 tasklet_schedule(&lp->tx_task);
588 skb = lp->pending_tx_skb;
589 if (unlikely(!skb)) {
590 smc_special_unlock(&lp->lock);
593 lp->pending_tx_skb = NULL;
595 packet_no = SMC_GET_AR(lp);
596 if (unlikely(packet_no & AR_FAILED)) {
597 printk("%s: Memory allocation failed.\n", dev->name);
598 dev->stats.tx_errors++;
599 dev->stats.tx_fifo_errors++;
600 smc_special_unlock(&lp->lock);
604 /* point to the beginning of the packet */
605 SMC_SET_PN(lp, packet_no);
606 SMC_SET_PTR(lp, PTR_AUTOINC);
610 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
611 dev->name, packet_no, len, len, buf);
615 * Send the packet length (+6 for status words, length, and ctl.
616 * The card will pad to 64 bytes with zeroes if packet is too small.
618 SMC_PUT_PKT_HDR(lp, 0, len + 6);
620 /* send the actual data */
621 SMC_PUSH_DATA(lp, buf, len & ~1);
623 /* Send final ctl word with the last byte if there is one */
624 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
627 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
628 * have the effect of having at most one packet queued for TX
629 * in the chip's memory at all time.
631 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
632 * when memory allocation (MC_ALLOC) does not succeed right away.
634 if (THROTTLE_TX_PKTS)
635 netif_stop_queue(dev);
637 /* queue the packet for TX */
638 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
639 smc_special_unlock(&lp->lock);
641 dev->trans_start = jiffies;
642 dev->stats.tx_packets++;
643 dev->stats.tx_bytes += len;
645 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
647 done: if (!THROTTLE_TX_PKTS)
648 netif_wake_queue(dev);
654 * Since I am not sure if I will have enough room in the chip's ram
655 * to store the packet, I call this routine which either sends it
656 * now, or set the card to generates an interrupt when ready
659 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
661 struct smc_local *lp = netdev_priv(dev);
662 void __iomem *ioaddr = lp->base;
663 unsigned int numPages, poll_count, status;
665 DBG(3, "%s: %s\n", dev->name, __func__);
667 BUG_ON(lp->pending_tx_skb != NULL);
670 * The MMU wants the number of pages to be the number of 256 bytes
671 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
673 * The 91C111 ignores the size bits, but earlier models don't.
675 * Pkt size for allocating is data length +6 (for additional status
676 * words, length and ctl)
678 * If odd size then last byte is included in ctl word.
680 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
681 if (unlikely(numPages > 7)) {
682 printk("%s: Far too big packet error.\n", dev->name);
683 dev->stats.tx_errors++;
684 dev->stats.tx_dropped++;
689 smc_special_lock(&lp->lock);
691 /* now, try to allocate the memory */
692 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
695 * Poll the chip for a short amount of time in case the
696 * allocation succeeds quickly.
698 poll_count = MEMORY_WAIT_TIME;
700 status = SMC_GET_INT(lp);
701 if (status & IM_ALLOC_INT) {
702 SMC_ACK_INT(lp, IM_ALLOC_INT);
705 } while (--poll_count);
707 smc_special_unlock(&lp->lock);
709 lp->pending_tx_skb = skb;
711 /* oh well, wait until the chip finds memory later */
712 netif_stop_queue(dev);
713 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
714 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
717 * Allocation succeeded: push packet to the chip's own memory
720 smc_hardware_send_pkt((unsigned long)dev);
727 * This handles a TX interrupt, which is only called when:
728 * - a TX error occurred, or
729 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
731 static void smc_tx(struct net_device *dev)
733 struct smc_local *lp = netdev_priv(dev);
734 void __iomem *ioaddr = lp->base;
735 unsigned int saved_packet, packet_no, tx_status, pkt_len;
737 DBG(3, "%s: %s\n", dev->name, __func__);
739 /* If the TX FIFO is empty then nothing to do */
740 packet_no = SMC_GET_TXFIFO(lp);
741 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
742 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
746 /* select packet to read from */
747 saved_packet = SMC_GET_PN(lp);
748 SMC_SET_PN(lp, packet_no);
750 /* read the first word (status word) from this packet */
751 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
752 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
753 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
754 dev->name, tx_status, packet_no);
756 if (!(tx_status & ES_TX_SUC))
757 dev->stats.tx_errors++;
759 if (tx_status & ES_LOSTCARR)
760 dev->stats.tx_carrier_errors++;
762 if (tx_status & (ES_LATCOL | ES_16COL)) {
763 PRINTK("%s: %s occurred on last xmit\n", dev->name,
764 (tx_status & ES_LATCOL) ?
765 "late collision" : "too many collisions");
766 dev->stats.tx_window_errors++;
767 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
768 printk(KERN_INFO "%s: unexpectedly large number of "
769 "bad collisions. Please check duplex "
770 "setting.\n", dev->name);
774 /* kill the packet */
775 SMC_WAIT_MMU_BUSY(lp);
776 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
778 /* Don't restore Packet Number Reg until busy bit is cleared */
779 SMC_WAIT_MMU_BUSY(lp);
780 SMC_SET_PN(lp, saved_packet);
782 /* re-enable transmit */
783 SMC_SELECT_BANK(lp, 0);
784 SMC_SET_TCR(lp, lp->tcr_cur_mode);
785 SMC_SELECT_BANK(lp, 2);
789 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
791 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
793 struct smc_local *lp = netdev_priv(dev);
794 void __iomem *ioaddr = lp->base;
795 unsigned int mii_reg, mask;
797 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
800 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
806 SMC_SET_MII(lp, mii_reg);
808 SMC_SET_MII(lp, mii_reg | MII_MCLK);
813 static unsigned int smc_mii_in(struct net_device *dev, int bits)
815 struct smc_local *lp = netdev_priv(dev);
816 void __iomem *ioaddr = lp->base;
817 unsigned int mii_reg, mask, val;
819 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
820 SMC_SET_MII(lp, mii_reg);
822 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
823 if (SMC_GET_MII(lp) & MII_MDI)
826 SMC_SET_MII(lp, mii_reg);
828 SMC_SET_MII(lp, mii_reg | MII_MCLK);
836 * Reads a register from the MII Management serial interface
838 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
840 struct smc_local *lp = netdev_priv(dev);
841 void __iomem *ioaddr = lp->base;
842 unsigned int phydata;
844 SMC_SELECT_BANK(lp, 3);
847 smc_mii_out(dev, 0xffffffff, 32);
849 /* Start code (01) + read (10) + phyaddr + phyreg */
850 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
852 /* Turnaround (2bits) + phydata */
853 phydata = smc_mii_in(dev, 18);
855 /* Return to idle state */
856 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
858 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
859 __func__, phyaddr, phyreg, phydata);
861 SMC_SELECT_BANK(lp, 2);
866 * Writes a register to the MII Management serial interface
868 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
871 struct smc_local *lp = netdev_priv(dev);
872 void __iomem *ioaddr = lp->base;
874 SMC_SELECT_BANK(lp, 3);
877 smc_mii_out(dev, 0xffffffff, 32);
879 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
880 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
882 /* Return to idle state */
883 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
885 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
886 __func__, phyaddr, phyreg, phydata);
888 SMC_SELECT_BANK(lp, 2);
892 * Finds and reports the PHY address
894 static void smc_phy_detect(struct net_device *dev)
896 struct smc_local *lp = netdev_priv(dev);
899 DBG(2, "%s: %s\n", dev->name, __func__);
904 * Scan all 32 PHY addresses if necessary, starting at
905 * PHY#1 to PHY#31, and then PHY#0 last.
907 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
908 unsigned int id1, id2;
910 /* Read the PHY identifiers */
911 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
912 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
914 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
915 dev->name, id1, id2);
917 /* Make sure it is a valid identifier */
918 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
919 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
920 /* Save the PHY's address */
921 lp->mii.phy_id = phyaddr & 31;
922 lp->phy_type = id1 << 16 | id2;
929 * Sets the PHY to a configuration as determined by the user
931 static int smc_phy_fixed(struct net_device *dev)
933 struct smc_local *lp = netdev_priv(dev);
934 void __iomem *ioaddr = lp->base;
935 int phyaddr = lp->mii.phy_id;
938 DBG(3, "%s: %s\n", dev->name, __func__);
940 /* Enter Link Disable state */
941 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
942 cfg1 |= PHY_CFG1_LNKDIS;
943 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
946 * Set our fixed capabilities
947 * Disable auto-negotiation
952 bmcr |= BMCR_FULLDPLX;
954 if (lp->ctl_rspeed == 100)
955 bmcr |= BMCR_SPEED100;
957 /* Write our capabilities to the phy control register */
958 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
960 /* Re-Configure the Receive/Phy Control register */
961 SMC_SELECT_BANK(lp, 0);
962 SMC_SET_RPC(lp, lp->rpc_cur_mode);
963 SMC_SELECT_BANK(lp, 2);
969 * smc_phy_reset - reset the phy
973 * Issue a software reset for the specified PHY and
974 * wait up to 100ms for the reset to complete. We should
975 * not access the PHY for 50ms after issuing the reset.
977 * The time to wait appears to be dependent on the PHY.
979 * Must be called with lp->lock locked.
981 static int smc_phy_reset(struct net_device *dev, int phy)
983 struct smc_local *lp = netdev_priv(dev);
987 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
989 for (timeout = 2; timeout; timeout--) {
990 spin_unlock_irq(&lp->lock);
992 spin_lock_irq(&lp->lock);
994 bmcr = smc_phy_read(dev, phy, MII_BMCR);
995 if (!(bmcr & BMCR_RESET))
999 return bmcr & BMCR_RESET;
1003 * smc_phy_powerdown - powerdown phy
1006 * Power down the specified PHY
1008 static void smc_phy_powerdown(struct net_device *dev)
1010 struct smc_local *lp = netdev_priv(dev);
1012 int phy = lp->mii.phy_id;
1014 if (lp->phy_type == 0)
1017 /* We need to ensure that no calls to smc_phy_configure are
1020 cancel_work_sync(&lp->phy_configure);
1022 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1023 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1027 * smc_phy_check_media - check the media status and adjust TCR
1029 * @init: set true for initialisation
1031 * Select duplex mode depending on negotiation state. This
1032 * also updates our carrier state.
1034 static void smc_phy_check_media(struct net_device *dev, int init)
1036 struct smc_local *lp = netdev_priv(dev);
1037 void __iomem *ioaddr = lp->base;
1039 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1040 /* duplex state has changed */
1041 if (lp->mii.full_duplex) {
1042 lp->tcr_cur_mode |= TCR_SWFDUP;
1044 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1047 SMC_SELECT_BANK(lp, 0);
1048 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1053 * Configures the specified PHY through the MII management interface
1054 * using Autonegotiation.
1055 * Calls smc_phy_fixed() if the user has requested a certain config.
1056 * If RPC ANEG bit is set, the media selection is dependent purely on
1057 * the selection by the MII (either in the MII BMCR reg or the result
1058 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1059 * is controlled by the RPC SPEED and RPC DPLX bits.
1061 static void smc_phy_configure(struct work_struct *work)
1063 struct smc_local *lp =
1064 container_of(work, struct smc_local, phy_configure);
1065 struct net_device *dev = lp->dev;
1066 void __iomem *ioaddr = lp->base;
1067 int phyaddr = lp->mii.phy_id;
1068 int my_phy_caps; /* My PHY capabilities */
1069 int my_ad_caps; /* My Advertised capabilities */
1072 DBG(3, "%s:smc_program_phy()\n", dev->name);
1074 spin_lock_irq(&lp->lock);
1077 * We should not be called if phy_type is zero.
1079 if (lp->phy_type == 0)
1080 goto smc_phy_configure_exit;
1082 if (smc_phy_reset(dev, phyaddr)) {
1083 printk("%s: PHY reset timed out\n", dev->name);
1084 goto smc_phy_configure_exit;
1088 * Enable PHY Interrupts (for register 18)
1089 * Interrupts listed here are disabled
1091 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1092 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1093 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1094 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1096 /* Configure the Receive/Phy Control register */
1097 SMC_SELECT_BANK(lp, 0);
1098 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1100 /* If the user requested no auto neg, then go set his request */
1101 if (lp->mii.force_media) {
1103 goto smc_phy_configure_exit;
1106 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1107 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1109 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1110 printk(KERN_INFO "Auto negotiation NOT supported\n");
1112 goto smc_phy_configure_exit;
1115 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1117 if (my_phy_caps & BMSR_100BASE4)
1118 my_ad_caps |= ADVERTISE_100BASE4;
1119 if (my_phy_caps & BMSR_100FULL)
1120 my_ad_caps |= ADVERTISE_100FULL;
1121 if (my_phy_caps & BMSR_100HALF)
1122 my_ad_caps |= ADVERTISE_100HALF;
1123 if (my_phy_caps & BMSR_10FULL)
1124 my_ad_caps |= ADVERTISE_10FULL;
1125 if (my_phy_caps & BMSR_10HALF)
1126 my_ad_caps |= ADVERTISE_10HALF;
1128 /* Disable capabilities not selected by our user */
1129 if (lp->ctl_rspeed != 100)
1130 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1132 if (!lp->ctl_rfduplx)
1133 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1135 /* Update our Auto-Neg Advertisement Register */
1136 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1137 lp->mii.advertising = my_ad_caps;
1140 * Read the register back. Without this, it appears that when
1141 * auto-negotiation is restarted, sometimes it isn't ready and
1142 * the link does not come up.
1144 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1146 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1147 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1149 /* Restart auto-negotiation process in order to advertise my caps */
1150 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1152 smc_phy_check_media(dev, 1);
1154 smc_phy_configure_exit:
1155 SMC_SELECT_BANK(lp, 2);
1156 spin_unlock_irq(&lp->lock);
1162 * Purpose: Handle interrupts relating to PHY register 18. This is
1163 * called from the "hard" interrupt handler under our private spinlock.
1165 static void smc_phy_interrupt(struct net_device *dev)
1167 struct smc_local *lp = netdev_priv(dev);
1168 int phyaddr = lp->mii.phy_id;
1171 DBG(2, "%s: %s\n", dev->name, __func__);
1173 if (lp->phy_type == 0)
1177 smc_phy_check_media(dev, 0);
1179 /* Read PHY Register 18, Status Output */
1180 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1181 if ((phy18 & PHY_INT_INT) == 0)
1186 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1188 static void smc_10bt_check_media(struct net_device *dev, int init)
1190 struct smc_local *lp = netdev_priv(dev);
1191 void __iomem *ioaddr = lp->base;
1192 unsigned int old_carrier, new_carrier;
1194 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1196 SMC_SELECT_BANK(lp, 0);
1197 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1198 SMC_SELECT_BANK(lp, 2);
1200 if (init || (old_carrier != new_carrier)) {
1202 netif_carrier_off(dev);
1204 netif_carrier_on(dev);
1206 if (netif_msg_link(lp))
1207 printk(KERN_INFO "%s: link %s\n", dev->name,
1208 new_carrier ? "up" : "down");
1212 static void smc_eph_interrupt(struct net_device *dev)
1214 struct smc_local *lp = netdev_priv(dev);
1215 void __iomem *ioaddr = lp->base;
1218 smc_10bt_check_media(dev, 0);
1220 SMC_SELECT_BANK(lp, 1);
1221 ctl = SMC_GET_CTL(lp);
1222 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1223 SMC_SET_CTL(lp, ctl);
1224 SMC_SELECT_BANK(lp, 2);
1228 * This is the main routine of the driver, to handle the device when
1229 * it needs some attention.
1231 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1233 struct net_device *dev = dev_id;
1234 struct smc_local *lp = netdev_priv(dev);
1235 void __iomem *ioaddr = lp->base;
1236 int status, mask, timeout, card_stats;
1239 DBG(3, "%s: %s\n", dev->name, __func__);
1241 spin_lock(&lp->lock);
1243 /* A preamble may be used when there is a potential race
1244 * between the interruptible transmit functions and this
1246 SMC_INTERRUPT_PREAMBLE;
1248 saved_pointer = SMC_GET_PTR(lp);
1249 mask = SMC_GET_INT_MASK(lp);
1250 SMC_SET_INT_MASK(lp, 0);
1252 /* set a timeout value, so I don't stay here forever */
1253 timeout = MAX_IRQ_LOOPS;
1256 status = SMC_GET_INT(lp);
1258 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1259 dev->name, status, mask,
1260 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1261 meminfo = SMC_GET_MIR(lp);
1262 SMC_SELECT_BANK(lp, 2); meminfo; }),
1269 if (status & IM_TX_INT) {
1270 /* do this before RX as it will free memory quickly */
1271 DBG(3, "%s: TX int\n", dev->name);
1273 SMC_ACK_INT(lp, IM_TX_INT);
1274 if (THROTTLE_TX_PKTS)
1275 netif_wake_queue(dev);
1276 } else if (status & IM_RCV_INT) {
1277 DBG(3, "%s: RX irq\n", dev->name);
1279 } else if (status & IM_ALLOC_INT) {
1280 DBG(3, "%s: Allocation irq\n", dev->name);
1281 tasklet_hi_schedule(&lp->tx_task);
1282 mask &= ~IM_ALLOC_INT;
1283 } else if (status & IM_TX_EMPTY_INT) {
1284 DBG(3, "%s: TX empty\n", dev->name);
1285 mask &= ~IM_TX_EMPTY_INT;
1288 SMC_SELECT_BANK(lp, 0);
1289 card_stats = SMC_GET_COUNTER(lp);
1290 SMC_SELECT_BANK(lp, 2);
1292 /* single collisions */
1293 dev->stats.collisions += card_stats & 0xF;
1296 /* multiple collisions */
1297 dev->stats.collisions += card_stats & 0xF;
1298 } else if (status & IM_RX_OVRN_INT) {
1299 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1300 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1301 eph_st = SMC_GET_EPH_STATUS(lp);
1302 SMC_SELECT_BANK(lp, 2); eph_st; }));
1303 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1304 dev->stats.rx_errors++;
1305 dev->stats.rx_fifo_errors++;
1306 } else if (status & IM_EPH_INT) {
1307 smc_eph_interrupt(dev);
1308 } else if (status & IM_MDINT) {
1309 SMC_ACK_INT(lp, IM_MDINT);
1310 smc_phy_interrupt(dev);
1311 } else if (status & IM_ERCV_INT) {
1312 SMC_ACK_INT(lp, IM_ERCV_INT);
1313 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1315 } while (--timeout);
1317 /* restore register states */
1318 SMC_SET_PTR(lp, saved_pointer);
1319 SMC_SET_INT_MASK(lp, mask);
1320 spin_unlock(&lp->lock);
1322 #ifndef CONFIG_NET_POLL_CONTROLLER
1323 if (timeout == MAX_IRQ_LOOPS)
1324 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1327 DBG(3, "%s: Interrupt done (%d loops)\n",
1328 dev->name, MAX_IRQ_LOOPS - timeout);
1331 * We return IRQ_HANDLED unconditionally here even if there was
1332 * nothing to do. There is a possibility that a packet might
1333 * get enqueued into the chip right after TX_EMPTY_INT is raised
1334 * but just before the CPU acknowledges the IRQ.
1335 * Better take an unneeded IRQ in some occasions than complexifying
1336 * the code for all cases.
1341 #ifdef CONFIG_NET_POLL_CONTROLLER
1343 * Polling receive - used by netconsole and other diagnostic tools
1344 * to allow network i/o with interrupts disabled.
1346 static void smc_poll_controller(struct net_device *dev)
1348 disable_irq(dev->irq);
1349 smc_interrupt(dev->irq, dev);
1350 enable_irq(dev->irq);
1354 /* Our watchdog timed out. Called by the networking layer */
1355 static void smc_timeout(struct net_device *dev)
1357 struct smc_local *lp = netdev_priv(dev);
1358 void __iomem *ioaddr = lp->base;
1359 int status, mask, eph_st, meminfo, fifo;
1361 DBG(2, "%s: %s\n", dev->name, __func__);
1363 spin_lock_irq(&lp->lock);
1364 status = SMC_GET_INT(lp);
1365 mask = SMC_GET_INT_MASK(lp);
1366 fifo = SMC_GET_FIFO(lp);
1367 SMC_SELECT_BANK(lp, 0);
1368 eph_st = SMC_GET_EPH_STATUS(lp);
1369 meminfo = SMC_GET_MIR(lp);
1370 SMC_SELECT_BANK(lp, 2);
1371 spin_unlock_irq(&lp->lock);
1372 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1373 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1374 dev->name, status, mask, meminfo, fifo, eph_st );
1380 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1381 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1382 * which calls schedule(). Hence we use a work queue.
1384 if (lp->phy_type != 0)
1385 schedule_work(&lp->phy_configure);
1387 /* We can accept TX packets again */
1388 dev->trans_start = jiffies;
1389 netif_wake_queue(dev);
1393 * This routine will, depending on the values passed to it,
1394 * either make it accept multicast packets, go into
1395 * promiscuous mode (for TCPDUMP and cousins) or accept
1396 * a select set of multicast packets
1398 static void smc_set_multicast_list(struct net_device *dev)
1400 struct smc_local *lp = netdev_priv(dev);
1401 void __iomem *ioaddr = lp->base;
1402 unsigned char multicast_table[8];
1403 int update_multicast = 0;
1405 DBG(2, "%s: %s\n", dev->name, __func__);
1407 if (dev->flags & IFF_PROMISC) {
1408 DBG(2, "%s: RCR_PRMS\n", dev->name);
1409 lp->rcr_cur_mode |= RCR_PRMS;
1412 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1413 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1414 when promiscuous mode is turned on.
1418 * Here, I am setting this to accept all multicast packets.
1419 * I don't need to zero the multicast table, because the flag is
1420 * checked before the table is
1422 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1423 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1424 lp->rcr_cur_mode |= RCR_ALMUL;
1428 * This sets the internal hardware table to filter out unwanted
1429 * multicast packets before they take up memory.
1431 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1432 * address are the offset into the table. If that bit is 1, then the
1433 * multicast packet is accepted. Otherwise, it's dropped silently.
1435 * To use the 6 bits as an offset into the table, the high 3 bits are
1436 * the number of the 8 bit register, while the low 3 bits are the bit
1437 * within that register.
1439 else if (dev->mc_count) {
1441 struct dev_mc_list *cur_addr;
1443 /* table for flipping the order of 3 bits */
1444 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1446 /* start with a table of all zeros: reject all */
1447 memset(multicast_table, 0, sizeof(multicast_table));
1449 cur_addr = dev->mc_list;
1450 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1453 /* do we have a pointer here? */
1456 /* make sure this is a multicast address -
1457 shouldn't this be a given if we have it here ? */
1458 if (!(*cur_addr->dmi_addr & 1))
1461 /* only use the low order bits */
1462 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1464 /* do some messy swapping to put the bit in the right spot */
1465 multicast_table[invert3[position&7]] |=
1466 (1<<invert3[(position>>3)&7]);
1469 /* be sure I get rid of flags I might have set */
1470 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1472 /* now, the table can be loaded into the chipset */
1473 update_multicast = 1;
1475 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1476 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1479 * since I'm disabling all multicast entirely, I need to
1480 * clear the multicast list
1482 memset(multicast_table, 0, sizeof(multicast_table));
1483 update_multicast = 1;
1486 spin_lock_irq(&lp->lock);
1487 SMC_SELECT_BANK(lp, 0);
1488 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1489 if (update_multicast) {
1490 SMC_SELECT_BANK(lp, 3);
1491 SMC_SET_MCAST(lp, multicast_table);
1493 SMC_SELECT_BANK(lp, 2);
1494 spin_unlock_irq(&lp->lock);
1499 * Open and Initialize the board
1501 * Set up everything, reset the card, etc..
1504 smc_open(struct net_device *dev)
1506 struct smc_local *lp = netdev_priv(dev);
1508 DBG(2, "%s: %s\n", dev->name, __func__);
1511 * Check that the address is valid. If its not, refuse
1512 * to bring the device up. The user must specify an
1513 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1515 if (!is_valid_ether_addr(dev->dev_addr)) {
1516 PRINTK("%s: no valid ethernet hw addr\n", __func__);
1520 /* Setup the default Register Modes */
1521 lp->tcr_cur_mode = TCR_DEFAULT;
1522 lp->rcr_cur_mode = RCR_DEFAULT;
1523 lp->rpc_cur_mode = RPC_DEFAULT |
1524 lp->cfg.leda << RPC_LSXA_SHFT |
1525 lp->cfg.ledb << RPC_LSXB_SHFT;
1528 * If we are not using a MII interface, we need to
1529 * monitor our own carrier signal to detect faults.
1531 if (lp->phy_type == 0)
1532 lp->tcr_cur_mode |= TCR_MON_CSN;
1534 /* reset the hardware */
1538 /* Configure the PHY, initialize the link state */
1539 if (lp->phy_type != 0)
1540 smc_phy_configure(&lp->phy_configure);
1542 spin_lock_irq(&lp->lock);
1543 smc_10bt_check_media(dev, 1);
1544 spin_unlock_irq(&lp->lock);
1547 netif_start_queue(dev);
1554 * this makes the board clean up everything that it can
1555 * and not talk to the outside world. Caused by
1556 * an 'ifconfig ethX down'
1558 static int smc_close(struct net_device *dev)
1560 struct smc_local *lp = netdev_priv(dev);
1562 DBG(2, "%s: %s\n", dev->name, __func__);
1564 netif_stop_queue(dev);
1565 netif_carrier_off(dev);
1567 /* clear everything */
1569 tasklet_kill(&lp->tx_task);
1570 smc_phy_powerdown(dev);
1578 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1580 struct smc_local *lp = netdev_priv(dev);
1586 if (lp->phy_type != 0) {
1587 spin_lock_irq(&lp->lock);
1588 ret = mii_ethtool_gset(&lp->mii, cmd);
1589 spin_unlock_irq(&lp->lock);
1591 cmd->supported = SUPPORTED_10baseT_Half |
1592 SUPPORTED_10baseT_Full |
1593 SUPPORTED_TP | SUPPORTED_AUI;
1595 if (lp->ctl_rspeed == 10)
1596 cmd->speed = SPEED_10;
1597 else if (lp->ctl_rspeed == 100)
1598 cmd->speed = SPEED_100;
1600 cmd->autoneg = AUTONEG_DISABLE;
1601 cmd->transceiver = XCVR_INTERNAL;
1603 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1612 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1614 struct smc_local *lp = netdev_priv(dev);
1617 if (lp->phy_type != 0) {
1618 spin_lock_irq(&lp->lock);
1619 ret = mii_ethtool_sset(&lp->mii, cmd);
1620 spin_unlock_irq(&lp->lock);
1622 if (cmd->autoneg != AUTONEG_DISABLE ||
1623 cmd->speed != SPEED_10 ||
1624 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1625 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1628 // lp->port = cmd->port;
1629 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1631 // if (netif_running(dev))
1632 // smc_set_port(dev);
1641 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1643 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1644 strncpy(info->version, version, sizeof(info->version));
1645 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1648 static int smc_ethtool_nwayreset(struct net_device *dev)
1650 struct smc_local *lp = netdev_priv(dev);
1653 if (lp->phy_type != 0) {
1654 spin_lock_irq(&lp->lock);
1655 ret = mii_nway_restart(&lp->mii);
1656 spin_unlock_irq(&lp->lock);
1662 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1664 struct smc_local *lp = netdev_priv(dev);
1665 return lp->msg_enable;
1668 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1670 struct smc_local *lp = netdev_priv(dev);
1671 lp->msg_enable = level;
1674 static const struct ethtool_ops smc_ethtool_ops = {
1675 .get_settings = smc_ethtool_getsettings,
1676 .set_settings = smc_ethtool_setsettings,
1677 .get_drvinfo = smc_ethtool_getdrvinfo,
1679 .get_msglevel = smc_ethtool_getmsglevel,
1680 .set_msglevel = smc_ethtool_setmsglevel,
1681 .nway_reset = smc_ethtool_nwayreset,
1682 .get_link = ethtool_op_get_link,
1683 // .get_eeprom = smc_ethtool_geteeprom,
1684 // .set_eeprom = smc_ethtool_seteeprom,
1690 * This routine has a simple purpose -- make the SMC chip generate an
1691 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1694 * does this still work?
1696 * I just deleted auto_irq.c, since it was never built...
1699 static int __init smc_findirq(struct smc_local *lp)
1701 void __iomem *ioaddr = lp->base;
1703 unsigned long cookie;
1705 DBG(2, "%s: %s\n", CARDNAME, __func__);
1707 cookie = probe_irq_on();
1710 * What I try to do here is trigger an ALLOC_INT. This is done
1711 * by allocating a small chunk of memory, which will give an interrupt
1714 /* enable ALLOCation interrupts ONLY */
1715 SMC_SELECT_BANK(lp, 2);
1716 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1719 * Allocate 512 bytes of memory. Note that the chip was just
1720 * reset so all the memory is available
1722 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1725 * Wait until positive that the interrupt has been generated
1730 int_status = SMC_GET_INT(lp);
1731 if (int_status & IM_ALLOC_INT)
1732 break; /* got the interrupt */
1733 } while (--timeout);
1736 * there is really nothing that I can do here if timeout fails,
1737 * as autoirq_report will return a 0 anyway, which is what I
1738 * want in this case. Plus, the clean up is needed in both
1742 /* and disable all interrupts again */
1743 SMC_SET_INT_MASK(lp, 0);
1745 /* and return what I found */
1746 return probe_irq_off(cookie);
1750 * Function: smc_probe(unsigned long ioaddr)
1753 * Tests to see if a given ioaddr points to an SMC91x chip.
1754 * Returns a 0 on success
1757 * (1) see if the high byte of BANK_SELECT is 0x33
1758 * (2) compare the ioaddr with the base register's address
1759 * (3) see if I recognize the chip ID in the appropriate register
1761 * Here I do typical initialization tasks.
1763 * o Initialize the structure if needed
1764 * o print out my vanity message if not done so already
1765 * o print out what type of hardware is detected
1766 * o print out the ethernet address
1768 * o set up my private data
1769 * o configure the dev structure with my subroutines
1770 * o actually GRAB the irq.
1773 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
1774 unsigned long irq_flags)
1776 struct smc_local *lp = netdev_priv(dev);
1777 static int version_printed = 0;
1779 unsigned int val, revision_register;
1780 const char *version_string;
1781 DECLARE_MAC_BUF(mac);
1783 DBG(2, "%s: %s\n", CARDNAME, __func__);
1785 /* First, see if the high byte is 0x33 */
1786 val = SMC_CURRENT_BANK(lp);
1787 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1788 if ((val & 0xFF00) != 0x3300) {
1789 if ((val & 0xFF) == 0x33) {
1791 "%s: Detected possible byte-swapped interface"
1792 " at IOADDR %p\n", CARDNAME, ioaddr);
1799 * The above MIGHT indicate a device, but I need to write to
1800 * further test this.
1802 SMC_SELECT_BANK(lp, 0);
1803 val = SMC_CURRENT_BANK(lp);
1804 if ((val & 0xFF00) != 0x3300) {
1810 * well, we've already written once, so hopefully another
1811 * time won't hurt. This time, I need to switch the bank
1812 * register to bank 1, so I can access the base address
1815 SMC_SELECT_BANK(lp, 1);
1816 val = SMC_GET_BASE(lp);
1817 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1818 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1819 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1820 CARDNAME, ioaddr, val);
1824 * check if the revision register is something that I
1825 * recognize. These might need to be added to later,
1826 * as future revisions could be added.
1828 SMC_SELECT_BANK(lp, 3);
1829 revision_register = SMC_GET_REV(lp);
1830 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1831 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1832 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1833 /* I don't recognize this chip, so... */
1834 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1835 ", Contact author.\n", CARDNAME,
1836 ioaddr, revision_register);
1842 /* At this point I'll assume that the chip is an SMC91x. */
1843 if (version_printed++ == 0)
1844 printk("%s", version);
1846 /* fill in some of the fields */
1847 dev->base_addr = (unsigned long)ioaddr;
1849 lp->version = revision_register & 0xff;
1850 spin_lock_init(&lp->lock);
1852 /* Get the MAC address */
1853 SMC_SELECT_BANK(lp, 1);
1854 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1856 /* now, reset the chip, and put it into a known state */
1860 * If dev->irq is 0, then the device has to be banged on to see
1863 * This banging doesn't always detect the IRQ, for unknown reasons.
1864 * a workaround is to reset the chip and try again.
1866 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1867 * be what is requested on the command line. I don't do that, mostly
1868 * because the card that I have uses a non-standard method of accessing
1869 * the IRQs, and because this _should_ work in most configurations.
1871 * Specifying an IRQ is done with the assumption that the user knows
1872 * what (s)he is doing. No checking is done!!!!
1879 dev->irq = smc_findirq(lp);
1882 /* kick the card and try again */
1886 if (dev->irq == 0) {
1887 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1892 dev->irq = irq_canonicalize(dev->irq);
1894 /* Fill in the fields of the device structure with ethernet values. */
1897 dev->open = smc_open;
1898 dev->stop = smc_close;
1899 dev->hard_start_xmit = smc_hard_start_xmit;
1900 dev->tx_timeout = smc_timeout;
1901 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1902 dev->set_multicast_list = smc_set_multicast_list;
1903 dev->ethtool_ops = &smc_ethtool_ops;
1904 #ifdef CONFIG_NET_POLL_CONTROLLER
1905 dev->poll_controller = smc_poll_controller;
1908 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1909 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1911 lp->mii.phy_id_mask = 0x1f;
1912 lp->mii.reg_num_mask = 0x1f;
1913 lp->mii.force_media = 0;
1914 lp->mii.full_duplex = 0;
1916 lp->mii.mdio_read = smc_phy_read;
1917 lp->mii.mdio_write = smc_phy_write;
1920 * Locate the phy, if any.
1922 if (lp->version >= (CHIP_91100 << 4))
1923 smc_phy_detect(dev);
1925 /* then shut everything down to save power */
1927 smc_phy_powerdown(dev);
1929 /* Set default parameters */
1930 lp->msg_enable = NETIF_MSG_LINK;
1931 lp->ctl_rfduplx = 0;
1932 lp->ctl_rspeed = 10;
1934 if (lp->version >= (CHIP_91100 << 4)) {
1935 lp->ctl_rfduplx = 1;
1936 lp->ctl_rspeed = 100;
1940 retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
1944 #ifdef CONFIG_ARCH_PXA
1945 # ifdef SMC_USE_PXA_DMA
1946 lp->cfg.flags |= SMC91X_USE_DMA;
1948 if (lp->cfg.flags & SMC91X_USE_DMA) {
1949 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1950 smc_pxa_dma_irq, NULL);
1956 retval = register_netdev(dev);
1958 /* now, print out the card info, in a short format.. */
1959 printk("%s: %s (rev %d) at %p IRQ %d",
1960 dev->name, version_string, revision_register & 0x0f,
1961 lp->base, dev->irq);
1963 if (dev->dma != (unsigned char)-1)
1964 printk(" DMA %d", dev->dma);
1967 lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
1968 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1970 if (!is_valid_ether_addr(dev->dev_addr)) {
1971 printk("%s: Invalid ethernet MAC address. Please "
1972 "set using ifconfig\n", dev->name);
1974 /* Print the Ethernet address */
1975 printk("%s: Ethernet addr: %s\n",
1976 dev->name, print_mac(mac, dev->dev_addr));
1979 if (lp->phy_type == 0) {
1980 PRINTK("%s: No PHY found\n", dev->name);
1981 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1982 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1983 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1984 PRINTK("%s: PHY LAN83C180\n", dev->name);
1989 #ifdef CONFIG_ARCH_PXA
1990 if (retval && dev->dma != (unsigned char)-1)
1991 pxa_free_dma(dev->dma);
1996 static int smc_enable_device(struct platform_device *pdev)
1998 struct net_device *ndev = platform_get_drvdata(pdev);
1999 struct smc_local *lp = netdev_priv(ndev);
2000 unsigned long flags;
2001 unsigned char ecor, ecsr;
2003 struct resource * res;
2005 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2010 * Map the attribute space. This is overkill, but clean.
2012 addr = ioremap(res->start, ATTRIB_SIZE);
2017 * Reset the device. We must disable IRQs around this
2018 * since a reset causes the IRQ line become active.
2020 local_irq_save(flags);
2021 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2022 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2023 readb(addr + (ECOR << SMC_IO_SHIFT));
2026 * Wait 100us for the chip to reset.
2031 * The device will ignore all writes to the enable bit while
2032 * reset is asserted, even if the reset bit is cleared in the
2033 * same write. Must clear reset first, then enable the device.
2035 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2036 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2039 * Set the appropriate byte/word mode.
2041 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2044 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2045 local_irq_restore(flags);
2050 * Wait for the chip to wake up. We could poll the control
2051 * register in the main register space, but that isn't mapped
2052 * yet. We know this is going to take 750us.
2059 static int smc_request_attrib(struct platform_device *pdev,
2060 struct net_device *ndev)
2062 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2063 struct smc_local *lp = netdev_priv(ndev);
2068 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2074 static void smc_release_attrib(struct platform_device *pdev,
2075 struct net_device *ndev)
2077 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2078 struct smc_local *lp = netdev_priv(ndev);
2081 release_mem_region(res->start, ATTRIB_SIZE);
2084 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2086 if (SMC_CAN_USE_DATACS) {
2087 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2088 struct smc_local *lp = netdev_priv(ndev);
2093 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2094 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2098 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2102 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2104 if (SMC_CAN_USE_DATACS) {
2105 struct smc_local *lp = netdev_priv(ndev);
2106 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2109 iounmap(lp->datacs);
2114 release_mem_region(res->start, SMC_DATA_EXTENT);
2121 * dev->base_addr == 0, try to find all possible locations
2122 * dev->base_addr > 0x1ff, this is the address to check
2123 * dev->base_addr == <anything else>, return failure code
2126 * 0 --> there is a device
2127 * anything else, error
2129 static int smc_drv_probe(struct platform_device *pdev)
2131 struct smc91x_platdata *pd = pdev->dev.platform_data;
2132 struct smc_local *lp;
2133 struct net_device *ndev;
2134 struct resource *res, *ires;
2135 unsigned int __iomem *addr;
2136 unsigned long irq_flags = SMC_IRQ_FLAGS;
2139 ndev = alloc_etherdev(sizeof(struct smc_local));
2141 printk("%s: could not allocate device.\n", CARDNAME);
2145 SET_NETDEV_DEV(ndev, &pdev->dev);
2147 /* get configuration from platform data, only allow use of
2148 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2151 lp = netdev_priv(ndev);
2154 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2155 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2157 lp->cfg.flags |= (SMC_CAN_USE_8BIT) ? SMC91X_USE_8BIT : 0;
2158 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2159 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2160 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2163 if (!lp->cfg.leda && !lp->cfg.ledb) {
2164 lp->cfg.leda = RPC_LSA_DEFAULT;
2165 lp->cfg.ledb = RPC_LSB_DEFAULT;
2168 ndev->dma = (unsigned char)-1;
2170 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2172 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2175 goto out_free_netdev;
2179 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2181 goto out_free_netdev;
2184 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2187 goto out_release_io;
2190 ndev->irq = ires->start;
2192 if (ires->flags & IRQF_TRIGGER_MASK)
2193 irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2195 ret = smc_request_attrib(pdev, ndev);
2197 goto out_release_io;
2198 #if defined(CONFIG_SA1100_ASSABET)
2199 NCR_0 |= NCR_ENET_OSC_EN;
2201 platform_set_drvdata(pdev, ndev);
2202 ret = smc_enable_device(pdev);
2204 goto out_release_attrib;
2206 addr = ioremap(res->start, SMC_IO_EXTENT);
2209 goto out_release_attrib;
2212 #ifdef CONFIG_ARCH_PXA
2214 struct smc_local *lp = netdev_priv(ndev);
2215 lp->device = &pdev->dev;
2216 lp->physaddr = res->start;
2220 ret = smc_probe(ndev, addr, irq_flags);
2224 smc_request_datacs(pdev, ndev);
2229 platform_set_drvdata(pdev, NULL);
2232 smc_release_attrib(pdev, ndev);
2234 release_mem_region(res->start, SMC_IO_EXTENT);
2238 printk("%s: not found (%d).\n", CARDNAME, ret);
2243 static int smc_drv_remove(struct platform_device *pdev)
2245 struct net_device *ndev = platform_get_drvdata(pdev);
2246 struct smc_local *lp = netdev_priv(ndev);
2247 struct resource *res;
2249 platform_set_drvdata(pdev, NULL);
2251 unregister_netdev(ndev);
2253 free_irq(ndev->irq, ndev);
2255 #ifdef CONFIG_ARCH_PXA
2256 if (ndev->dma != (unsigned char)-1)
2257 pxa_free_dma(ndev->dma);
2261 smc_release_datacs(pdev,ndev);
2262 smc_release_attrib(pdev,ndev);
2264 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2266 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2267 release_mem_region(res->start, SMC_IO_EXTENT);
2274 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2276 struct net_device *ndev = platform_get_drvdata(dev);
2279 if (netif_running(ndev)) {
2280 netif_device_detach(ndev);
2282 smc_phy_powerdown(ndev);
2288 static int smc_drv_resume(struct platform_device *dev)
2290 struct net_device *ndev = platform_get_drvdata(dev);
2293 struct smc_local *lp = netdev_priv(ndev);
2294 smc_enable_device(dev);
2295 if (netif_running(ndev)) {
2298 if (lp->phy_type != 0)
2299 smc_phy_configure(&lp->phy_configure);
2300 netif_device_attach(ndev);
2306 static struct platform_driver smc_driver = {
2307 .probe = smc_drv_probe,
2308 .remove = smc_drv_remove,
2309 .suspend = smc_drv_suspend,
2310 .resume = smc_drv_resume,
2313 .owner = THIS_MODULE,
2317 static int __init smc_init(void)
2323 "%s: You shouldn't use auto-probing with insmod!\n",
2328 return platform_driver_register(&smc_driver);
2331 static void __exit smc_cleanup(void)
2333 platform_driver_unregister(&smc_driver);
2336 module_init(smc_init);
2337 module_exit(smc_cleanup);