1 /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
3 Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This drivers was written with the following sources of reference:
9 - The driver for the Riebl Lance card by the TU Vienna.
10 - The modified TUW driver for PAM's VME cards
11 - The PC-Linux driver for Lance cards (but this is for bus master
12 cards, not the shared memory ones)
13 - The Amiga Ariadne driver
15 v1.0: (in 1.2.13pl4/0.9.13)
19 deleted some debugging stuff
20 optimized register access (keep AREG pointing to CSR0)
21 following AMD, CSR0_STRT should be set only after IDON is detected
22 use memcpy() for data transfers, that also employs long word moves
23 better probe procedure for 24-bit systems
24 non-VME-RieblCards need extra delays in memcpy
25 must also do write test, since 0xfxe00000 may hit ROM
26 use 8/32 tx/rx buffers, which should give better NFS performance;
27 this is made possible by shifting the last packet buffer after the
28 RieblCard reserved area
30 again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
31 and thus RAM, in case of no Lance found all memory contents have to
33 Now possible to compile as module.
34 v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
35 Several little 1.3 adaptions
36 When the lance is stopped it jumps back into little-endian
37 mode. It is therefore necessary to put it back where it
38 belongs, in big endian mode, in order to make things work.
39 This might be the reason why multicast-mode didn't work
40 before, but I'm not able to test it as I only got an Amiga
41 (we had similar problems with the A2065 driver).
45 static char version[] = "atarilance.c: v1.3 04/04/96 "
46 "Roman.Hodek@informatik.uni-erlangen.de\n";
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/module.h>
51 #include <linux/stddef.h>
52 #include <linux/kernel.h>
53 #include <linux/string.h>
54 #include <linux/errno.h>
55 #include <linux/skbuff.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/init.h>
59 #include <linux/bitops.h>
61 #include <asm/setup.h>
63 #include <asm/atarihw.h>
64 #include <asm/atariints.h>
68 * 0 = silent, print only serious errors
69 * 1 = normal, print error messages
70 * 2 = debug, print debug infos
71 * 3 = debug, print even more debug infos (packet data)
77 static int lance_debug = LANCE_DEBUG;
79 static int lance_debug = 1;
81 module_param(lance_debug, int, 0);
82 MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
83 MODULE_LICENSE("GPL");
85 /* Print debug messages on probing? */
86 #undef LANCE_DEBUG_PROBE
88 #define DPRINTK(n,a) \
90 if (lance_debug >= n) \
94 #ifdef LANCE_DEBUG_PROBE
95 # define PROBE_PRINT(a) printk a
97 # define PROBE_PRINT(a)
100 /* These define the number of Rx and Tx buffers as log2. (Only powers
102 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
103 * is more time critical then sending and packets may have to remain in the
104 * board's memory when main memory is low.
107 #define TX_LOG_RING_SIZE 3
108 #define RX_LOG_RING_SIZE 5
110 /* These are the derived values */
112 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
113 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
114 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
116 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
117 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
118 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
120 #define TX_TIMEOUT 20
122 /* The LANCE Rx and Tx ring descriptors. */
123 struct lance_rx_head {
124 unsigned short base; /* Low word of base addr */
125 volatile unsigned char flag;
126 unsigned char base_hi; /* High word of base addr (unused) */
127 short buf_length; /* This length is 2s complement! */
128 volatile short msg_length; /* This length is "normal". */
131 struct lance_tx_head {
132 unsigned short base; /* Low word of base addr */
133 volatile unsigned char flag;
134 unsigned char base_hi; /* High word of base addr (unused) */
135 short length; /* Length is 2s complement! */
140 unsigned short adr_lo; /* Low 16 bits of address */
141 unsigned char len; /* Length bits */
142 unsigned char adr_hi; /* High 8 bits of address (unused) */
145 /* The LANCE initialization block, described in databook. */
146 struct lance_init_block {
147 unsigned short mode; /* Pre-set mode */
148 unsigned char hwaddr[6]; /* Physical ethernet address */
149 unsigned filter[2]; /* Multicast filter (unused). */
150 /* Receive and transmit ring base, along with length bits. */
151 struct ringdesc rx_ring;
152 struct ringdesc tx_ring;
155 /* The whole layout of the Lance shared memory */
156 struct lance_memory {
157 struct lance_init_block init;
158 struct lance_tx_head tx_head[TX_RING_SIZE];
159 struct lance_rx_head rx_head[RX_RING_SIZE];
160 char packet_area[0]; /* packet data follow after the
161 * init block and the ring
162 * descriptors and are located
166 /* RieblCard specifics:
167 * The original TOS driver for these cards reserves the area from offset
168 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
169 * Ethernet address there, and the magic for verifying the data's validity.
170 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
171 * is reserved for the interrupt vector number.
173 #define RIEBL_RSVD_START 0xee70
174 #define RIEBL_RSVD_END 0xeec0
175 #define RIEBL_MAGIC 0x09051990
176 #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a))
177 #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e))
178 #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe))
180 /* This is a default address for the old RieblCards without a battery
181 * that have no ethernet address at boot time. 00:00:36:04 is the
182 * prefix for Riebl cards, the 00:00 at the end is arbitrary.
185 static unsigned char OldRieblDefHwaddr[6] = {
186 0x00, 0x00, 0x36, 0x04, 0x00, 0x00
190 /* I/O registers of the Lance chip */
193 /* base+0x0 */ volatile unsigned short data;
194 /* base+0x2 */ volatile unsigned short addr;
195 unsigned char _dummy1[3];
196 /* base+0x7 */ volatile unsigned char ivec;
197 unsigned char _dummy2[5];
198 /* base+0xd */ volatile unsigned char eeprom;
199 unsigned char _dummy3;
200 /* base+0xf */ volatile unsigned char mem;
203 /* Types of boards this driver supports */
206 OLD_RIEBL, /* old Riebl card without battery */
207 NEW_RIEBL, /* new Riebl card with battery */
208 PAM_CARD /* PAM card with EEPROM */
211 static char *lance_names[] = {
212 "Riebl-Card (without battery)",
213 "Riebl-Card (with battery)",
217 /* The driver's private device structure */
219 struct lance_private {
220 enum lance_type cardtype;
221 struct lance_ioreg *iobase;
222 struct lance_memory *mem;
223 int cur_rx, cur_tx; /* The next free ring entry */
224 int dirty_tx; /* Ring entries to be freed. */
226 void *(*memcpy_f)( void *, const void *, size_t );
227 struct net_device_stats stats;
228 /* This must be long for set_bit() */
233 /* I/O register access macros */
236 #define DREG IO->data
237 #define AREG IO->addr
238 #define REGA(a) (*( AREG = (a), &DREG ))
240 /* Definitions for packet buffer access: */
241 #define PKT_BUF_SZ 1544
242 /* Get the address of a packet buffer corresponding to a given buffer head */
243 #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base)
245 /* Possible memory/IO addresses for probing */
248 unsigned long memaddr;
249 unsigned long ioaddr;
251 } lance_addr_list[] = {
252 { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */
253 { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE
254 (highest byte stripped) */
255 { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST
256 (highest byte stripped) */
257 { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to
258 avoid conflict with ROM
259 (highest byte stripped) */
260 { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE
261 (highest byte stripped) */
262 { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE
263 (highest byte stripped) */
266 #define N_LANCE_ADDR (sizeof(lance_addr_list)/sizeof(*lance_addr_list))
269 /* Definitions for the Lance */
272 #define TMD1_ENP 0x01 /* end of packet */
273 #define TMD1_STP 0x02 /* start of packet */
274 #define TMD1_DEF 0x04 /* deferred */
275 #define TMD1_ONE 0x08 /* one retry needed */
276 #define TMD1_MORE 0x10 /* more than one retry needed */
277 #define TMD1_ERR 0x40 /* error summary */
278 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
280 #define TMD1_OWN_CHIP TMD1_OWN
281 #define TMD1_OWN_HOST 0
283 /* tx_head misc field */
284 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
285 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
286 #define TMD3_LCAR 0x0800 /* carrier lost */
287 #define TMD3_LCOL 0x1000 /* late collision */
288 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
289 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
292 #define RMD1_ENP 0x01 /* end of packet */
293 #define RMD1_STP 0x02 /* start of packet */
294 #define RMD1_BUFF 0x04 /* buffer error */
295 #define RMD1_CRC 0x08 /* CRC error */
296 #define RMD1_OFLO 0x10 /* overflow */
297 #define RMD1_FRAM 0x20 /* framing error */
298 #define RMD1_ERR 0x40 /* error summary */
299 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
301 #define RMD1_OWN_CHIP RMD1_OWN
302 #define RMD1_OWN_HOST 0
305 #define CSR0 0 /* mode/status */
306 #define CSR1 1 /* init block addr (low) */
307 #define CSR2 2 /* init block addr (high) */
308 #define CSR3 3 /* misc */
309 #define CSR8 8 /* address filter */
310 #define CSR15 15 /* promiscuous mode */
313 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
314 #define CSR0_INIT 0x0001 /* initialize (RS) */
315 #define CSR0_STRT 0x0002 /* start (RS) */
316 #define CSR0_STOP 0x0004 /* stop (RS) */
317 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
318 #define CSR0_TXON 0x0010 /* transmitter on (R) */
319 #define CSR0_RXON 0x0020 /* receiver on (R) */
320 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
321 #define CSR0_INTR 0x0080 /* interrupt active (R) */
322 #define CSR0_IDON 0x0100 /* initialization done (RC) */
323 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
324 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
325 #define CSR0_MERR 0x0800 /* memory error (RC) */
326 #define CSR0_MISS 0x1000 /* missed frame (RC) */
327 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
328 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
329 #define CSR0_ERR 0x8000 /* error (RC) */
332 #define CSR3_BCON 0x0001 /* byte control */
333 #define CSR3_ACON 0x0002 /* ALE control */
334 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
338 /***************************** Prototypes *****************************/
340 static int addr_accessible( volatile void *regp, int wordflag, int
342 static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
344 static int lance_open( struct net_device *dev );
345 static void lance_init_ring( struct net_device *dev );
346 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
347 static irqreturn_t lance_interrupt( int irq, void *dev_id );
348 static int lance_rx( struct net_device *dev );
349 static int lance_close( struct net_device *dev );
350 static struct net_device_stats *lance_get_stats( struct net_device *dev );
351 static void set_multicast_list( struct net_device *dev );
352 static int lance_set_mac_address( struct net_device *dev, void *addr );
353 static void lance_tx_timeout (struct net_device *dev);
355 /************************* End of Prototypes **************************/
361 static void *slow_memcpy( void *dst, const void *src, size_t len )
364 const char *cfrom = src;
374 struct net_device * __init atarilance_probe(int unit)
378 struct net_device *dev;
381 if (!MACH_IS_ATARI || found)
382 /* Assume there's only one board possible... That seems true, since
383 * the Riebl/PAM board's address cannot be changed. */
384 return ERR_PTR(-ENODEV);
386 dev = alloc_etherdev(sizeof(struct lance_private));
388 return ERR_PTR(-ENOMEM);
390 sprintf(dev->name, "eth%d", unit);
391 netdev_boot_setup_check(dev);
393 SET_MODULE_OWNER(dev);
395 for( i = 0; i < N_LANCE_ADDR; ++i ) {
396 if (lance_probe1( dev, &lance_addr_list[i] )) {
398 err = register_netdev(dev);
401 free_irq(dev->irq, dev);
410 /* Derived from hwreg_present() in atari/config.c: */
412 static int __init addr_accessible( volatile void *regp, int wordflag, int writeflag )
416 long *vbr, save_berr;
418 local_irq_save(flags);
420 __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : );
424 ( "movel %/sp,%/d1\n\t"
425 "movel #Lberr,%2@\n\t"
432 "1: movew %1@,%/d0\n\t"
448 "Lberr: movel %/d1,%/sp"
450 : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
451 : "d0", "d1", "memory"
455 local_irq_restore(flags);
461 static unsigned long __init lance_probe1( struct net_device *dev,
462 struct lance_addr *init_rec )
464 volatile unsigned short *memaddr =
465 (volatile unsigned short *)init_rec->memaddr;
466 volatile unsigned short *ioaddr =
467 (volatile unsigned short *)init_rec->ioaddr;
468 struct lance_private *lp;
469 struct lance_ioreg *IO;
471 static int did_version;
472 unsigned short save1, save2;
474 PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
475 (long)memaddr, (long)ioaddr ));
477 /* Test whether memory readable and writable */
478 PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
479 if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
481 /* Written values should come back... */
482 PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
485 if (*memaddr != 0x0001) goto probe_fail;
486 PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
488 if (*memaddr != 0x0000) goto probe_fail;
491 /* First port should be readable and writable */
492 PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
493 if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
495 /* and written values should be readable */
496 PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
499 if (ioaddr[1] != 0x0001) goto probe_fail;
501 /* The CSR0_INIT bit should not be readable */
502 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
505 ioaddr[0] = CSR0_INIT | CSR0_STOP;
506 if (ioaddr[0] != CSR0_STOP) {
511 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
512 ioaddr[0] = CSR0_STOP;
513 if (ioaddr[0] != CSR0_STOP) {
520 PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
527 lp = (struct lance_private *)dev->priv;
528 MEM = (struct lance_memory *)memaddr;
529 IO = lp->iobase = (struct lance_ioreg *)ioaddr;
530 dev->base_addr = (unsigned long)ioaddr; /* informational only */
531 lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
533 REGA( CSR0 ) = CSR0_STOP;
535 /* Now test for type: If the eeprom I/O port is readable, it is a
537 if (addr_accessible( &(IO->eeprom), 0, 0 )) {
538 /* Switch back to Ram */
540 lp->cardtype = PAM_CARD;
542 else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
543 lp->cardtype = NEW_RIEBL;
546 lp->cardtype = OLD_RIEBL;
548 if (lp->cardtype == PAM_CARD ||
549 memaddr == (unsigned short *)0xffe00000) {
550 /* PAMs card and Riebl on ST use level 5 autovector */
551 if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO,
552 "PAM/Riebl-ST Ethernet", dev)) {
553 printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
556 dev->irq = (unsigned short)IRQ_AUTO_5;
559 /* For VME-RieblCards, request a free VME int;
560 * (This must be unsigned long, since dev->irq is short and the
561 * IRQ_MACHSPEC bit would be cut off...)
563 unsigned long irq = atari_register_vme_int();
565 printk( "Lance: request for VME interrupt failed\n" );
568 if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,
569 "Riebl-VME Ethernet", dev)) {
570 printk( "Lance: request for irq %ld failed\n", irq );
576 printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
577 dev->name, lance_names[lp->cardtype],
578 (unsigned long)ioaddr,
579 (unsigned long)memaddr,
581 init_rec->slow_flag ? " (slow memcpy)" : "" );
583 /* Get the ethernet address */
584 switch( lp->cardtype ) {
586 /* No ethernet address! (Set some default address) */
587 memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 );
590 lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 );
594 for( i = 0; i < 6; ++i )
596 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
597 ((((unsigned short *)MEM)[i*2+1] & 0x0f));
601 for( i = 0; i < 6; ++i )
602 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
603 if (lp->cardtype == OLD_RIEBL) {
604 printk( "%s: Warning: This is a default ethernet address!\n",
606 printk( " Use \"ifconfig hw ether ...\" to set the address.\n" );
609 spin_lock_init(&lp->devlock);
611 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */
612 for( i = 0; i < 6; i++ )
613 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
614 MEM->init.filter[0] = 0x00000000;
615 MEM->init.filter[1] = 0x00000000;
616 MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
617 MEM->init.rx_ring.adr_hi = 0;
618 MEM->init.rx_ring.len = RX_RING_LEN_BITS;
619 MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
620 MEM->init.tx_ring.adr_hi = 0;
621 MEM->init.tx_ring.len = TX_RING_LEN_BITS;
623 if (lp->cardtype == PAM_CARD)
624 IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
626 *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
628 if (did_version++ == 0)
629 DPRINTK( 1, ( version ));
631 /* The LANCE-specific entries in the device structure. */
632 dev->open = &lance_open;
633 dev->hard_start_xmit = &lance_start_xmit;
634 dev->stop = &lance_close;
635 dev->get_stats = &lance_get_stats;
636 dev->set_multicast_list = &set_multicast_list;
637 dev->set_mac_address = &lance_set_mac_address;
640 dev->tx_timeout = lance_tx_timeout;
641 dev->watchdog_timeo = TX_TIMEOUT;
648 memset( &lp->stats, 0, sizeof(lp->stats) );
654 static int lance_open( struct net_device *dev )
656 { struct lance_private *lp = (struct lance_private *)dev->priv;
657 struct lance_ioreg *IO = lp->iobase;
660 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
662 lance_init_ring(dev);
663 /* Re-initialize the LANCE, and start it when done. */
665 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
668 REGA( CSR0 ) = CSR0_INIT;
669 /* From now on, AREG is kept to point to CSR0 */
673 if (DREG & CSR0_IDON)
675 if (i < 0 || (DREG & CSR0_ERR)) {
676 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
677 dev->name, i, DREG ));
685 netif_start_queue (dev);
687 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
693 /* Initialize the LANCE Rx and Tx rings. */
695 static void lance_init_ring( struct net_device *dev )
697 { struct lance_private *lp = (struct lance_private *)dev->priv;
702 lp->cur_rx = lp->cur_tx = 0;
705 offset = offsetof( struct lance_memory, packet_area );
707 /* If the packet buffer at offset 'o' would conflict with the reserved area
708 * of RieblCards, advance it */
709 #define CHECK_OFFSET(o) \
711 if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \
712 if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
713 : (o) < RIEBL_RSVD_END) \
714 (o) = RIEBL_RSVD_END; \
718 for( i = 0; i < TX_RING_SIZE; i++ ) {
719 CHECK_OFFSET(offset);
720 MEM->tx_head[i].base = offset;
721 MEM->tx_head[i].flag = TMD1_OWN_HOST;
722 MEM->tx_head[i].base_hi = 0;
723 MEM->tx_head[i].length = 0;
724 MEM->tx_head[i].misc = 0;
725 offset += PKT_BUF_SZ;
728 for( i = 0; i < RX_RING_SIZE; i++ ) {
729 CHECK_OFFSET(offset);
730 MEM->rx_head[i].base = offset;
731 MEM->rx_head[i].flag = TMD1_OWN_CHIP;
732 MEM->rx_head[i].base_hi = 0;
733 MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
734 MEM->rx_head[i].msg_length = 0;
735 offset += PKT_BUF_SZ;
740 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
743 static void lance_tx_timeout (struct net_device *dev)
745 struct lance_private *lp = (struct lance_private *) dev->priv;
746 struct lance_ioreg *IO = lp->iobase;
749 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
753 * Always set BSWP after a STOP as STOP puts it back into
754 * little endian mode.
756 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
757 lp->stats.tx_errors++;
758 #ifndef final_version
760 DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
761 lp->dirty_tx, lp->cur_tx,
762 lp->tx_full ? " (full)" : "",
764 for( i = 0 ; i < RX_RING_SIZE; i++ )
765 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
766 i, MEM->rx_head[i].base,
767 -MEM->rx_head[i].buf_length,
768 MEM->rx_head[i].msg_length ));
769 for( i = 0 ; i < TX_RING_SIZE; i++ )
770 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
771 i, MEM->tx_head[i].base,
772 -MEM->tx_head[i].length,
773 MEM->tx_head[i].misc ));
776 /* XXX MSch: maybe purge/reinit ring here */
777 /* lance_restart, essentially */
778 lance_init_ring(dev);
779 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
780 dev->trans_start = jiffies;
781 netif_wake_queue (dev);
784 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
786 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
788 { struct lance_private *lp = (struct lance_private *)dev->priv;
789 struct lance_ioreg *IO = lp->iobase;
791 struct lance_tx_head *head;
794 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
798 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
802 /* PAM-Card has a bug: Can only send packets with even number of bytes! */
803 else if (lp->cardtype == PAM_CARD && (len & 1))
806 if (len > skb->len) {
807 if (skb_padto(skb, len))
811 netif_stop_queue (dev);
813 /* Fill in a Tx ring entry */
814 if (lance_debug >= 3) {
817 printk( "%s: TX pkt type 0x%04x from ", dev->name,
818 ((u_short *)skb->data)[6]);
819 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
820 printk("%02x%s", *p++, i != 5 ? ":" : "" );
822 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
823 printk("%02x%s", *p++, i != 5 ? ":" : "" );
824 printk(" data at 0x%08x len %d\n", (int)skb->data,
828 /* We're not prepared for the int until the last flags are set/reset. And
829 * the int may happen already after setting the OWN_CHIP... */
830 spin_lock_irqsave (&lp->devlock, flags);
832 /* Mask to ring buffer boundary. */
833 entry = lp->cur_tx & TX_RING_MOD_MASK;
834 head = &(MEM->tx_head[entry]);
836 /* Caution: the write order is important here, set the "ownership" bits
843 lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
844 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
845 lp->stats.tx_bytes += skb->len;
846 dev_kfree_skb( skb );
848 while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
849 lp->cur_tx -= TX_RING_SIZE;
850 lp->dirty_tx -= TX_RING_SIZE;
853 /* Trigger an immediate send poll. */
854 DREG = CSR0_INEA | CSR0_TDMD;
855 dev->trans_start = jiffies;
857 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
859 netif_start_queue (dev);
862 spin_unlock_irqrestore (&lp->devlock, flags);
867 /* The LANCE interrupt handler. */
869 static irqreturn_t lance_interrupt( int irq, void *dev_id )
871 struct net_device *dev = dev_id;
872 struct lance_private *lp;
873 struct lance_ioreg *IO;
874 int csr0, boguscnt = 10;
878 DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
882 lp = (struct lance_private *)dev->priv;
884 spin_lock (&lp->devlock);
888 while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
891 /* Acknowledge all of the current interrupt sources ASAP. */
892 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
893 CSR0_TDMD | CSR0_INEA);
895 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
896 dev->name, csr0, DREG ));
898 if (csr0 & CSR0_RINT) /* Rx interrupt */
901 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
902 int dirty_tx = lp->dirty_tx;
904 while( dirty_tx < lp->cur_tx) {
905 int entry = dirty_tx & TX_RING_MOD_MASK;
906 int status = MEM->tx_head[entry].flag;
908 if (status & TMD1_OWN_CHIP)
909 break; /* It still hasn't been Txed */
911 MEM->tx_head[entry].flag = 0;
913 if (status & TMD1_ERR) {
914 /* There was an major error, log it. */
915 int err_status = MEM->tx_head[entry].misc;
916 lp->stats.tx_errors++;
917 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
918 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
919 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
920 if (err_status & TMD3_UFLO) {
921 /* Ackk! On FIFO errors the Tx unit is turned off! */
922 lp->stats.tx_fifo_errors++;
923 /* Remove this verbosity later! */
924 DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
926 /* Restart the chip. */
930 if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
931 lp->stats.collisions++;
932 lp->stats.tx_packets++;
935 /* XXX MSch: free skb?? */
939 #ifndef final_version
940 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
941 DPRINTK( 0, ( "out-of-sync dirty pointer,"
942 " %d vs. %d, full=%ld.\n",
943 dirty_tx, lp->cur_tx, lp->tx_full ));
944 dirty_tx += TX_RING_SIZE;
948 if (lp->tx_full && (netif_queue_stopped(dev))
949 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
950 /* The ring is no longer full, clear tbusy. */
952 netif_wake_queue (dev);
955 lp->dirty_tx = dirty_tx;
958 /* Log misc errors. */
959 if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
960 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
961 if (csr0 & CSR0_MERR) {
962 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
963 "status %04x.\n", dev->name, csr0 ));
964 /* Restart the chip. */
969 /* Clear any other interrupt, and set interrupt enable. */
970 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
971 CSR0_IDON | CSR0_INEA;
973 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
976 spin_unlock (&lp->devlock);
977 return IRQ_RETVAL(handled);
981 static int lance_rx( struct net_device *dev )
983 { struct lance_private *lp = (struct lance_private *)dev->priv;
984 int entry = lp->cur_rx & RX_RING_MOD_MASK;
987 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
988 MEM->rx_head[entry].flag ));
990 /* If we own the next entry, it's a new packet. Send it up. */
991 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
992 struct lance_rx_head *head = &(MEM->rx_head[entry]);
993 int status = head->flag;
995 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
996 /* There is a tricky error noted by John Murphy,
997 <murf@perftech.com> to Russ Nelson: Even with full-sized
998 buffers it's possible for a jabber packet to use two
999 buffers, with only the last correctly noting the error. */
1000 if (status & RMD1_ENP) /* Only count a general error at the */
1001 lp->stats.rx_errors++; /* end of a packet.*/
1002 if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
1003 if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
1004 if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
1005 if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
1006 head->flag &= (RMD1_ENP|RMD1_STP);
1008 /* Malloc up new buffer, compatible with net-3. */
1009 short pkt_len = head->msg_length & 0xfff;
1010 struct sk_buff *skb;
1013 printk( "%s: Runt packet!\n", dev->name );
1014 lp->stats.rx_errors++;
1017 skb = dev_alloc_skb( pkt_len+2 );
1019 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
1021 for( i = 0; i < RX_RING_SIZE; i++ )
1022 if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
1026 if (i > RX_RING_SIZE - 2) {
1027 lp->stats.rx_dropped++;
1028 head->flag |= RMD1_OWN_CHIP;
1034 if (lance_debug >= 3) {
1035 u_char *data = PKTBUF_ADDR(head), *p;
1036 printk( "%s: RX pkt type 0x%04x from ", dev->name,
1037 ((u_short *)data)[6]);
1038 for( p = &data[6], i = 0; i < 6; i++ )
1039 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1041 for( p = data, i = 0; i < 6; i++ )
1042 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1043 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
1045 data[15], data[16], data[17], data[18],
1046 data[19], data[20], data[21], data[22],
1050 skb_reserve( skb, 2 ); /* 16 byte align */
1051 skb_put( skb, pkt_len ); /* Make room */
1052 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1053 skb->protocol = eth_type_trans( skb, dev );
1055 dev->last_rx = jiffies;
1056 lp->stats.rx_packets++;
1057 lp->stats.rx_bytes += pkt_len;
1061 head->flag |= RMD1_OWN_CHIP;
1062 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1064 lp->cur_rx &= RX_RING_MOD_MASK;
1066 /* From lance.c (Donald Becker): */
1067 /* We should check that at least two ring entries are free. If not,
1068 we should free one and mark stats->rx_dropped++. */
1074 static int lance_close( struct net_device *dev )
1076 { struct lance_private *lp = (struct lance_private *)dev->priv;
1077 struct lance_ioreg *IO = lp->iobase;
1079 netif_stop_queue (dev);
1083 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1086 /* We stop the LANCE here -- it occasionally polls
1087 memory if we don't. */
1094 static struct net_device_stats *lance_get_stats( struct net_device *dev )
1096 { struct lance_private *lp = (struct lance_private *)dev->priv;
1102 /* Set or clear the multicast filter for this adaptor.
1103 num_addrs == -1 Promiscuous mode, receive all packets
1104 num_addrs == 0 Normal mode, clear multicast list
1105 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1106 best-effort filtering.
1109 static void set_multicast_list( struct net_device *dev )
1111 { struct lance_private *lp = (struct lance_private *)dev->priv;
1112 struct lance_ioreg *IO = lp->iobase;
1114 if (netif_running(dev))
1115 /* Only possible if board is already started */
1118 /* We take the simple way out and always enable promiscuous mode. */
1119 DREG = CSR0_STOP; /* Temporarily stop the lance. */
1121 if (dev->flags & IFF_PROMISC) {
1122 /* Log any net taps. */
1123 DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1124 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1126 short multicast_table[4];
1127 int num_addrs = dev->mc_count;
1129 /* We don't use the multicast table, but rely on upper-layer
1131 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1132 sizeof(multicast_table) );
1133 for( i = 0; i < 4; i++ )
1134 REGA( CSR8+i ) = multicast_table[i];
1135 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1139 * Always set BSWP after a STOP as STOP puts it back into
1140 * little endian mode.
1142 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1144 /* Resume normal operation and reset AREG to CSR0 */
1145 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1149 /* This is needed for old RieblCards and possible for new RieblCards */
1151 static int lance_set_mac_address( struct net_device *dev, void *addr )
1153 { struct lance_private *lp = (struct lance_private *)dev->priv;
1154 struct sockaddr *saddr = addr;
1157 if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1158 return( -EOPNOTSUPP );
1160 if (netif_running(dev)) {
1161 /* Only possible while card isn't started */
1162 DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1167 memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1168 for( i = 0; i < 6; i++ )
1169 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1170 lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1171 /* set also the magic for future sessions */
1172 *RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1179 static struct net_device *atarilance_dev;
1181 int __init init_module(void)
1183 atarilance_dev = atarilance_probe(-1);
1184 if (IS_ERR(atarilance_dev))
1185 return PTR_ERR(atarilance_dev);
1189 void __exit cleanup_module(void)
1191 unregister_netdev(atarilance_dev);
1192 free_irq(atarilance_dev->irq, atarilance_dev);
1193 free_netdev(atarilance_dev);