2 * linux/arch/m68k/atari/config.c
4 * Copyright (C) 1994 Bjoern Brauel
7 * Added setting of time_adj to get a better clock.
12 * 5/15/94 Roman Hodek:
13 * hard_reset_now() for Atari (and others?)
15 * 94/12/30 Andreas Schwab:
16 * atari_sched_init fixed to get precise clock.
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file COPYING in the main directory of this archive
24 * Miscellaneous atari stuff
27 #include <linux/types.h>
29 #include <linux/console.h>
30 #include <linux/init.h>
31 #include <linux/delay.h>
32 #include <linux/ioport.h>
33 #include <linux/vt_kern.h>
34 #include <linux/module.h>
36 #include <asm/bootinfo.h>
37 #include <asm/setup.h>
38 #include <asm/atarihw.h>
39 #include <asm/atariints.h>
40 #include <asm/atari_stram.h>
41 #include <asm/system.h>
42 #include <asm/machdep.h>
43 #include <asm/hwtest.h>
46 u_long atari_mch_cookie;
47 EXPORT_SYMBOL(atari_mch_cookie);
49 u_long atari_mch_type;
50 EXPORT_SYMBOL(atari_mch_type);
52 struct atari_hw_present atari_hw_present;
53 EXPORT_SYMBOL(atari_hw_present);
55 u_long atari_switches;
56 EXPORT_SYMBOL(atari_switches);
58 int atari_dont_touch_floppy_select;
59 EXPORT_SYMBOL(atari_dont_touch_floppy_select);
61 int atari_rtc_year_offset;
63 /* local function prototypes */
64 static void atari_reset(void);
65 static void atari_get_model(char *model);
66 static int atari_get_hardware_list(char *buffer);
68 /* atari specific irq functions */
69 extern void atari_init_IRQ (void);
70 extern void atari_mksound(unsigned int count, unsigned int ticks);
71 #ifdef CONFIG_HEARTBEAT
72 static void atari_heartbeat(int on);
75 /* atari specific timer functions (in time.c) */
76 extern void atari_sched_init(irq_handler_t);
77 extern unsigned long atari_gettimeoffset (void);
78 extern int atari_mste_hwclk (int, struct rtc_time *);
79 extern int atari_tt_hwclk (int, struct rtc_time *);
80 extern int atari_mste_set_clock_mmss (unsigned long);
81 extern int atari_tt_set_clock_mmss (unsigned long);
84 /* ++roman: This is a more elaborate test for an SCC chip, since the plain
85 * Medusa board generates DTACK at the SCC's standard addresses, but a SCC
86 * board in the Medusa is possible. Also, the addresses where the ST_ESCC
87 * resides generate DTACK without the chip, too.
88 * The method is to write values into the interrupt vector register, that
89 * should be readable without trouble (from channel A!).
92 static int __init scc_test(volatile char *ctla)
94 if (!hwreg_present(ctla))
124 * Parse an Atari-specific record in the bootinfo
127 int __init atari_parse_bootinfo(const struct bi_record *record)
130 const u_long *data = record->data;
132 switch (record->tag) {
133 case BI_ATARI_MCH_COOKIE:
134 atari_mch_cookie = *data;
136 case BI_ATARI_MCH_TYPE:
137 atari_mch_type = *data;
147 /* Parse the Atari-specific switches= option. */
148 static int __init atari_switches_setup(char *str)
150 char switches[strlen(str) + 1];
153 char *args = switches;
158 /* copy string to local array, strsep works destructively... */
159 strcpy(switches, str);
162 /* parse the options */
163 while ((p = strsep(&args, ",")) != NULL) {
167 if (strncmp(p, "ov_", 3) == 0) {
169 ovsc_shift = ATARI_SWITCH_OVSC_SHIFT;
172 if (strcmp(p, "ikbd") == 0) {
173 /* RTS line of IKBD ACIA */
174 atari_switches |= ATARI_SWITCH_IKBD << ovsc_shift;
175 } else if (strcmp(p, "midi") == 0) {
176 /* RTS line of MIDI ACIA */
177 atari_switches |= ATARI_SWITCH_MIDI << ovsc_shift;
178 } else if (strcmp(p, "snd6") == 0) {
179 atari_switches |= ATARI_SWITCH_SND6 << ovsc_shift;
180 } else if (strcmp(p, "snd7") == 0) {
181 atari_switches |= ATARI_SWITCH_SND7 << ovsc_shift;
187 early_param("switches", atari_switches_setup);
191 * Setup the Atari configuration info
194 void __init config_atari(void)
196 unsigned short tos_version;
198 memset(&atari_hw_present, 0, sizeof(atari_hw_present));
200 /* Change size of I/O space from 64KB to 4GB. */
201 ioport_resource.end = 0xFFFFFFFF;
203 mach_sched_init = atari_sched_init;
204 mach_init_IRQ = atari_init_IRQ;
205 mach_get_model = atari_get_model;
206 mach_get_hardware_list = atari_get_hardware_list;
207 mach_gettimeoffset = atari_gettimeoffset;
208 mach_reset = atari_reset;
209 mach_max_dma_address = 0xffffff;
210 #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
211 mach_beep = atari_mksound;
213 #ifdef CONFIG_HEARTBEAT
214 mach_heartbeat = atari_heartbeat;
217 /* Set switches as requested by the user */
218 if (atari_switches & ATARI_SWITCH_IKBD)
219 acia.key_ctrl = ACIA_DIV64 | ACIA_D8N1S | ACIA_RHTID;
220 if (atari_switches & ATARI_SWITCH_MIDI)
221 acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S | ACIA_RHTID;
222 if (atari_switches & (ATARI_SWITCH_SND6|ATARI_SWITCH_SND7)) {
223 sound_ym.rd_data_reg_sel = 14;
224 sound_ym.wd_data = sound_ym.rd_data_reg_sel |
225 ((atari_switches&ATARI_SWITCH_SND6) ? 0x40 : 0) |
226 ((atari_switches&ATARI_SWITCH_SND7) ? 0x80 : 0);
230 * Determine hardware present
233 printk("Atari hardware found: ");
234 if (MACH_IS_MEDUSA || MACH_IS_HADES) {
235 /* There's no Atari video hardware on the Medusa, but all the
236 * addresses below generate a DTACK so no bus error occurs! */
237 } else if (hwreg_present(f030_xreg)) {
238 ATARIHW_SET(VIDEL_SHIFTER);
240 /* This is a temporary hack: If there is Falcon video
241 * hardware, we assume that the ST-DMA serves SCSI instead of
242 * ACSI. In the future, there should be a better method for
245 ATARIHW_SET(ST_SCSI);
246 printk("STDMA-SCSI ");
247 } else if (hwreg_present(tt_palette)) {
248 ATARIHW_SET(TT_SHIFTER);
249 printk("TT_SHIFTER ");
250 } else if (hwreg_present(&shifter.bas_hi)) {
251 if (hwreg_present(&shifter.bas_lo) &&
252 (shifter.bas_lo = 0x0aau, shifter.bas_lo == 0x0aau)) {
253 ATARIHW_SET(EXTD_SHIFTER);
254 printk("EXTD_SHIFTER ");
256 ATARIHW_SET(STND_SHIFTER);
257 printk("STND_SHIFTER ");
260 if (hwreg_present(&mfp.par_dt_reg)) {
264 if (hwreg_present(&tt_mfp.par_dt_reg)) {
268 if (hwreg_present(&tt_scsi_dma.dma_addr_hi)) {
269 ATARIHW_SET(SCSI_DMA);
270 printk("TT_SCSI_DMA ");
272 if (!MACH_IS_HADES && hwreg_present(&st_dma.dma_hi)) {
273 ATARIHW_SET(STND_DMA);
277 * The ST-DMA address registers aren't readable
278 * on all Medusas, so the test below may fail
280 if (MACH_IS_MEDUSA ||
281 (hwreg_present(&st_dma.dma_vhi) &&
282 (st_dma.dma_vhi = 0x55) && (st_dma.dma_hi = 0xaa) &&
283 st_dma.dma_vhi == 0x55 && st_dma.dma_hi == 0xaa &&
284 (st_dma.dma_vhi = 0xaa) && (st_dma.dma_hi = 0x55) &&
285 st_dma.dma_vhi == 0xaa && st_dma.dma_hi == 0x55)) {
286 ATARIHW_SET(EXTD_DMA);
289 if (hwreg_present(&tt_scsi.scsi_data)) {
290 ATARIHW_SET(TT_SCSI);
293 if (hwreg_present(&sound_ym.rd_data_reg_sel)) {
294 ATARIHW_SET(YM_2149);
297 if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
298 hwreg_present(&tt_dmasnd.ctrl)) {
299 ATARIHW_SET(PCM_8BIT);
302 if (!MACH_IS_HADES && hwreg_present(&falcon_codec.unused5)) {
306 if (hwreg_present(&dsp56k_host_interface.icr)) {
310 if (hwreg_present(&tt_scc_dma.dma_ctrl) &&
312 /* This test sucks! Who knows some better? */
313 (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) &&
314 (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0)
316 !MACH_IS_MEDUSA && !MACH_IS_HADES
319 ATARIHW_SET(SCC_DMA);
322 if (scc_test(&scc.cha_a_ctrl)) {
326 if (scc_test(&st_escc.cha_b_ctrl)) {
327 ATARIHW_SET(ST_ESCC);
333 } else if (hwreg_present(&tt_scu.sys_mask)) {
335 /* Assume a VME bus if there's a SCU */
339 if (hwreg_present((void *)(0xffff9210))) {
340 ATARIHW_SET(ANALOG_JOY);
341 printk("ANALOG_JOY ");
343 if (!MACH_IS_HADES && hwreg_present(blitter.halftone)) {
344 ATARIHW_SET(BLITTER);
347 if (hwreg_present((void *)0xfff00039)) {
351 #if 1 /* This maybe wrong */
352 if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
353 hwreg_present(&tt_microwire.data) &&
354 hwreg_present(&tt_microwire.mask) &&
355 (tt_microwire.mask = 0x7ff,
357 tt_microwire.data = MW_LM1992_PSG_HIGH | MW_LM1992_ADDR,
359 tt_microwire.data != 0)) {
360 ATARIHW_SET(MICROWIRE);
361 while (tt_microwire.mask != 0x7ff)
363 printk("MICROWIRE ");
366 if (hwreg_present(&tt_rtc.regsel)) {
369 mach_hwclk = atari_tt_hwclk;
370 mach_set_clock_mmss = atari_tt_set_clock_mmss;
372 if (!MACH_IS_HADES && hwreg_present(&mste_rtc.sec_ones)) {
373 ATARIHW_SET(MSTE_CLK);
375 mach_hwclk = atari_mste_hwclk;
376 mach_set_clock_mmss = atari_mste_set_clock_mmss;
378 if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
379 hwreg_present(&dma_wd.fdc_speed) &&
380 hwreg_write(&dma_wd.fdc_speed, 0)) {
381 ATARIHW_SET(FDCSPEED);
382 printk("FDC_SPEED ");
384 if (!MACH_IS_HADES && !ATARIHW_PRESENT(ST_SCSI)) {
390 if (CPU_IS_040_OR_060)
391 /* Now it seems to be safe to turn of the tt0 transparent
392 * translation (the one that must not be turned off in
398 " movec %%d0,%%itt0\n"
399 " movec %%d0,%%dtt0\n"
405 /* allocator for memory that must reside in st-ram */
408 /* Set up a mapping for the VMEbus address region:
410 * VME is either at phys. 0xfexxxxxx (TT) or 0xa00000..0xdfffff
411 * (MegaSTE) In both cases, the whole 16 MB chunk is mapped at
412 * 0xfe000000 virt., because this can be done with a single
413 * transparent translation. On the 68040, lots of often unused
414 * page tables would be needed otherwise. On a MegaSTE or similar,
415 * the highest byte is stripped off by hardware due to the 24 bit
419 if (CPU_IS_020_OR_030) {
420 unsigned long tt1_val;
421 tt1_val = 0xfe008543; /* Translate 0xfexxxxxx, enable, cache
422 * inhibit, read and write, FDC mask = 3,
423 * FDC val = 4 -> Supervisor only */
436 : "d" (0xfe00a040)); /* Translate 0xfexxxxxx, enable,
437 * supervisor only, non-cacheable/
438 * serialized, writable */
442 /* Fetch tos version at Physical 2 */
444 * We my not be able to access this address if the kernel is
445 * loaded to st ram, since the first page is unmapped. On the
446 * Medusa this is always the case and there is nothing we can do
447 * about this, so we just assume the smaller offset. For the TT
448 * we use the fact that in head.S we have set up a mapping
449 * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible
450 * in the last 16MB of the address space.
452 tos_version = (MACH_IS_MEDUSA || MACH_IS_HADES) ?
453 0xfff : *(unsigned short *)0xff000002;
454 atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68;
457 #ifdef CONFIG_HEARTBEAT
458 static void atari_heartbeat(int on)
463 if (atari_dont_touch_floppy_select)
466 local_irq_save(flags);
467 sound_ym.rd_data_reg_sel = 14; /* Select PSG Port A */
468 tmp = sound_ym.rd_data_reg_sel;
469 sound_ym.wd_data = on ? (tmp & ~0x02) : (tmp | 0x02);
470 local_irq_restore(flags);
476 * This function does a reset on machines that lack the ability to
477 * assert the processor's _RESET signal somehow via hardware. It is
478 * based on the fact that you can find the initial SP and PC values
479 * after a reset at physical addresses 0 and 4. This works pretty well
480 * for Atari machines, since the lowest 8 bytes of physical memory are
481 * really ROM (mapped by hardware). For other 680x0 machines: don't
482 * know if it works...
484 * To get the values at addresses 0 and 4, the MMU better is turned
485 * off first. After that, we have to jump into physical address space
486 * (the PC before the pmove statement points to the virtual address of
487 * the code). Getting that physical address is not hard, but the code
488 * becomes a bit complex since I've tried to ensure that the jump
489 * statement after the pmove is in the cache already (otherwise the
490 * processor can't fetch it!). For that, the code first jumps to the
491 * jump statement with the (virtual) address of the pmove section in
492 * an address register . The jump statement is surely in the cache
493 * now. After that, that physical address of the reset code is loaded
494 * into the same address register, pmove is done and the same jump
495 * statements goes to the reset code. Since there are not many
496 * statements between the two jumps, I hope it stays in the cache.
498 * The C code makes heavy use of the GCC features that you can get the
499 * address of a C label. No hope to compile this with another compiler
503 /* ++andreas: no need for complicated code, just depend on prefetch */
505 static void atari_reset(void)
511 * On the Medusa, phys. 0x4 may contain garbage because it's no
512 * ROM. See above for explanation why we cannot use PTOV(4).
514 reset_addr = MACH_IS_HADES ? 0x7fe00030 :
515 MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 :
516 *(unsigned long *) 0xff000004;
518 /* reset ACIA for switch off OverScan, if it's active */
519 if (atari_switches & ATARI_SWITCH_OVSC_IKBD)
520 acia.key_ctrl = ACIA_RESET;
521 if (atari_switches & ATARI_SWITCH_OVSC_MIDI)
522 acia.mid_ctrl = ACIA_RESET;
524 /* processor independent: turn off interrupts and reset the VBR;
525 * the caches must be left enabled, else prefetching the final jump
526 * instruction doesn't work.
529 asm volatile ("movec %0,%%vbr"
532 if (CPU_IS_040_OR_060) {
533 unsigned long jmp_addr040 = virt_to_phys(&&jmp_addr_label040);
535 /* 68060: clear PCR to turn off superscalar operation */
545 " and.l #0xff000000,%%d0\n"
546 " or.w #0xe020,%%d0\n" /* map 16 MB, enable, cacheable */
548 " movec %%d0,%%itt0\n"
549 " movec %%d0,%%dtt0\n"
552 : : "a" (jmp_addr040)
565 /* the following setup of transparent translations is needed on the
566 * Afterburner040 to successfully reboot. Other machines shouldn't
567 * care about a different tt regs setup, they also didn't care in
568 * the past that the regs weren't turned off. */
569 " move.l #0xffc000,%%d0\n" /* whole insn space cacheable */
570 " movec %%d0,%%itt0\n"
571 " movec %%d0,%%itt1\n"
572 " or.w #0x40,%/d0\n" /* whole data space non-cacheable/ser. */
573 " movec %%d0,%%dtt0\n"
574 " movec %%d0,%%dtt1\n"
585 : "a" (&tc_val), "a" (reset_addr));
589 static void atari_get_model(char *model)
591 strcpy(model, "Atari ");
592 switch (atari_mch_cookie >> 16) {
594 if (ATARIHW_PRESENT(MSTE_CLK))
595 strcat(model, "Mega ST");
601 strcat(model, "Mega STE");
603 strcat(model, "STE");
607 /* Medusa has TT _MCH cookie */
608 strcat(model, "Medusa");
609 else if (MACH_IS_HADES)
610 strcat(model, "Hades");
614 case ATARI_MCH_FALCON:
615 strcat(model, "Falcon");
617 strcat(model, " (with Afterburner040)");
620 sprintf(model + strlen(model), "(unknown mach cookie 0x%lx)",
627 static int atari_get_hardware_list(char *buffer)
631 for (i = 0; i < m68k_num_memory; i++)
632 len += sprintf(buffer+len, "\t%3ld MB at 0x%08lx (%s)\n",
633 m68k_memory[i].size >> 20, m68k_memory[i].addr,
634 (m68k_memory[i].addr & 0xff000000 ?
635 "alternate RAM" : "ST-RAM"));
637 #define ATARIHW_ANNOUNCE(name, str) \
638 if (ATARIHW_PRESENT(name)) \
639 len += sprintf(buffer + len, "\t%s\n", str)
641 len += sprintf(buffer + len, "Detected hardware:\n");
642 ATARIHW_ANNOUNCE(STND_SHIFTER, "ST Shifter");
643 ATARIHW_ANNOUNCE(EXTD_SHIFTER, "STe Shifter");
644 ATARIHW_ANNOUNCE(TT_SHIFTER, "TT Shifter");
645 ATARIHW_ANNOUNCE(VIDEL_SHIFTER, "Falcon Shifter");
646 ATARIHW_ANNOUNCE(YM_2149, "Programmable Sound Generator");
647 ATARIHW_ANNOUNCE(PCM_8BIT, "PCM 8 Bit Sound");
648 ATARIHW_ANNOUNCE(CODEC, "CODEC Sound");
649 ATARIHW_ANNOUNCE(TT_SCSI, "SCSI Controller NCR5380 (TT style)");
650 ATARIHW_ANNOUNCE(ST_SCSI, "SCSI Controller NCR5380 (Falcon style)");
651 ATARIHW_ANNOUNCE(ACSI, "ACSI Interface");
652 ATARIHW_ANNOUNCE(IDE, "IDE Interface");
653 ATARIHW_ANNOUNCE(FDCSPEED, "8/16 Mhz Switch for FDC");
654 ATARIHW_ANNOUNCE(ST_MFP, "Multi Function Peripheral MFP 68901");
655 ATARIHW_ANNOUNCE(TT_MFP, "Second Multi Function Peripheral MFP 68901");
656 ATARIHW_ANNOUNCE(SCC, "Serial Communications Controller SCC 8530");
657 ATARIHW_ANNOUNCE(ST_ESCC, "Extended Serial Communications Controller SCC 85230");
658 ATARIHW_ANNOUNCE(ANALOG_JOY, "Paddle Interface");
659 ATARIHW_ANNOUNCE(MICROWIRE, "MICROWIRE(tm) Interface");
660 ATARIHW_ANNOUNCE(STND_DMA, "DMA Controller (24 bit)");
661 ATARIHW_ANNOUNCE(EXTD_DMA, "DMA Controller (32 bit)");
662 ATARIHW_ANNOUNCE(SCSI_DMA, "DMA Controller for NCR5380");
663 ATARIHW_ANNOUNCE(SCC_DMA, "DMA Controller for SCC");
664 ATARIHW_ANNOUNCE(TT_CLK, "Clock Chip MC146818A");
665 ATARIHW_ANNOUNCE(MSTE_CLK, "Clock Chip RP5C15");
666 ATARIHW_ANNOUNCE(SCU, "System Control Unit");
667 ATARIHW_ANNOUNCE(BLITTER, "Blitter");
668 ATARIHW_ANNOUNCE(VME, "VME Bus");
669 ATARIHW_ANNOUNCE(DSP56K, "DSP56001 processor");